DIVPS (XMM, M128)
Summary:
"Divide Packed Single-Precision Floating-Point Values"
Reference:
https://www.felixcloutier.com/x86/DIVPS.html
Extension:
SSE
Category:
SSE
ISA-Set:
SSE
CPL:
3
iform:
DIVPS_XMMps_MEMps
iclass:
DIVPS
ASM:
DIVPS
Operands
Operand 1 (r/w): Register (XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15)
Operand 2 (r): Memory
Available performance data
Alder Lake-P
Alder Lake-E
Rocket Lake
Tiger Lake
Ice Lake
Cascade Lake
Cannon Lake
Skylake-X
Coffee Lake
Kaby Lake
Skylake
Broadwell
Haswell
Ivy Bridge
Sandy Bridge
Westmere
Nehalem
Wolfdale
Conroe
Tremont
Goldmont Plus
Goldmont
Airmont
Bonnell
AMD Zen 4
AMD Zen 3
AMD Zen 2
AMD Zen+
Alder Lake-P
Measurements
Latencies
Latency operand 1 → 1:
≤11
Latency operand 2 → 1 (address, base register):
≤18
Latency operand 2 → 1 (address, index register):
≤18
Throughput
Computed from the port usage: 1.00
Measured (loop):
3.00
Measured (unrolled):
3.00
Number of μops
Executed: 2
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p23A
Alder Lake-E
Measurements
Latencies
Latency operand 1 → 1:
≤15
Latency operand 2 → 1 (address, base register):
≤24
Latency operand 2 → 1 (address, index register):
≤24
Throughput
Measured (loop):
10.00
Measured (unrolled):
10.00
Number of μops
Executed: 1
Microcode Sequencer (MS): 0
Rocket Lake
Measurements
Latencies
Latency operand 1 → 1:
≤11
Latency operand 2 → 1 (address, base register):
≤18
Latency operand 2 → 1 (address, index register):
≤18
Throughput
Computed from the port usage: 1.00
Measured (loop):
3.00
Measured (unrolled):
3.00
Number of μops
Executed: 2
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p23
Tiger Lake
Measurements
Latencies
Latency operand 1 → 1:
≤11
Latency operand 2 → 1 (address, base register):
≤18
Latency operand 2 → 1 (address, index register):
≤18
Throughput
Computed from the port usage: 1.00
Measured (loop):
3.00
Measured (unrolled):
3.00
Number of μops
Executed: 2
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p23
Ice Lake
Measurements
Latencies
Latency operand 1 → 1:
≤11
Latency operand 2 → 1 (address, base register):
≤18
Latency operand 2 → 1 (address, index register):
≤18
Throughput
Computed from the port usage: 1.00
Measured (loop):
3.00
Measured (unrolled):
3.00
Number of μops
Executed: 2
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p23
Cascade Lake
Measurements
Latencies
Latency operand 1 → 1:
≤11
Latency operand 2 → 1 (address, base register):
≤18
Latency operand 2 → 1 (address, index register):
≤18
Throughput
Computed from the port usage: 1.00
Measured (loop):
3.00
Measured (unrolled):
3.03
Number of μops
Executed: 2
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p23
Cannon Lake
Measurements
Latencies
Latency operand 1 → 1:
≤11
Latency operand 2 → 1 (address, base register):
≤18
Latency operand 2 → 1 (address, index register):
≤18
Throughput
Computed from the port usage: 1.00
Measured (loop):
3.00
Measured (unrolled):
3.04
Number of μops
Executed: 2
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p23
Skylake-X
Measurements
Latencies
Latency operand 1 → 1:
≤11
Latency operand 2 → 1 (address, base register):
≤18
Latency operand 2 → 1 (address, index register):
≤18
Throughput
Computed from the port usage: 1.00
Measured (loop):
3.00
Measured (unrolled):
3.04
Number of μops
Executed: 2
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p23
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
10.48
Number of μops:
2
Port usage:
1*p0+1*p23
IACA 3.0
Throughput
Computed from the port usage: 1.00
IACA:
11.00
Number of μops:
2
Port usage:
1*p0+1*p23
Coffee Lake
Measurements
Latencies
Latency operand 1 → 1:
≤11
Latency operand 2 → 1 (address, base register):
≤18
Latency operand 2 → 1 (address, index register):
≤18
Throughput
Computed from the port usage: 1.00
Measured (loop):
3.00
Measured (unrolled):
3.04
Number of μops
Executed: 2
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p23
Kaby Lake
Measurements
Latencies
Latency operand 1 → 1:
≤11
Latency operand 2 → 1 (address, base register):
≤18
Latency operand 2 → 1 (address, index register):
≤18
Throughput
Computed from the port usage: 1.00
Measured (loop):
3.00
Measured (unrolled):
3.04
Number of μops
Executed: 2
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p23
Skylake
Measurements
Latencies
Latency operand 1 → 1:
≤11
Latency operand 2 → 1 (address, base register):
≤18
Latency operand 2 → 1 (address, index register):
≤18
Throughput
Computed from the port usage: 1.00
Measured (loop):
3.00
Measured (unrolled):
3.04
Number of μops
Executed: 2
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p23
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
10.48
Number of μops:
2
Port usage:
1*p0+1*p23
IACA 3.0
Throughput
Computed from the port usage: 1.00
IACA:
2.94
Number of μops:
2
Port usage:
1*p0+1*p23
Broadwell
Measurements
Latencies
Latency operand 1 → 1:
≤11
Latency operand 2 → 1 (address, base register):
≤17
Latency operand 2 → 1 (address, index register):
≤17
Throughput
Computed from the port usage: 1.00
Measured (loop):
5.00
Measured (unrolled):
5.03
Number of μops
Executed: 2
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p23
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
11.00 (with the -no_interiteration flag: 3.00)
Number of μops:
2
Port usage:
1*p0+1*p23
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
10.48
Number of μops:
2
Port usage:
1*p0+1*p23
IACA 3.0
Throughput
Computed from the port usage: 1.00
IACA:
2.91
Number of μops:
2
Port usage:
1*p0+1*p23
Haswell
Measurements
Latencies
Latency operand 1 → 1:
≤10
Latency operand 2 → 1 (address, base register):
≤16
Latency operand 2 → 1 (address, index register):
≤16
Throughput
Computed from the port usage: 1.00
Measured (loop):
7.00
Measured (unrolled):
7.03
Number of μops
Executed: 2
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p23
IACA 2.1
Latency:
19
Throughput
Computed from the port usage: 1.00
IACA:
13.00 (with the -no_interiteration flag: 7.00)
Number of μops:
2
Port usage:
1*p0+1*p23
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
11.00 (with the -no_interiteration flag: 7.00)
Number of μops:
2
Port usage:
1*p0+1*p23
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
10.48
Number of μops:
2
Port usage:
1*p0+1*p23
IACA 3.0
Throughput
Computed from the port usage: 1.00
IACA:
7.00
Number of μops:
2
Port usage:
1*p0+1*p23
Ivy Bridge
Measurements
Latencies
Latency operand 1 → 1:
≤10
Latency operand 2 → 1 (address, base register):
≤16
Latency operand 2 → 1 (address, index register):
≤16
Throughput
Computed from the port usage: 1.00
Measured (loop):
7.00
Measured (unrolled):
7.03
Number of μops
Executed: 2
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p23
IACA 2.1
Latency:
19
Throughput
Computed from the port usage: 1.00
IACA:
13.00 (with the -no_interiteration flag: 7.00)
Number of μops:
2
Port usage:
1*p0+1*p23
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
13.00 (with the -no_interiteration flag: 7.00)
Number of μops:
2
Port usage:
1*p0+1*p23
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
12.38
Number of μops:
2
Port usage:
1*p0+1*p23
Sandy Bridge
Measurements
Latencies
Latency operand 1 → 1:
≤10
Latency operand 2 → 1 (address, base register):
≤16
Latency operand 2 → 1 (address, index register):
≤16
Throughput
Computed from the port usage: 1.00
Measured (loop):
10.00
Measured (unrolled):
10.00
Number of μops
Executed: 2
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p23
IACA 2.1
Latency:
20
Throughput
Computed from the port usage: 1.00
IACA:
14.00 (with the -no_interiteration flag: 14.00)
Number of μops:
2
Port usage:
1*p0+1*p23
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
14.00 (with the -no_interiteration flag: 14.00)
Number of μops:
2
Port usage:
1*p0+1*p23
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
14.00
Number of μops:
2
Port usage:
1*p0+1*p23
Westmere
Measurements
Latencies
Latency operand 1 → 1:
≤7
Latency operand 2 → 1 (address, base register):
≤15
Latency operand 2 → 1 (address, index register):
≤15
Throughput
Computed from the port usage: 1.00
Measured (loop):
7.00
Measured (unrolled):
7.00
Number of μops
Executed: 2
Retire slots: 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p2
IACA 2.1
Latency:
20
Throughput
Computed from the port usage: 1.00
IACA:
14.00 (with the -no_interiteration flag: 14.00)
Number of μops:
2
Port usage:
1*p0+1*p2
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
14.00 (with the -no_interiteration flag: 14.00)
Number of μops:
2
Port usage:
1*p0+1*p2
Nehalem
Measurements
Latencies
Latency operand 1 → 1:
≤7
Latency operand 2 → 1 (address, base register):
≤15
Latency operand 2 → 1 (address, index register):
≤15
Throughput
Computed from the port usage: 1.00
Measured (loop):
7.00
Measured (unrolled):
7.00
Number of μops
Executed: 2
Retire slots: 1
Microcode Sequencer (MS): 0
Port usage:
1*p0+1*p2
IACA 2.1
Latency:
20
Throughput
Computed from the port usage: 1.00
IACA:
14.00 (with the -no_interiteration flag: 14.00)
Number of μops:
2
Port usage:
1*p0+1*p2
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
14.00 (with the -no_interiteration flag: 14.00)
Number of μops:
2
Port usage:
1*p0+1*p2
Wolfdale
Measurements
Latencies
Latency operand 1 → 1:
≤6
Latency operand 2 → 1 (address, base register):
≤11
Latency operand 2 → 1 (address, index register):
≤11
Throughput
Computed from the port usage: 1.00
Measured (loop):
5.00
Measured (unrolled):
5.00
Number of μops
Executed: 2
Port usage:
1*p0+1*p2
Conroe
Measurements
Latencies
Latency operand 1 → 1:
≤6
Latency operand 2 → 1 (address, base register):
≤11
Latency operand 2 → 1 (address, index register):
≤11
Throughput
Computed from the port usage: 1.00
Measured (loop):
5.00
Measured (unrolled):
5.00
Number of μops
Executed: 2
Port usage:
1*p0+1*p2
Tremont
Measurements
Latencies
Latency operand 1 → 1:
≤15
Latency operand 2 → 1 (address, base register):
≤23
Latency operand 2 → 1 (address, index register):
≤23
Throughput
Measured (loop):
10.00
Measured (unrolled):
10.00
Number of μops
Executed: 1
Microcode Sequencer (MS): 0
Goldmont Plus
Measurements
Latencies
Latency operand 1 → 1:
≤16
Latency operand 2 → 1 (address, base register):
≤23
Latency operand 2 → 1 (address, index register):
≤23
Throughput
Measured (loop):
12.00
Measured (unrolled):
12.00
Number of μops
Executed: 1
Microcode Sequencer (MS): 0
Goldmont
Measurements
Latencies
Latency operand 1 → 1:
≤36
Latency operand 2 → 1 (address, base register):
≤43
Latency operand 2 → 1 (address, index register):
≤43
Throughput
Measured (loop):
35.00
Measured (unrolled):
35.00
Number of μops
Executed: 1
Microcode Sequencer (MS): 0
Airmont
Measurements
Latencies
Latency operand 1 → 1:
≤38
Latency operand 2 → 1 (address, base register):
≤46
Latency operand 2 → 1 (address, index register):
≤46
Throughput
Measured (loop):
39.00
Measured (unrolled):
39.00
Number of μops
Executed: 7
Microcode Sequencer (MS): 7
Bonnell
Measurements
Latencies
Latency operand 1 → 1:
≤65
Latency operand 2 → 1 (address, base register):
≤70
Latency operand 2 → 1 (address, index register):
≤70
Throughput
Measured (loop):
66.00
Measured (unrolled):
66.00
Number of μops
Executed: 7
Microcode Sequencer (MS): 7
AMD Zen 4
Measurements
Latencies
Latency operand 1 → 1:
≤11
Latency operand 2 → 1 (address, base register):
≤18
Latency operand 2 → 1 (address, index register):
≤18
Throughput
Computed from the port usage: 0.50
Measured (loop):
3.00
Measured (unrolled):
3.00
Number of μops
Executed: 1
Port usage:
1*FP01
AMD Zen 3
Measurements
Latencies
Latency operand 1 → 1:
≤10
Latency operand 2 → 1 (address, base register):
≤18
Latency operand 2 → 1 (address, index register):
≤18
Throughput
Computed from the port usage: 0.50
Measured (loop):
3.50
Measured (unrolled):
3.50
Number of μops
Executed: 1
Port usage:
1*FP01
AMD Zen 2
Measurements
Latencies
Latency operand 1 → 1:
≤10
Latency operand 2 → 1 (address, base register):
≤18
Latency operand 2 → 1 (address, index register):
≤18
Throughput
Measured (loop):
3.50
Measured (unrolled):
3.50
Number of μops
Executed: 1
AMD Zen+
Measurements
Latencies
Latency operand 1 → 1:
≤10
Latency operand 2 → 1 (address, base register):
≤18
Latency operand 2 → 1 (address, index register):
≤18
Throughput
Measured (loop):
3.00
Measured (unrolled):
3.00
Number of μops
Executed: 1