DIVPS (XMM, M128) - Port Usage

With blocking instructions for port '0':

• Code:

     0:	41 0f 7e c0          	movd   r8d,mm0
     4:	41 0f 7e c1          	movd   r9d,mm0
     8:	41 0f 7e c2          	movd   r10d,mm0
     c:	41 0f 7e c3          	movd   r11d,mm0
    10:	41 0f 7e c4          	movd   r12d,mm0
    14:	0f 7e c3             	movd   ebx,mm0
    17:	0f 7e c1             	movd   ecx,mm0
    1a:	0f 7e c2             	movd   edx,mm0
    1d:	41 0f 7e c0          	movd   r8d,mm0
    21:	41 0f 7e c1          	movd   r9d,mm0
    25:	41 0f 7e c2          	movd   r10d,mm0
    29:	41 0f 7e c3          	movd   r11d,mm0
    2d:	41 0f 7e c4          	movd   r12d,mm0
    31:	0f 7e c3             	movd   ebx,mm0
    34:	0f 7e c1             	movd   ecx,mm0
    37:	0f 7e c2             	movd   edx,mm0
    3a:	41 0f 7e c0          	movd   r8d,mm0
    3e:	41 0f 7e c1          	movd   r9d,mm0
    42:	41 0f 7e c2          	movd   r10d,mm0
    46:	41 0f 7e c3          	movd   r11d,mm0
    4a:	0f 10 d1             	movups xmm2,xmm1
    4d:	41 0f 5e 16          	divps  xmm2,XMMWORD PTR [r14]
  

• Init:

  PXOR MM0, MM0;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOVUPS XMM0, [R14];
  MOVUPS XMM1, [R14+64];
  MOVUPS XMM2, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 22.0
  • Core cycles: 21.22
  • Reference cycles: 21.53
  • UOPS_PORT_0: 21.02

With blocking instructions for port '5':

• Code:

     0:	66 0f 55 c1          	andnpd xmm0,xmm1
     4:	66 0f 55 d9          	andnpd xmm3,xmm1
     8:	66 0f 55 e1          	andnpd xmm4,xmm1
     c:	66 0f 55 e9          	andnpd xmm5,xmm1
    10:	66 0f 55 f1          	andnpd xmm6,xmm1
    14:	66 0f 55 f9          	andnpd xmm7,xmm1
    18:	66 44 0f 55 c1       	andnpd xmm8,xmm1
    1d:	66 44 0f 55 c9       	andnpd xmm9,xmm1
    22:	66 44 0f 55 d1       	andnpd xmm10,xmm1
    27:	66 44 0f 55 d9       	andnpd xmm11,xmm1
    2c:	66 44 0f 55 e1       	andnpd xmm12,xmm1
    31:	66 0f 55 c1          	andnpd xmm0,xmm1
    35:	66 0f 55 d9          	andnpd xmm3,xmm1
    39:	66 0f 55 e1          	andnpd xmm4,xmm1
    3d:	66 0f 55 e9          	andnpd xmm5,xmm1
    41:	66 0f 55 f1          	andnpd xmm6,xmm1
    45:	66 0f 55 f9          	andnpd xmm7,xmm1
    49:	66 44 0f 55 c1       	andnpd xmm8,xmm1
    4e:	66 44 0f 55 c9       	andnpd xmm9,xmm1
    53:	66 44 0f 55 d1       	andnpd xmm10,xmm1
    58:	0f 10 d1             	movups xmm2,xmm1
    5b:	41 0f 5e 16          	divps  xmm2,XMMWORD PTR [r14]
  

• Init:

  VZEROALL;
  PXOR XMM0, XMM0;
  PXOR XMM1, XMM1;
  PXOR XMM3, XMM3;
  PXOR XMM4, XMM4;
  PXOR XMM5, XMM5;
  PXOR XMM6, XMM6;
  PXOR XMM7, XMM7;
  PXOR XMM8, XMM8;
  PXOR XMM9, XMM9;
  PXOR XMM10, XMM10;
  PXOR XMM11, XMM11;
  PXOR XMM12, XMM12;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOVUPS XMM0, [R14];
  MOVUPS XMM1, [R14+64];
  MOVUPS XMM2, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 22.0
  • Core cycles: 21.26
  • Reference cycles: 21.08
  • UOPS_PORT_5: 20.98

With blocking instructions for ports {'0', '5'}:

• Code:

     0:	66 41 c1 f8 00       	sar    r8w,0x0
     5:	66 41 c1 f9 00       	sar    r9w,0x0
     a:	66 41 c1 fa 00       	sar    r10w,0x0
     f:	66 41 c1 fb 00       	sar    r11w,0x0
    14:	66 41 c1 fc 00       	sar    r12w,0x0
    19:	66 c1 fb 00          	sar    bx,0x0
    1d:	66 c1 f9 00          	sar    cx,0x0
    21:	66 c1 fa 00          	sar    dx,0x0
    25:	66 41 c1 f8 00       	sar    r8w,0x0
    2a:	66 41 c1 f9 00       	sar    r9w,0x0
    2f:	66 41 c1 fa 00       	sar    r10w,0x0
    34:	66 41 c1 fb 00       	sar    r11w,0x0
    39:	66 41 c1 fc 00       	sar    r12w,0x0
    3e:	66 c1 fb 00          	sar    bx,0x0
    42:	66 c1 f9 00          	sar    cx,0x0
    46:	66 c1 fa 00          	sar    dx,0x0
    4a:	66 41 c1 f8 00       	sar    r8w,0x0
    4f:	66 41 c1 f9 00       	sar    r9w,0x0
    54:	66 41 c1 fa 00       	sar    r10w,0x0
    59:	66 41 c1 fb 00       	sar    r11w,0x0
    5e:	66 41 c1 fc 00       	sar    r12w,0x0
    63:	66 c1 fb 00          	sar    bx,0x0
    67:	66 c1 f9 00          	sar    cx,0x0
    6b:	66 c1 fa 00          	sar    dx,0x0
    6f:	66 41 c1 f8 00       	sar    r8w,0x0
    74:	66 41 c1 f9 00       	sar    r9w,0x0
    79:	66 41 c1 fa 00       	sar    r10w,0x0
    7e:	66 41 c1 fb 00       	sar    r11w,0x0
    83:	66 41 c1 fc 00       	sar    r12w,0x0
    88:	66 c1 fb 00          	sar    bx,0x0
    8c:	66 c1 f9 00          	sar    cx,0x0
    90:	66 c1 fa 00          	sar    dx,0x0
    94:	66 41 c1 f8 00       	sar    r8w,0x0
    99:	66 41 c1 f9 00       	sar    r9w,0x0
    9e:	66 41 c1 fa 00       	sar    r10w,0x0
    a3:	66 41 c1 fb 00       	sar    r11w,0x0
    a8:	66 41 c1 fc 00       	sar    r12w,0x0
    ad:	66 c1 fb 00          	sar    bx,0x0
    b1:	66 c1 f9 00          	sar    cx,0x0
    b5:	66 c1 fa 00          	sar    dx,0x0
    b9:	0f 10 d1             	movups xmm2,xmm1
    bc:	41 0f 5e 16          	divps  xmm2,XMMWORD PTR [r14]
  

• Init:

  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOVUPS XMM0, [R14];
  MOVUPS XMM1, [R14+64];
  MOVUPS XMM2, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 42.0
  • Core cycles: 21.6
  • Reference cycles: 21.53
  • UOPS_PORT_5: 20.96
  • UOPS_PORT_0: 21.08

With blocking instructions for ports {'1', '5'}:

• Code:

     0:	0f 38 1c c1          	pabsb  mm0,mm1
     4:	0f 38 1c d1          	pabsb  mm2,mm1
     8:	0f 38 1c d9          	pabsb  mm3,mm1
     c:	0f 38 1c e1          	pabsb  mm4,mm1
    10:	0f 38 1c e9          	pabsb  mm5,mm1
    14:	0f 38 1c f1          	pabsb  mm6,mm1
    18:	0f 38 1c f9          	pabsb  mm7,mm1
    1c:	0f 38 1c c1          	pabsb  mm0,mm1
    20:	0f 38 1c d1          	pabsb  mm2,mm1
    24:	0f 38 1c d9          	pabsb  mm3,mm1
    28:	0f 38 1c e1          	pabsb  mm4,mm1
    2c:	0f 38 1c e9          	pabsb  mm5,mm1
    30:	0f 38 1c f1          	pabsb  mm6,mm1
    34:	0f 38 1c f9          	pabsb  mm7,mm1
    38:	0f 38 1c c1          	pabsb  mm0,mm1
    3c:	0f 38 1c d1          	pabsb  mm2,mm1
    40:	0f 38 1c d9          	pabsb  mm3,mm1
    44:	0f 38 1c e1          	pabsb  mm4,mm1
    48:	0f 38 1c e9          	pabsb  mm5,mm1
    4c:	0f 38 1c f1          	pabsb  mm6,mm1
    50:	0f 38 1c f9          	pabsb  mm7,mm1
    54:	0f 38 1c c1          	pabsb  mm0,mm1
    58:	0f 38 1c d1          	pabsb  mm2,mm1
    5c:	0f 38 1c d9          	pabsb  mm3,mm1
    60:	0f 38 1c e1          	pabsb  mm4,mm1
    64:	0f 38 1c e9          	pabsb  mm5,mm1
    68:	0f 38 1c f1          	pabsb  mm6,mm1
    6c:	0f 38 1c f9          	pabsb  mm7,mm1
    70:	0f 38 1c c1          	pabsb  mm0,mm1
    74:	0f 38 1c d1          	pabsb  mm2,mm1
    78:	0f 38 1c d9          	pabsb  mm3,mm1
    7c:	0f 38 1c e1          	pabsb  mm4,mm1
    80:	0f 38 1c e9          	pabsb  mm5,mm1
    84:	0f 38 1c f1          	pabsb  mm6,mm1
    88:	0f 38 1c f9          	pabsb  mm7,mm1
    8c:	0f 38 1c c1          	pabsb  mm0,mm1
    90:	0f 38 1c d1          	pabsb  mm2,mm1
    94:	0f 38 1c d9          	pabsb  mm3,mm1
    98:	0f 38 1c e1          	pabsb  mm4,mm1
    9c:	0f 38 1c e9          	pabsb  mm5,mm1
    a0:	0f 10 d1             	movups xmm2,xmm1
    a3:	41 0f 5e 16          	divps  xmm2,XMMWORD PTR [r14]
  

• Init:

  VZEROALL;
  PXOR MM1, MM1;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOVUPS XMM0, [R14];
  MOVUPS XMM1, [R14+64];
  MOVUPS XMM2, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 42.0
  • Core cycles: 21.12
  • Reference cycles: 21.31
  • UOPS_PORT_5: 20.48
  • UOPS_PORT_1: 20.48

With blocking instructions for ports {'2', '3'}:

• Code:

     0:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
     6:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
     c:	f2 41 0f f0 5e 60    	lddqu  xmm3,[r14+0x60]
    12:	f2 41 0f f0 66 70    	lddqu  xmm4,[r14+0x70]
    18:	f2 41 0f f0 ae 80 00 	lddqu  xmm5,[r14+0x80]
    1f:	00 00 
    21:	f2 41 0f f0 b6 90 00 	lddqu  xmm6,[r14+0x90]
    28:	00 00 
    2a:	f2 41 0f f0 be a0 00 	lddqu  xmm7,[r14+0xa0]
    31:	00 00 
    33:	f2 45 0f f0 86 b0 00 	lddqu  xmm8,[r14+0xb0]
    3a:	00 00 
    3c:	f2 45 0f f0 8e c0 00 	lddqu  xmm9,[r14+0xc0]
    43:	00 00 
    45:	f2 45 0f f0 96 d0 00 	lddqu  xmm10,[r14+0xd0]
    4c:	00 00 
    4e:	f2 45 0f f0 9e e0 00 	lddqu  xmm11,[r14+0xe0]
    55:	00 00 
    57:	f2 45 0f f0 a6 f0 00 	lddqu  xmm12,[r14+0xf0]
    5e:	00 00 
    60:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
    66:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
    6c:	f2 41 0f f0 5e 60    	lddqu  xmm3,[r14+0x60]
    72:	f2 41 0f f0 66 70    	lddqu  xmm4,[r14+0x70]
    78:	f2 41 0f f0 ae 80 00 	lddqu  xmm5,[r14+0x80]
    7f:	00 00 
    81:	f2 41 0f f0 b6 90 00 	lddqu  xmm6,[r14+0x90]
    88:	00 00 
    8a:	f2 41 0f f0 be a0 00 	lddqu  xmm7,[r14+0xa0]
    91:	00 00 
    93:	f2 45 0f f0 86 b0 00 	lddqu  xmm8,[r14+0xb0]
    9a:	00 00 
    9c:	f2 45 0f f0 8e c0 00 	lddqu  xmm9,[r14+0xc0]
    a3:	00 00 
    a5:	f2 45 0f f0 96 d0 00 	lddqu  xmm10,[r14+0xd0]
    ac:	00 00 
    ae:	f2 45 0f f0 9e e0 00 	lddqu  xmm11,[r14+0xe0]
    b5:	00 00 
    b7:	f2 45 0f f0 a6 f0 00 	lddqu  xmm12,[r14+0xf0]
    be:	00 00 
    c0:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
    c6:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
    cc:	f2 41 0f f0 5e 60    	lddqu  xmm3,[r14+0x60]
    d2:	f2 41 0f f0 66 70    	lddqu  xmm4,[r14+0x70]
    d8:	f2 41 0f f0 ae 80 00 	lddqu  xmm5,[r14+0x80]
    df:	00 00 
    e1:	f2 41 0f f0 b6 90 00 	lddqu  xmm6,[r14+0x90]
    e8:	00 00 
    ea:	f2 41 0f f0 be a0 00 	lddqu  xmm7,[r14+0xa0]
    f1:	00 00 
    f3:	f2 45 0f f0 86 b0 00 	lddqu  xmm8,[r14+0xb0]
    fa:	00 00 
    fc:	f2 45 0f f0 8e c0 00 	lddqu  xmm9,[r14+0xc0]
   103:	00 00 
   105:	f2 45 0f f0 96 d0 00 	lddqu  xmm10,[r14+0xd0]
   10c:	00 00 
   10e:	f2 45 0f f0 9e e0 00 	lddqu  xmm11,[r14+0xe0]
   115:	00 00 
   117:	f2 45 0f f0 a6 f0 00 	lddqu  xmm12,[r14+0xf0]
   11e:	00 00 
   120:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
   126:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
   12c:	f2 41 0f f0 5e 60    	lddqu  xmm3,[r14+0x60]
   132:	f2 41 0f f0 66 70    	lddqu  xmm4,[r14+0x70]
   138:	0f 10 d1             	movups xmm2,xmm1
   13b:	41 0f 5e 16          	divps  xmm2,XMMWORD PTR [r14]
  

• Init:

  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOVUPS XMM0, [R14];
  MOVUPS XMM1, [R14+64];
  MOVUPS XMM2, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 42.0
  • Core cycles: 21.32
  • Reference cycles: 21.53
  • UOPS_PORT_2: 20.48
  • UOPS_PORT_3: 20.48

With an indexed addressing mode

With blocking instructions for port '0':

• Code:

     0:	41 0f 7e c0          	movd   r8d,mm0
     4:	41 0f 7e c1          	movd   r9d,mm0
     8:	41 0f 7e c2          	movd   r10d,mm0
     c:	41 0f 7e c3          	movd   r11d,mm0
    10:	41 0f 7e c4          	movd   r12d,mm0
    14:	0f 7e c3             	movd   ebx,mm0
    17:	0f 7e c1             	movd   ecx,mm0
    1a:	0f 7e c2             	movd   edx,mm0
    1d:	41 0f 7e c0          	movd   r8d,mm0
    21:	41 0f 7e c1          	movd   r9d,mm0
    25:	41 0f 7e c2          	movd   r10d,mm0
    29:	41 0f 7e c3          	movd   r11d,mm0
    2d:	41 0f 7e c4          	movd   r12d,mm0
    31:	0f 7e c3             	movd   ebx,mm0
    34:	0f 7e c1             	movd   ecx,mm0
    37:	0f 7e c2             	movd   edx,mm0
    3a:	41 0f 7e c0          	movd   r8d,mm0
    3e:	41 0f 7e c1          	movd   r9d,mm0
    42:	41 0f 7e c2          	movd   r10d,mm0
    46:	41 0f 7e c3          	movd   r11d,mm0
    4a:	0f 10 d1             	movups xmm2,xmm1
    4d:	41 0f 5e 16          	divps  xmm2,XMMWORD PTR [r14]
  

• Init:

  PXOR MM0, MM0;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOVUPS XMM0, [R14];
  MOVUPS XMM1, [R14+64];
  MOVUPS XMM2, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 22.0
  • Core cycles: 21.22
  • Reference cycles: 21.19
  • UOPS_PORT_0: 21.02

With blocking instructions for port '5':

• Code:

     0:	66 0f 55 c1          	andnpd xmm0,xmm1
     4:	66 0f 55 d9          	andnpd xmm3,xmm1
     8:	66 0f 55 e1          	andnpd xmm4,xmm1
     c:	66 0f 55 e9          	andnpd xmm5,xmm1
    10:	66 0f 55 f1          	andnpd xmm6,xmm1
    14:	66 0f 55 f9          	andnpd xmm7,xmm1
    18:	66 44 0f 55 c1       	andnpd xmm8,xmm1
    1d:	66 44 0f 55 c9       	andnpd xmm9,xmm1
    22:	66 44 0f 55 d1       	andnpd xmm10,xmm1
    27:	66 44 0f 55 d9       	andnpd xmm11,xmm1
    2c:	66 44 0f 55 e1       	andnpd xmm12,xmm1
    31:	66 0f 55 c1          	andnpd xmm0,xmm1
    35:	66 0f 55 d9          	andnpd xmm3,xmm1
    39:	66 0f 55 e1          	andnpd xmm4,xmm1
    3d:	66 0f 55 e9          	andnpd xmm5,xmm1
    41:	66 0f 55 f1          	andnpd xmm6,xmm1
    45:	66 0f 55 f9          	andnpd xmm7,xmm1
    49:	66 44 0f 55 c1       	andnpd xmm8,xmm1
    4e:	66 44 0f 55 c9       	andnpd xmm9,xmm1
    53:	66 44 0f 55 d1       	andnpd xmm10,xmm1
    58:	0f 10 d1             	movups xmm2,xmm1
    5b:	41 0f 5e 16          	divps  xmm2,XMMWORD PTR [r14]
  

• Init:

  VZEROALL;
  PXOR XMM0, XMM0;
  PXOR XMM1, XMM1;
  PXOR XMM3, XMM3;
  PXOR XMM4, XMM4;
  PXOR XMM5, XMM5;
  PXOR XMM6, XMM6;
  PXOR XMM7, XMM7;
  PXOR XMM8, XMM8;
  PXOR XMM9, XMM9;
  PXOR XMM10, XMM10;
  PXOR XMM11, XMM11;
  PXOR XMM12, XMM12;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOVUPS XMM0, [R14];
  MOVUPS XMM1, [R14+64];
  MOVUPS XMM2, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 22.0
  • Core cycles: 21.26
  • Reference cycles: 21.53
  • UOPS_PORT_5: 20.98

With blocking instructions for ports {'0', '5'}:

• Code:

     0:	66 41 c1 f8 00       	sar    r8w,0x0
     5:	66 41 c1 f9 00       	sar    r9w,0x0
     a:	66 41 c1 fa 00       	sar    r10w,0x0
     f:	66 41 c1 fb 00       	sar    r11w,0x0
    14:	66 41 c1 fc 00       	sar    r12w,0x0
    19:	66 c1 fb 00          	sar    bx,0x0
    1d:	66 c1 f9 00          	sar    cx,0x0
    21:	66 c1 fa 00          	sar    dx,0x0
    25:	66 41 c1 f8 00       	sar    r8w,0x0
    2a:	66 41 c1 f9 00       	sar    r9w,0x0
    2f:	66 41 c1 fa 00       	sar    r10w,0x0
    34:	66 41 c1 fb 00       	sar    r11w,0x0
    39:	66 41 c1 fc 00       	sar    r12w,0x0
    3e:	66 c1 fb 00          	sar    bx,0x0
    42:	66 c1 f9 00          	sar    cx,0x0
    46:	66 c1 fa 00          	sar    dx,0x0
    4a:	66 41 c1 f8 00       	sar    r8w,0x0
    4f:	66 41 c1 f9 00       	sar    r9w,0x0
    54:	66 41 c1 fa 00       	sar    r10w,0x0
    59:	66 41 c1 fb 00       	sar    r11w,0x0
    5e:	66 41 c1 fc 00       	sar    r12w,0x0
    63:	66 c1 fb 00          	sar    bx,0x0
    67:	66 c1 f9 00          	sar    cx,0x0
    6b:	66 c1 fa 00          	sar    dx,0x0
    6f:	66 41 c1 f8 00       	sar    r8w,0x0
    74:	66 41 c1 f9 00       	sar    r9w,0x0
    79:	66 41 c1 fa 00       	sar    r10w,0x0
    7e:	66 41 c1 fb 00       	sar    r11w,0x0
    83:	66 41 c1 fc 00       	sar    r12w,0x0
    88:	66 c1 fb 00          	sar    bx,0x0
    8c:	66 c1 f9 00          	sar    cx,0x0
    90:	66 c1 fa 00          	sar    dx,0x0
    94:	66 41 c1 f8 00       	sar    r8w,0x0
    99:	66 41 c1 f9 00       	sar    r9w,0x0
    9e:	66 41 c1 fa 00       	sar    r10w,0x0
    a3:	66 41 c1 fb 00       	sar    r11w,0x0
    a8:	66 41 c1 fc 00       	sar    r12w,0x0
    ad:	66 c1 fb 00          	sar    bx,0x0
    b1:	66 c1 f9 00          	sar    cx,0x0
    b5:	66 c1 fa 00          	sar    dx,0x0
    b9:	0f 10 d1             	movups xmm2,xmm1
    bc:	41 0f 5e 16          	divps  xmm2,XMMWORD PTR [r14]
  

• Init:

  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOVUPS XMM0, [R14];
  MOVUPS XMM1, [R14+64];
  MOVUPS XMM2, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 42.0
  • Core cycles: 21.6
  • Reference cycles: 21.76
  • UOPS_PORT_5: 20.96
  • UOPS_PORT_0: 21.08

With blocking instructions for ports {'1', '5'}:

• Code:

     0:	0f 38 1c c1          	pabsb  mm0,mm1
     4:	0f 38 1c d1          	pabsb  mm2,mm1
     8:	0f 38 1c d9          	pabsb  mm3,mm1
     c:	0f 38 1c e1          	pabsb  mm4,mm1
    10:	0f 38 1c e9          	pabsb  mm5,mm1
    14:	0f 38 1c f1          	pabsb  mm6,mm1
    18:	0f 38 1c f9          	pabsb  mm7,mm1
    1c:	0f 38 1c c1          	pabsb  mm0,mm1
    20:	0f 38 1c d1          	pabsb  mm2,mm1
    24:	0f 38 1c d9          	pabsb  mm3,mm1
    28:	0f 38 1c e1          	pabsb  mm4,mm1
    2c:	0f 38 1c e9          	pabsb  mm5,mm1
    30:	0f 38 1c f1          	pabsb  mm6,mm1
    34:	0f 38 1c f9          	pabsb  mm7,mm1
    38:	0f 38 1c c1          	pabsb  mm0,mm1
    3c:	0f 38 1c d1          	pabsb  mm2,mm1
    40:	0f 38 1c d9          	pabsb  mm3,mm1
    44:	0f 38 1c e1          	pabsb  mm4,mm1
    48:	0f 38 1c e9          	pabsb  mm5,mm1
    4c:	0f 38 1c f1          	pabsb  mm6,mm1
    50:	0f 38 1c f9          	pabsb  mm7,mm1
    54:	0f 38 1c c1          	pabsb  mm0,mm1
    58:	0f 38 1c d1          	pabsb  mm2,mm1
    5c:	0f 38 1c d9          	pabsb  mm3,mm1
    60:	0f 38 1c e1          	pabsb  mm4,mm1
    64:	0f 38 1c e9          	pabsb  mm5,mm1
    68:	0f 38 1c f1          	pabsb  mm6,mm1
    6c:	0f 38 1c f9          	pabsb  mm7,mm1
    70:	0f 38 1c c1          	pabsb  mm0,mm1
    74:	0f 38 1c d1          	pabsb  mm2,mm1
    78:	0f 38 1c d9          	pabsb  mm3,mm1
    7c:	0f 38 1c e1          	pabsb  mm4,mm1
    80:	0f 38 1c e9          	pabsb  mm5,mm1
    84:	0f 38 1c f1          	pabsb  mm6,mm1
    88:	0f 38 1c f9          	pabsb  mm7,mm1
    8c:	0f 38 1c c1          	pabsb  mm0,mm1
    90:	0f 38 1c d1          	pabsb  mm2,mm1
    94:	0f 38 1c d9          	pabsb  mm3,mm1
    98:	0f 38 1c e1          	pabsb  mm4,mm1
    9c:	0f 38 1c e9          	pabsb  mm5,mm1
    a0:	0f 10 d1             	movups xmm2,xmm1
    a3:	41 0f 5e 16          	divps  xmm2,XMMWORD PTR [r14]
  

• Init:

  VZEROALL;
  PXOR MM1, MM1;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOVUPS XMM0, [R14];
  MOVUPS XMM1, [R14+64];
  MOVUPS XMM2, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 42.0
  • Core cycles: 21.12
  • Reference cycles: 21.08
  • UOPS_PORT_5: 20.48
  • UOPS_PORT_1: 20.48

With blocking instructions for ports {'2', '3'}:

• Code:

     0:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
     6:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
     c:	f2 41 0f f0 5e 60    	lddqu  xmm3,[r14+0x60]
    12:	f2 41 0f f0 66 70    	lddqu  xmm4,[r14+0x70]
    18:	f2 41 0f f0 ae 80 00 	lddqu  xmm5,[r14+0x80]
    1f:	00 00 
    21:	f2 41 0f f0 b6 90 00 	lddqu  xmm6,[r14+0x90]
    28:	00 00 
    2a:	f2 41 0f f0 be a0 00 	lddqu  xmm7,[r14+0xa0]
    31:	00 00 
    33:	f2 45 0f f0 86 b0 00 	lddqu  xmm8,[r14+0xb0]
    3a:	00 00 
    3c:	f2 45 0f f0 8e c0 00 	lddqu  xmm9,[r14+0xc0]
    43:	00 00 
    45:	f2 45 0f f0 96 d0 00 	lddqu  xmm10,[r14+0xd0]
    4c:	00 00 
    4e:	f2 45 0f f0 9e e0 00 	lddqu  xmm11,[r14+0xe0]
    55:	00 00 
    57:	f2 45 0f f0 a6 f0 00 	lddqu  xmm12,[r14+0xf0]
    5e:	00 00 
    60:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
    66:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
    6c:	f2 41 0f f0 5e 60    	lddqu  xmm3,[r14+0x60]
    72:	f2 41 0f f0 66 70    	lddqu  xmm4,[r14+0x70]
    78:	f2 41 0f f0 ae 80 00 	lddqu  xmm5,[r14+0x80]
    7f:	00 00 
    81:	f2 41 0f f0 b6 90 00 	lddqu  xmm6,[r14+0x90]
    88:	00 00 
    8a:	f2 41 0f f0 be a0 00 	lddqu  xmm7,[r14+0xa0]
    91:	00 00 
    93:	f2 45 0f f0 86 b0 00 	lddqu  xmm8,[r14+0xb0]
    9a:	00 00 
    9c:	f2 45 0f f0 8e c0 00 	lddqu  xmm9,[r14+0xc0]
    a3:	00 00 
    a5:	f2 45 0f f0 96 d0 00 	lddqu  xmm10,[r14+0xd0]
    ac:	00 00 
    ae:	f2 45 0f f0 9e e0 00 	lddqu  xmm11,[r14+0xe0]
    b5:	00 00 
    b7:	f2 45 0f f0 a6 f0 00 	lddqu  xmm12,[r14+0xf0]
    be:	00 00 
    c0:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
    c6:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
    cc:	f2 41 0f f0 5e 60    	lddqu  xmm3,[r14+0x60]
    d2:	f2 41 0f f0 66 70    	lddqu  xmm4,[r14+0x70]
    d8:	f2 41 0f f0 ae 80 00 	lddqu  xmm5,[r14+0x80]
    df:	00 00 
    e1:	f2 41 0f f0 b6 90 00 	lddqu  xmm6,[r14+0x90]
    e8:	00 00 
    ea:	f2 41 0f f0 be a0 00 	lddqu  xmm7,[r14+0xa0]
    f1:	00 00 
    f3:	f2 45 0f f0 86 b0 00 	lddqu  xmm8,[r14+0xb0]
    fa:	00 00 
    fc:	f2 45 0f f0 8e c0 00 	lddqu  xmm9,[r14+0xc0]
   103:	00 00 
   105:	f2 45 0f f0 96 d0 00 	lddqu  xmm10,[r14+0xd0]
   10c:	00 00 
   10e:	f2 45 0f f0 9e e0 00 	lddqu  xmm11,[r14+0xe0]
   115:	00 00 
   117:	f2 45 0f f0 a6 f0 00 	lddqu  xmm12,[r14+0xf0]
   11e:	00 00 
   120:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
   126:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
   12c:	f2 41 0f f0 5e 60    	lddqu  xmm3,[r14+0x60]
   132:	f2 41 0f f0 66 70    	lddqu  xmm4,[r14+0x70]
   138:	0f 10 d1             	movups xmm2,xmm1
   13b:	41 0f 5e 16          	divps  xmm2,XMMWORD PTR [r14]
  

• Init:

  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOVUPS XMM0, [R14];
  MOVUPS XMM1, [R14+64];
  MOVUPS XMM2, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 42.0
  • Core cycles: 21.32
  • Reference cycles: 21.53
  • UOPS_PORT_2: 20.48
  • UOPS_PORT_3: 20.48