DIVPS (XMM, M128)

Experiment 1

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: EXTRACTPS R12D, XMM3, 2; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 3a 17 dc 02 	extractps r12d,xmm3,0x2
   b:	0f 10 d9             	movups xmm3,xmm1
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12
  29:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 33.0
- Reference cycles: 27.57
- UOPS_RETIRED.ANY: 14.0

Experiment 2

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: MOVD R12D, XMM3; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 7e dc       	movd   r12d,xmm3
   9:	0f 10 d9             	movups xmm3,xmm1
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12
  27:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 33.0
- Reference cycles: 27.5
- UOPS_RETIRED.ANY: 14.0

Experiment 3

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: MOVMSKPS R12D, XMM3; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	44 0f 50 e3          	movmskps r12d,xmm3
   8:	0f 10 d9             	movups xmm3,xmm1
   b:	4d 31 e6             	xor    r14,r12
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 33.0
- Reference cycles: 27.5
- UOPS_RETIRED.ANY: 14.0

Experiment 4

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: MOVQ R12, XMM3; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 49 0f 7e dc       	movq   r12,xmm3
   9:	0f 10 d9             	movups xmm3,xmm1
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12
  27:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 33.0
- Reference cycles: 27.5
- UOPS_RETIRED.ANY: 14.0

Experiment 5

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRB R12D, XMM3, 2; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 3a 14 dc 02 	pextrb r12d,xmm3,0x2
   b:	0f 10 d9             	movups xmm3,xmm1
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12
  29:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 35.0
- Reference cycles: 29.17
- UOPS_RETIRED.ANY: 15.0

Experiment 6

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRD R12D, XMM3, 2; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 3a 16 dc 02 	pextrd r12d,xmm3,0x2
   b:	0f 10 d9             	movups xmm3,xmm1
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12
  29:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 35.0
- Reference cycles: 29.17
- UOPS_RETIRED.ANY: 15.0

Experiment 7

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRQ R12, XMM3, 2; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 49 0f 3a 16 dc 02 	pextrq r12,xmm3,0x2
   b:	0f 10 d9             	movups xmm3,xmm1
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12
  29:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 35.0
- Reference cycles: 29.17
- UOPS_RETIRED.ANY: 15.0

Experiment 8

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRW R12D, XMM3, 2; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 44 0f c5 e3 02    	pextrw r12d,xmm3,0x2
   a:	0f 10 d9             	movups xmm3,xmm1
   d:	4d 31 e6             	xor    r14,r12
  10:	4d 31 e6             	xor    r14,r12
  13:	4d 31 e6             	xor    r14,r12
  16:	4d 31 e6             	xor    r14,r12
  19:	4d 31 e6             	xor    r14,r12
  1c:	4d 31 e6             	xor    r14,r12
  1f:	4d 31 e6             	xor    r14,r12
  22:	4d 31 e6             	xor    r14,r12
  25:	4d 31 e6             	xor    r14,r12
  28:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 35.0
- Reference cycles: 29.1
- UOPS_RETIRED.ANY: 15.0

Experiment 9

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PMOVMSKB R12D, XMM3; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 44 0f d7 e3       	pmovmskb r12d,xmm3
   9:	0f 10 d9             	movups xmm3,xmm1
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12
  27:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 33.0
- Reference cycles: 27.5
- UOPS_RETIRED.ANY: 14.0

Experiment 10

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: EXTRACTPS R12D, XMM3, 2; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 3a 17 dc 02 	extractps r12d,xmm3,0x2
   b:	4d 31 e6             	xor    r14,r12
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 26.0
- Reference cycles: 21.7
- UOPS_RETIRED.ANY: 13.0

Experiment 11

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: MOVD R12D, XMM3; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 7e dc       	movd   r12d,xmm3
   9:	4d 31 e6             	xor    r14,r12
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 26.0
- Reference cycles: 21.73
- UOPS_RETIRED.ANY: 13.0

Experiment 12

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: MOVMSKPS R12D, XMM3; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	44 0f 50 e3          	movmskps r12d,xmm3
   8:	4d 31 e6             	xor    r14,r12
   b:	4d 31 e6             	xor    r14,r12
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 26.0
- Reference cycles: 21.63
- UOPS_RETIRED.ANY: 13.0

Experiment 13

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: MOVQ R12, XMM3; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 49 0f 7e dc       	movq   r12,xmm3
   9:	4d 31 e6             	xor    r14,r12
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 26.0
- Reference cycles: 21.63
- UOPS_RETIRED.ANY: 13.0

Experiment 14

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRB R12D, XMM3, 2; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 3a 14 dc 02 	pextrb r12d,xmm3,0x2
   b:	4d 31 e6             	xor    r14,r12
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 28.0
- Reference cycles: 23.3
- UOPS_RETIRED.ANY: 14.0

Experiment 15

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRD R12D, XMM3, 2; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 3a 16 dc 02 	pextrd r12d,xmm3,0x2
   b:	4d 31 e6             	xor    r14,r12
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 28.0
- Reference cycles: 23.33
- UOPS_RETIRED.ANY: 14.0

Experiment 16

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRQ R12, XMM3, 2; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 49 0f 3a 16 dc 02 	pextrq r12,xmm3,0x2
   b:	4d 31 e6             	xor    r14,r12
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 28.0
- Reference cycles: 23.33
- UOPS_RETIRED.ANY: 14.0

Experiment 17

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRW R12D, XMM3, 2; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 44 0f c5 e3 02    	pextrw r12d,xmm3,0x2
   a:	4d 31 e6             	xor    r14,r12
   d:	4d 31 e6             	xor    r14,r12
  10:	4d 31 e6             	xor    r14,r12
  13:	4d 31 e6             	xor    r14,r12
  16:	4d 31 e6             	xor    r14,r12
  19:	4d 31 e6             	xor    r14,r12
  1c:	4d 31 e6             	xor    r14,r12
  1f:	4d 31 e6             	xor    r14,r12
  22:	4d 31 e6             	xor    r14,r12
  25:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 28.0
- Reference cycles: 23.27
- UOPS_RETIRED.ANY: 14.0

Experiment 18

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PMOVMSKB R12D, XMM3; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 44 0f d7 e3       	pmovmskb r12d,xmm3
   9:	4d 31 e6             	xor    r14,r12
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 26.0
- Reference cycles: 21.7
- UOPS_RETIRED.ANY: 13.0

Experiment 1

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: EXTRACTPS R12D, XMM3, 2; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 3a 17 dc 02 	extractps r12d,xmm3,0x2
   b:	0f 10 d9             	movups xmm3,xmm1
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12
  29:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 33.0
- Reference cycles: 27.53
- UOPS_RETIRED.ANY: 14.0

Experiment 2

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: MOVD R12D, XMM3; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 7e dc       	movd   r12d,xmm3
   9:	0f 10 d9             	movups xmm3,xmm1
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12
  27:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 33.0
- Reference cycles: 27.47
- UOPS_RETIRED.ANY: 14.0

Experiment 3

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: MOVMSKPS R12D, XMM3; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	44 0f 50 e3          	movmskps r12d,xmm3
   8:	0f 10 d9             	movups xmm3,xmm1
   b:	4d 31 e6             	xor    r14,r12
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 33.0
- Reference cycles: 27.47
- UOPS_RETIRED.ANY: 14.0

Experiment 4

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: MOVQ R12, XMM3; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 49 0f 7e dc       	movq   r12,xmm3
   9:	0f 10 d9             	movups xmm3,xmm1
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12
  27:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 33.0
- Reference cycles: 27.5
- UOPS_RETIRED.ANY: 14.0

Experiment 5

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRB R12D, XMM3, 2; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 3a 14 dc 02 	pextrb r12d,xmm3,0x2
   b:	0f 10 d9             	movups xmm3,xmm1
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12
  29:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 35.0
- Reference cycles: 29.13
- UOPS_RETIRED.ANY: 15.0

Experiment 6

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRD R12D, XMM3, 2; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 3a 16 dc 02 	pextrd r12d,xmm3,0x2
   b:	0f 10 d9             	movups xmm3,xmm1
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12
  29:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 35.0
- Reference cycles: 29.13
- UOPS_RETIRED.ANY: 15.0

Experiment 7

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRQ R12, XMM3, 2; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 49 0f 3a 16 dc 02 	pextrq r12,xmm3,0x2
   b:	0f 10 d9             	movups xmm3,xmm1
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12
  29:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 35.0
- Reference cycles: 29.13
- UOPS_RETIRED.ANY: 15.0

Experiment 8

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRW R12D, XMM3, 2; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 44 0f c5 e3 02    	pextrw r12d,xmm3,0x2
   a:	0f 10 d9             	movups xmm3,xmm1
   d:	4d 31 e6             	xor    r14,r12
  10:	4d 31 e6             	xor    r14,r12
  13:	4d 31 e6             	xor    r14,r12
  16:	4d 31 e6             	xor    r14,r12
  19:	4d 31 e6             	xor    r14,r12
  1c:	4d 31 e6             	xor    r14,r12
  1f:	4d 31 e6             	xor    r14,r12
  22:	4d 31 e6             	xor    r14,r12
  25:	4d 31 e6             	xor    r14,r12
  28:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 35.0
- Reference cycles: 29.13
- UOPS_RETIRED.ANY: 15.0

Experiment 9

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PMOVMSKB R12D, XMM3; MOVUPS XMM3, XMM1; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 44 0f d7 e3       	pmovmskb r12d,xmm3
   9:	0f 10 d9             	movups xmm3,xmm1
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12
  27:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x54ed392654ed3926;
MOV RBX, 0x3f99f4c03f99f4c0;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 33.0
- Reference cycles: 27.5
- UOPS_RETIRED.ANY: 14.0

Experiment 10

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: EXTRACTPS R12D, XMM3, 2; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 3a 17 dc 02 	extractps r12d,xmm3,0x2
   b:	4d 31 e6             	xor    r14,r12
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 26.0
- Reference cycles: 21.73
- UOPS_RETIRED.ANY: 13.0

Experiment 11

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: MOVD R12D, XMM3; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 7e dc       	movd   r12d,xmm3
   9:	4d 31 e6             	xor    r14,r12
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 26.0
- Reference cycles: 21.7
- UOPS_RETIRED.ANY: 13.0

Experiment 12

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: MOVMSKPS R12D, XMM3; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	44 0f 50 e3          	movmskps r12d,xmm3
   8:	4d 31 e6             	xor    r14,r12
   b:	4d 31 e6             	xor    r14,r12
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 26.0
- Reference cycles: 21.63
- UOPS_RETIRED.ANY: 13.0

Experiment 13

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: MOVQ R12, XMM3; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 49 0f 7e dc       	movq   r12,xmm3
   9:	4d 31 e6             	xor    r14,r12
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 26.0
- Reference cycles: 21.67
- UOPS_RETIRED.ANY: 13.0

Experiment 14

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRB R12D, XMM3, 2; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 3a 14 dc 02 	pextrb r12d,xmm3,0x2
   b:	4d 31 e6             	xor    r14,r12
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 28.0
- Reference cycles: 23.27
- UOPS_RETIRED.ANY: 14.0

Experiment 15

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRD R12D, XMM3, 2; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 41 0f 3a 16 dc 02 	pextrd r12d,xmm3,0x2
   b:	4d 31 e6             	xor    r14,r12
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 28.0
- Reference cycles: 23.3
- UOPS_RETIRED.ANY: 14.0

Experiment 16

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRQ R12, XMM3, 2; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 49 0f 3a 16 dc 02 	pextrq r12,xmm3,0x2
   b:	4d 31 e6             	xor    r14,r12
   e:	4d 31 e6             	xor    r14,r12
  11:	4d 31 e6             	xor    r14,r12
  14:	4d 31 e6             	xor    r14,r12
  17:	4d 31 e6             	xor    r14,r12
  1a:	4d 31 e6             	xor    r14,r12
  1d:	4d 31 e6             	xor    r14,r12
  20:	4d 31 e6             	xor    r14,r12
  23:	4d 31 e6             	xor    r14,r12
  26:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 28.0
- Reference cycles: 23.27
- UOPS_RETIRED.ANY: 14.0

Experiment 17

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PEXTRW R12D, XMM3, 2; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 44 0f c5 e3 02    	pextrw r12d,xmm3,0x2
   a:	4d 31 e6             	xor    r14,r12
   d:	4d 31 e6             	xor    r14,r12
  10:	4d 31 e6             	xor    r14,r12
  13:	4d 31 e6             	xor    r14,r12
  16:	4d 31 e6             	xor    r14,r12
  19:	4d 31 e6             	xor    r14,r12
  1c:	4d 31 e6             	xor    r14,r12
  1f:	4d 31 e6             	xor    r14,r12
  22:	4d 31 e6             	xor    r14,r12
  25:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 28.0
- Reference cycles: 23.23
- UOPS_RETIRED.ANY: 14.0

Experiment 18

Instruction: DIVPS XMM3, xmmword ptr [R14]
Chain instructions: PMOVMSKB R12D, XMM3; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12;
Chain latency: ≥11

Code:

   0:	41 0f 5e 1e          	divps  xmm3,XMMWORD PTR [r14]
   4:	66 44 0f d7 e3       	pmovmskb r12d,xmm3
   9:	4d 31 e6             	xor    r14,r12
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, [R14];
MOVUPS XMM3, [R14+64];
MOVUPS XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 26.0
- Reference cycles: 21.7
- UOPS_RETIRED.ANY: 13.0

DIVPS (XMM, M128) - Latency

Operands

Latency operand 1 → 1: ≤7

Latency operand 2 → 1 (address, base register): ≤15

Latency operand 2 → 1 (address, index register): ≤15

Latency operand 1 → 1: ≤7

Experiment 1

Experiment 2

Experiment 3

Latency operand 2 → 1 (address, base register): ≤15

Experiment 1

Experiment 2

Experiment 3

Experiment 4

Experiment 5

Experiment 6

Experiment 7

Experiment 8

Experiment 9

Experiment 10

Experiment 11

Experiment 12

Experiment 13

Experiment 14

Experiment 15

Experiment 16

Experiment 17

Experiment 18

Latency operand 2 → 1 (address, index register): ≤15

Experiment 1

Experiment 2

Experiment 3

Experiment 4

Experiment 5

Experiment 6

Experiment 7

Experiment 8

Experiment 9

Experiment 10

Experiment 11

Experiment 12

Experiment 13

Experiment 14

Experiment 15

Experiment 16

Experiment 17

Experiment 18