DIVPS (XMM, M128) - Port Usage (IACA 3.0)


With blocking instructions for port '0':

Throughput Analysis Report
--------------------------
Block Throughput: 23.00 Cycles       Throughput Bottleneck: Backend
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles | 23.0     3.0  |  0.0  |  0.5     0.5  |  0.5     0.5  |  0.0  |  0.0  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      | 1.0         |      |             |             |      |      |      |      | movd r8d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r9d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r10d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r11d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r12d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd ebx, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd ecx, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd edx, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r8d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r9d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r10d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r11d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r12d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd ebx, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd ecx, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd edx, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r8d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r9d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r10d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r11d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r12d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd ebx, mmx0
|   2^     | 1.0     3.0 |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | divps xmm2, xmmword ptr [r14]
Total Num Of Uops: 24
⇨ One μop that can only use port '0'

With blocking instructions for ports {'2', '3'}:

Throughput Analysis Report
--------------------------
Block Throughput: 22.53 Cycles       Throughput Bottleneck: Backend
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  1.0     3.0  |  0.0  | 22.5    22.5  | 22.5    22.5  |  0.0  |  0.0  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   2^     | 1.0     3.0 |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | divps xmm2, xmmword ptr [r14]
Total Num Of Uops: 46
⇨ One μop that can only use ports {'2', '3'}

With an indexed addressing mode


With blocking instructions for port '0':

Throughput Analysis Report
--------------------------
Block Throughput: 23.00 Cycles       Throughput Bottleneck: Backend
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles | 23.0     3.0  |  0.0  |  0.5     0.5  |  0.5     0.5  |  0.0  |  0.0  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      | 1.0         |      |             |             |      |      |      |      | movd r8d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r9d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r10d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r11d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r12d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd ebx, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd ecx, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd edx, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r8d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r9d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r10d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r11d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r12d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd ebx, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd ecx, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd edx, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r8d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r9d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r10d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r11d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd r12d, mmx0
|   1      | 1.0         |      |             |             |      |      |      |      | movd ebx, mmx0
|   2^     | 1.0     3.0 |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | divps xmm2, xmmword ptr [r14]
Total Num Of Uops: 24
⇨ One μop that can only use port '0'

With blocking instructions for ports {'2', '3'}:

Throughput Analysis Report
--------------------------
Block Throughput: 22.53 Cycles       Throughput Bottleneck: Backend
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  1.0     3.0  |  0.0  | 22.5    22.5  | 22.5    22.5  |  0.0  |  0.0  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   2^     | 1.0     3.0 |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | divps xmm2, xmmword ptr [r14]
Total Num Of Uops: 46
⇨ One μop that can only use ports {'2', '3'}