DIVPS (XMM, M128) - Port Usage

With blocking instructions for port '0':

Code:

   0:	66 44 0f 50 c0       	movmskpd r8d,xmm0
   5:	66 44 0f 50 c8       	movmskpd r9d,xmm0
   a:	66 44 0f 50 d0       	movmskpd r10d,xmm0
   f:	66 44 0f 50 d8       	movmskpd r11d,xmm0
  14:	66 44 0f 50 e0       	movmskpd r12d,xmm0
  19:	66 0f 50 d8          	movmskpd ebx,xmm0
  1d:	66 0f 50 c8          	movmskpd ecx,xmm0
  21:	66 0f 50 d0          	movmskpd edx,xmm0
  25:	66 44 0f 50 c0       	movmskpd r8d,xmm0
  2a:	66 44 0f 50 c8       	movmskpd r9d,xmm0
  2f:	66 44 0f 50 d0       	movmskpd r10d,xmm0
  34:	66 44 0f 50 d8       	movmskpd r11d,xmm0
  39:	66 44 0f 50 e0       	movmskpd r12d,xmm0
  3e:	66 0f 50 d8          	movmskpd ebx,xmm0
  42:	0f 10 d1             	movups xmm2,xmm1
  45:	41 0f 5e 16          	divps  xmm2,XMMWORD PTR [r14]

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+16], RBX;
MOV [R14+24], RBX;
MOV [R14+32], RBX;
MOV [R14+40], RBX;
MOV [R14+48], RBX;
MOV [R14+56], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOVUPS XMM0, [R14];
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, XMM1

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 16.01
- Reference cycles: 14.7
- UOPS_PORT_0: 15.01
- UOPS_PORT_1: -0.02
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_RETIRED.ANY: 17.0

⇨ One μop that can only use port '0'

With blocking instructions for port '2':

Code:

   0:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
   6:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
   c:	f2 41 0f f0 5e 60    	lddqu  xmm3,[r14+0x60]
  12:	f2 41 0f f0 66 70    	lddqu  xmm4,[r14+0x70]
  18:	f2 41 0f f0 ae 80 00 	lddqu  xmm5,[r14+0x80]
  1f:	00 00 
  21:	f2 41 0f f0 b6 90 00 	lddqu  xmm6,[r14+0x90]
  28:	00 00 
  2a:	f2 41 0f f0 be a0 00 	lddqu  xmm7,[r14+0xa0]
  31:	00 00 
  33:	f2 45 0f f0 86 b0 00 	lddqu  xmm8,[r14+0xb0]
  3a:	00 00 
  3c:	f2 45 0f f0 8e c0 00 	lddqu  xmm9,[r14+0xc0]
  43:	00 00 
  45:	f2 45 0f f0 96 d0 00 	lddqu  xmm10,[r14+0xd0]
  4c:	00 00 
  4e:	f2 45 0f f0 9e e0 00 	lddqu  xmm11,[r14+0xe0]
  55:	00 00 
  57:	f2 45 0f f0 a6 f0 00 	lddqu  xmm12,[r14+0xf0]
  5e:	00 00 
  60:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
  66:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
  6c:	0f 10 d1             	movups xmm2,xmm1
  6f:	41 0f 5e 16          	divps  xmm2,XMMWORD PTR [r14]

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+16], RBX;
MOV [R14+24], RBX;
MOV [R14+32], RBX;
MOV [R14+40], RBX;
MOV [R14+48], RBX;
MOV [R14+56], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOVUPS XMM0, [R14];
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, XMM1

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 15.15
- Reference cycles: 14.08
- UOPS_PORT_0: 1.0
- UOPS_PORT_1: 0.01
- UOPS_PORT_2: 15.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_RETIRED.ANY: 17.0

⇨ One μop that can only use port '2'

With an indexed addressing mode

With blocking instructions for port '0':

Code:

   0:	66 44 0f 50 c0       	movmskpd r8d,xmm0
   5:	66 44 0f 50 c8       	movmskpd r9d,xmm0
   a:	66 44 0f 50 d0       	movmskpd r10d,xmm0
   f:	66 44 0f 50 d8       	movmskpd r11d,xmm0
  14:	66 44 0f 50 e0       	movmskpd r12d,xmm0
  19:	66 0f 50 d8          	movmskpd ebx,xmm0
  1d:	66 0f 50 c8          	movmskpd ecx,xmm0
  21:	66 0f 50 d0          	movmskpd edx,xmm0
  25:	66 44 0f 50 c0       	movmskpd r8d,xmm0
  2a:	66 44 0f 50 c8       	movmskpd r9d,xmm0
  2f:	66 44 0f 50 d0       	movmskpd r10d,xmm0
  34:	66 44 0f 50 d8       	movmskpd r11d,xmm0
  39:	66 44 0f 50 e0       	movmskpd r12d,xmm0
  3e:	66 0f 50 d8          	movmskpd ebx,xmm0
  42:	0f 10 d1             	movups xmm2,xmm1
  45:	41 0f 5e 16          	divps  xmm2,XMMWORD PTR [r14]

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+16], RBX;
MOV [R14+24], RBX;
MOV [R14+32], RBX;
MOV [R14+40], RBX;
MOV [R14+48], RBX;
MOV [R14+56], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOVUPS XMM0, [R14];
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, XMM1

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 16.01
- Reference cycles: 14.76
- UOPS_PORT_0: 15.01
- UOPS_PORT_1: -0.02
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_RETIRED.ANY: 17.0

⇨ One μop that can only use port '0'

With blocking instructions for port '2':

Code:

   0:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
   6:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
   c:	f2 41 0f f0 5e 60    	lddqu  xmm3,[r14+0x60]
  12:	f2 41 0f f0 66 70    	lddqu  xmm4,[r14+0x70]
  18:	f2 41 0f f0 ae 80 00 	lddqu  xmm5,[r14+0x80]
  1f:	00 00 
  21:	f2 41 0f f0 b6 90 00 	lddqu  xmm6,[r14+0x90]
  28:	00 00 
  2a:	f2 41 0f f0 be a0 00 	lddqu  xmm7,[r14+0xa0]
  31:	00 00 
  33:	f2 45 0f f0 86 b0 00 	lddqu  xmm8,[r14+0xb0]
  3a:	00 00 
  3c:	f2 45 0f f0 8e c0 00 	lddqu  xmm9,[r14+0xc0]
  43:	00 00 
  45:	f2 45 0f f0 96 d0 00 	lddqu  xmm10,[r14+0xd0]
  4c:	00 00 
  4e:	f2 45 0f f0 9e e0 00 	lddqu  xmm11,[r14+0xe0]
  55:	00 00 
  57:	f2 45 0f f0 a6 f0 00 	lddqu  xmm12,[r14+0xf0]
  5e:	00 00 
  60:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
  66:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
  6c:	0f 10 d1             	movups xmm2,xmm1
  6f:	41 0f 5e 16          	divps  xmm2,XMMWORD PTR [r14]

Init:

MOV RAX, 0x3f8000003f800000;
MOV RBX, 0x3f8000003f800000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+16], RBX;
MOV [R14+24], RBX;
MOV [R14+32], RBX;
MOV [R14+40], RBX;
MOV [R14+48], RBX;
MOV [R14+56], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOVUPS XMM0, [R14];
MOVUPS XMM1, [R14+64];
MOVUPS XMM2, XMM1

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 15.15
- Reference cycles: 14.08
- UOPS_PORT_0: 1.0
- UOPS_PORT_1: 0.01
- UOPS_PORT_2: 15.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_RETIRED.ANY: 17.0

⇨ One μop that can only use port '2'