VPTERNLOGD (XMM, XMM, XMM, I8)

Operands

• Operand 1 (r/w): Register (XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, XMM16, XMM17, XMM18, XMM19, XMM20, XMM21, XMM22, XMM23, XMM24, XMM25, XMM26, XMM27, XMM28, XMM29, XMM30, XMM31)
• Operand 2 (r): Register (XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, XMM16, XMM17, XMM18, XMM19, XMM20, XMM21, XMM22, XMM23, XMM24, XMM25, XMM26, XMM27, XMM28, XMM29, XMM30, XMM31)
• Operand 3 (r): Register (XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, XMM16, XMM17, XMM18, XMM19, XMM20, XMM21, XMM22, XMM23, XMM24, XMM25, XMM26, XMM27, XMM28, XMM29, XMM30, XMM31)
• Operand 4 (r): 8-bit immediate

Available performance data

• Alder Lake-P
• Rocket Lake
• Tiger Lake
• Ice Lake
• Cascade Lake
• Cannon Lake
• Skylake-X
• AMD Zen 4

Alder Lake-P

• Measurements
• Latencies
  • Latency operand 1 → 1: 1
  • Latency operand 2 → 1: 1
  • Latency operand 3 → 1: 1
• Throughput
  • Computed from the port usage: 0.33
  • Measured (loop): 0.33
  • Measured (unrolled): 0.33
• Number of μops
  • Executed: 1
  • Retire slots: 1
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p015

Rocket Lake

• Measurements
• Latencies
  • Latency operand 1 → 1: 1
  • Latency operand 2 → 1: 1
  • Latency operand 3 → 1: 1
• Throughput
  • Computed from the port usage: 0.33
  • Measured (loop): 0.33
  • Measured (unrolled): 0.44
• Number of μops
  • Executed: 1
  • Retire slots: 1
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p015

Tiger Lake

• Measurements
• Latencies
  • Latency operand 1 → 1: 1
  • Latency operand 2 → 1: 1
  • Latency operand 3 → 1: 1
• Throughput
  • Computed from the port usage: 0.33
  • Measured (loop): 0.33
  • Measured (unrolled): 0.44
• Number of μops
  • Executed: 1
  • Retire slots: 1
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p015

Ice Lake

• Measurements
• Latencies
  • Latency operand 1 → 1: 1
  • Latency operand 2 → 1: 1
  • Latency operand 3 → 1: 1
• Throughput
  • Computed from the port usage: 0.33
  • Measured (loop): 0.33
  • Measured (unrolled): 0.44
• Number of μops
  • Executed: 1
  • Retire slots: 1
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p015
• Documentation
• Latency: 1.0
• Throughput: 0.33

Cascade Lake

• Measurements
• Latencies
  • Latency operand 1 → 1: 1
  • Latency operand 2 → 1: 1
  • Latency operand 3 → 1: 1
• Throughput
  • Computed from the port usage: 0.33
  • Measured (loop): 0.33
  • Measured (unrolled): 0.44
• Number of μops
  • Executed: 1
  • Retire slots: 1
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p015

Cannon Lake

• Measurements
• Latencies
  • Latency operand 1 → 1: 1
  • Latency operand 2 → 1: 1
  • Latency operand 3 → 1: 1
• Throughput
  • Computed from the port usage: 0.33
  • Measured (loop): 0.33
  • Measured (unrolled): 0.44
• Number of μops
  • Executed: 1
  • Retire slots: 1
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p015

Skylake-X

• Measurements
• Latencies
  • Latency operand 1 → 1: 1
  • Latency operand 2 → 1: 1
  • Latency operand 3 → 1: 1
• Throughput
  • Computed from the port usage: 0.33
  • Measured (loop): 0.33
  • Measured (unrolled): 0.43
• Number of μops
  • Executed: 1
  • Retire slots: 1
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p015
• IACA 2.3
• Throughput
  • Computed from the port usage: 0.33
  • IACA: 0.33
• Number of μops: 1
• Port usage: 1*p015
• IACA 3.0
• Throughput
  • Computed from the port usage: 0.33
  • IACA: 0.33
• Number of μops: 1
• Port usage: 1*p015

AMD Zen 4

• Measurements
• Latencies
  • Latency operand 1 → 1: 1
  • Latency operand 2 → 1: 2
  • Latency operand 3 → 1: 2
• Throughput
  • Computed from the port usage: 0.25
  • Measured (loop): 0.25
  • Measured (unrolled): 0.44
• Number of μops
  • Executed: 1
• Port usage: 1*FP0123