VPTERNLOGD (XMM, XMM, XMM, I8) - Throughput and Uops (IACA 2.3)


With different registers for different operands

With 1 independent instruction

Throughput Analysis Report
--------------------------
Block Throughput: 0.95 Cycles       Throughput Bottleneck: FrontEnd

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 0.3    0.0  | 0.3  | 0.0    0.0  | 0.0    0.0  | 0.0  | 0.3  | 0.0  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm0, xmm1, xmm2, 0x2
Total Num Of Uops: 1

With 16 independent instructions


Throughput Analysis Report
--------------------------
Block Throughput: 5.35 Cycles       Throughput Bottleneck: Backend. Port0, Port1, Port5

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 5.3    0.0  | 5.3  | 0.0    0.0  | 0.0    0.0  | 0.0  | 5.3  | 0.0  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm0, xmm1, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm3, xmm1, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm4, xmm1, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm5, xmm1, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm6, xmm1, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm7, xmm1, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm8, xmm1, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm9, xmm1, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm10, xmm1, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm11, xmm1, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm12, xmm1, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm16, xmm1, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm17, xmm1, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm18, xmm1, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm19, xmm1, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm20, xmm1, xmm2, 0x2
Total Num Of Uops: 16

With the same register for for different operands

With 1 independent instruction

Throughput Analysis Report
--------------------------
Block Throughput: 0.95 Cycles       Throughput Bottleneck: FrontEnd

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 0.3    0.0  | 0.3  | 0.0    0.0  | 0.0    0.0  | 0.0  | 0.3  | 0.0  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm0, xmm0, xmm0, 0x2
Total Num Of Uops: 1

With 16 independent instructions


Throughput Analysis Report
--------------------------
Block Throughput: 5.35 Cycles       Throughput Bottleneck: Backend. Port0, Port1, Port5

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 5.3    0.0  | 5.3  | 0.0    0.0  | 0.0    0.0  | 0.0  | 5.3  | 0.0  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm0, xmm0, xmm0, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm1, xmm1, xmm1, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm2, xmm2, xmm2, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm3, xmm3, xmm3, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm4, xmm4, xmm4, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm5, xmm5, xmm5, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm6, xmm6, xmm6, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm7, xmm7, xmm7, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm8, xmm8, xmm8, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm9, xmm9, xmm9, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm10, xmm10, xmm10, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm11, xmm11, xmm11, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm12, xmm12, xmm12, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm16, xmm16, xmm16, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm17, xmm17, xmm17, 0x2
|   1    | 0.3       | 0.3 |           |           |     | 0.3 |     |     | CP | vpternlogd xmm18, xmm18, xmm18, 0x2
Total Num Of Uops: 16