VPSLLVQ (YMM, YMM, YMM)
Summary:
"Variable Bit Shift Left Logical"
Reference:
https://www.felixcloutier.com/x86/VPSLLVW:VPSLLVD:VPSLLVQ.html
Extension:
AVX2
Category:
AVX2
ISA-Set:
AVX2
CPL:
3
iform:
VPSLLVQ_YMMqq_YMMqq_YMMqq
iclass:
VPSLLVQ
ASM:
VPSLLVQ
Operands
Operand 1 (w): Register (YMM0, YMM1, YMM2, YMM3, YMM4, YMM5, YMM6, YMM7, YMM8, YMM9, YMM10, YMM11, YMM12, YMM13, YMM14, YMM15)
Operand 2 (r): Register (YMM0, YMM1, YMM2, YMM3, YMM4, YMM5, YMM6, YMM7, YMM8, YMM9, YMM10, YMM11, YMM12, YMM13, YMM14, YMM15)
Operand 3 (r): Register (YMM0, YMM1, YMM2, YMM3, YMM4, YMM5, YMM6, YMM7, YMM8, YMM9, YMM10, YMM11, YMM12, YMM13, YMM14, YMM15)
Available performance data
Alder Lake-P
Alder Lake-E
Rocket Lake
Tiger Lake
Ice Lake
Cascade Lake
Cannon Lake
Skylake-X
Coffee Lake
Kaby Lake
Skylake
Broadwell
Haswell
AMD Zen 4
AMD Zen 3
AMD Zen 2
AMD Zen+
Alder Lake-P
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 3 → 1:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p01
Alder Lake-E
Measurements
Latencies
Latency operand 2 → 1:
2
Latency operand 3 → 1:
2
Throughput
Measured (loop):
0.67
Measured (unrolled):
0.67
Number of μops
Executed: 2
Microcode Sequencer (MS): 0
Rocket Lake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 3 → 1:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p01
Tiger Lake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 3 → 1:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p01
Ice Lake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 3 → 1:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p01
Documentation
Latency: 1.0
Throughput: 0.5
Cascade Lake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 3 → 1:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p01
Cannon Lake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 3 → 1:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p01
Skylake-X
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 3 → 1:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p01
IACA 2.3
Throughput
Computed from the port usage: 0.50
IACA:
0.50
Number of μops:
1
Port usage:
1*p01
IACA 3.0
Throughput
Computed from the port usage: 0.50
IACA:
0.49
Number of μops:
1
Port usage:
1*p01
Coffee Lake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 3 → 1:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p01
Kaby Lake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 3 → 1:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p01
Skylake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 3 → 1:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p01
IACA 2.3
Throughput
Computed from the port usage: 0.50
IACA:
0.50
Number of μops:
1
Port usage:
1*p01
IACA 3.0
Throughput
Computed from the port usage: 0.50
IACA:
0.49
Number of μops:
1
Port usage:
1*p01
Broadwell
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 3 → 1:
1
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
1
Port usage:
1*p0
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
1
Port usage:
1*p0
IACA 3.0
Throughput
Computed from the port usage: 1.00
IACA:
0.98
Number of μops:
1
Port usage:
1*p0
Haswell
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 3 → 1:
1
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p0
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
1
Port usage:
1*p0
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
1
Port usage:
1*p0
IACA 3.0
Throughput
Computed from the port usage: 1.00
IACA:
0.98
Number of μops:
1
Port usage:
1*p0
AMD Zen 4
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 3 → 1:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Port usage:
1*FP23
AMD Zen 3
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 3 → 1:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Port usage:
1*FP12
Documentation
Latency: 3
Throughput: 0.50
Number of μops: 1
Port usage: FP1/2
AMD Zen 2
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1:
3
Throughput
Computed from the port usage: 0.50
Measured (loop):
2.00
Measured (unrolled):
2.00
Number of μops
Executed: 1
Port usage:
1*FP01
Documentation
Latency: 3
Throughput: 1.00
Number of μops: 1
Port usage: FP2
AMD Zen+
Measurements
Latencies
Latency operand 2 → 1:
4
Latency operand 3 → 1:
4
Throughput
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 2