MOVSQ
Summary:
"Move Data from String to String"
Reference:
https://www.felixcloutier.com/x86/MOVS:MOVSB:MOVSW:MOVSD:MOVSQ.html
Extension:
LONGMODE
Category:
STRINGOP
ISA-Set:
LONGMODE
CPL:
3
iform:
MOVSQ
iclass:
MOVSQ
ASM:
MOVSQ
Operands
Operand 1 (w, suppressed): Memory
Operand 2 (r, suppressed): Memory
Operand 3 (r, suppressed): Flags (DF: r)
Available performance data
Alder Lake-P
Alder Lake-E
Rocket Lake
Tiger Lake
Ice Lake
Cascade Lake
Cannon Lake
Skylake-X
Coffee Lake
Kaby Lake
Skylake
Broadwell
Haswell
Ivy Bridge
Sandy Bridge
Westmere
Nehalem
Wolfdale
Conroe
Tremont
Goldmont Plus
Goldmont
Airmont
Bonnell
AMD Zen 4
AMD Zen 3
AMD Zen 2
AMD Zen+
Alder Lake-P
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤7
Throughput
Computed from the port usage: 0.80
Measured (loop):
4.00
Measured (unrolled):
3.90
Number of μops
Executed: 7
Retire slots: 7
Decoded (MITE): 3
Microcode Sequencer (MS): 4
Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage:
4*p0156B+1*p23A+1*p49+1*p78
Alder Lake-E
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤5
Throughput
Measured (loop):
4.67
Measured (unrolled):
4.78
Number of μops
Executed: 5
Microcode Sequencer (MS): 4
Requires the complex decoder
Rocket Lake
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤6
Throughput
Computed from the port usage: 0.50
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 5
Retire slots: 5
Decoded (MITE): 4
Microcode Sequencer (MS): 1
Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage:
2*p0156+1*p23+1*p49+1*p78
Tiger Lake
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤6
Throughput
Computed from the port usage: 0.50
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 5
Retire slots: 5
Decoded (MITE): 4
Microcode Sequencer (MS): 1
Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage:
2*p0156+1*p23+1*p49+1*p78
Ice Lake
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤6
Throughput
Computed from the port usage: 0.50
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 5
Retire slots: 5
Decoded (MITE): 4
Microcode Sequencer (MS): 1
Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage:
2*p0156+1*p23+1*p49+1*p78
Cascade Lake
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 5
Retire slots: 5
Decoded (MITE): 4
Microcode Sequencer (MS): 1
Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage:
2*p0156+2*p23+1*p4
Cannon Lake
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 5
Retire slots: 5
Decoded (MITE): 4
Microcode Sequencer (MS): 1
Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage:
2*p0156+2*p23+1*p4
Skylake-X
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 5
Retire slots: 5
Decoded (MITE): 4
Microcode Sequencer (MS): 1
Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage:
2*p0156+2*p23+1*p4
Coffee Lake
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 5
Retire slots: 5
Decoded (MITE): 4
Microcode Sequencer (MS): 1
Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage:
2*p0156+2*p23+1*p4
Kaby Lake
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 5
Retire slots: 5
Decoded (MITE): 4
Microcode Sequencer (MS): 1
Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage:
2*p0156+2*p23+1*p4
Skylake
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 5
Retire slots: 5
Decoded (MITE): 4
Microcode Sequencer (MS): 1
Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage:
2*p0156+2*p23+1*p4
Broadwell
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 5
Retire slots: 5
Decoded (MITE): 4
Microcode Sequencer (MS): 1
Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage:
2*p0156+2*p23+1*p4
Haswell
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 5
Retire slots: 5
Decoded (MITE): 4
Microcode Sequencer (MS): 1
Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage:
2*p0156+2*p23+1*p4
IACA 2.1
Latency:
12
Throughput
Computed from the port usage: 1.00
IACA:
7.35 (with the -no_interiteration flag: 1.00)
Number of μops:
5
Port usage:
2*p0156+1*p23+1*p237+1*p4
Ivy Bridge
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 5
Retire slots: 5
Decoded (MITE): 4
Microcode Sequencer (MS): 1
Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage:
2*p015+2*p23+1*p4
IACA 2.1
Latency:
12
Throughput
Computed from the port usage: 1.00
IACA:
8.00 (with the -no_interiteration flag: 1.00)
Number of μops:
5
Port usage:
2*p015+2*p23+1*p4
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
8.00 (with the -no_interiteration flag: 3.67)
Number of μops:
5
Port usage:
2*p015+2*p23+1*p4
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
7.14
Number of μops:
5
Port usage:
2*p015+2*p23+1*p4
Sandy Bridge
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 5
Retire slots: 5
Decoded (MITE): 4
Microcode Sequencer (MS): 1
Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage:
2*p015+2*p23+1*p4
IACA 2.1
Latency:
12
Throughput
Computed from the port usage: 1.00
IACA:
8.00 (with the -no_interiteration flag: 1.00)
Number of μops:
5
Port usage:
2*p015+2*p23+1*p4
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
8.00 (with the -no_interiteration flag: 3.67)
Number of μops:
5
Port usage:
2*p015+2*p23+1*p4
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
7.14
Number of μops:
5
Port usage:
2*p015+2*p23+1*p4
Westmere
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤8
Throughput
Computed from the port usage: 1.00
Measured (loop):
5.00
Measured (unrolled):
5.00
Number of μops
Executed: 5
Retire slots: 5
Microcode Sequencer (MS): 1
Requires the complex decoder
Port usage:
2*p015+1*p2+1*p3+1*p4
IACA 2.1
Latency:
10
Throughput
Computed from the port usage: 1.00
IACA:
6.00 (with the -no_interiteration flag: 1.00)
Number of μops:
5
Port usage:
2*p015+1*p2+1*p3+1*p4
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
6.00 (with the -no_interiteration flag: 2.86)
Number of μops:
5
Port usage:
2*p015+1*p2+1*p3+1*p4
Nehalem
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤8
Throughput
Computed from the port usage: 1.00
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 5
Retire slots: 5
Microcode Sequencer (MS): 1
Requires the complex decoder
Port usage:
2*p015+1*p2+1*p3+1*p4
IACA 2.1
Latency:
10
Throughput
Computed from the port usage: 1.00
IACA:
6.00 (with the -no_interiteration flag: 1.00)
Number of μops:
5
Port usage:
2*p015+1*p2+1*p3+1*p4
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
6.00 (with the -no_interiteration flag: 2.86)
Number of μops:
5
Port usage:
2*p015+1*p2+1*p3+1*p4
Wolfdale
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤3
Throughput
Computed from the port usage: 2.00
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 8
Port usage:
2*p015+2*p2+1*p3+1*p4+2*p5
Conroe
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤3
Throughput
Computed from the port usage: 2.00
Measured (loop):
5.00
Measured (unrolled):
5.00
Number of μops
Executed: 8
Port usage:
2*p015+1*p05+2*p2+1*p3+1*p4+1*p5
Tremont
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤3
Throughput
Measured (loop):
5.02
Measured (unrolled):
5.00
Number of μops
Executed: 5
Microcode Sequencer (MS): 4
Requires the complex decoder
Goldmont Plus
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤3
Throughput
Measured (loop):
5.00
Measured (unrolled):
5.00
Number of μops
Executed: 5
Microcode Sequencer (MS): 5
Requires the complex decoder
Goldmont
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤3
Throughput
Measured (loop):
5.00
Measured (unrolled):
5.00
Number of μops
Executed: 5
Microcode Sequencer (MS): 5
Requires the complex decoder
Airmont
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤3
Throughput
Measured (loop):
6.00
Measured (unrolled):
6.00
Number of μops
Executed: 5
Microcode Sequencer (MS): 5
Requires the complex decoder
Bonnell
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤8
Throughput
Measured (loop):
7.35
Measured (unrolled):
6.00
Number of μops
Executed: 4
Microcode Sequencer (MS): 4
Requires the complex decoder
AMD Zen 4
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤5
Throughput
Measured (loop):
3.00
Measured (unrolled):
3.00
Number of μops
Executed: 5
AMD Zen 3
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤4
Throughput
Measured (loop):
3.00
Measured (unrolled):
3.00
Number of μops
Executed: 5
Documentation
Number of μops: ucode
AMD Zen 2
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤5
Throughput
Measured (loop):
3.00
Measured (unrolled):
3.00
Number of μops
Executed: 5
Documentation
Number of μops: ucode
AMD Zen+
Measurements
Latencies
Latency operand 1 → 1 (address, base register):
≤4
Throughput
Measured (loop):
3.00
Measured (unrolled):
3.00
Number of μops
Executed: 5
Documentation
Number of μops: ucode