MOVSQ - Port Usage

With blocking instructions for port '0':

Code:

   0:	66 45 8d 06          	lea    r8w,[r14]
   4:	66 45 8d 0e          	lea    r9w,[r14]
   8:	66 45 8d 16          	lea    r10w,[r14]
   c:	66 45 8d 1e          	lea    r11w,[r14]
  10:	66 45 8d 26          	lea    r12w,[r14]
  14:	66 41 8d 1e          	lea    bx,[r14]
  18:	66 41 8d 0e          	lea    cx,[r14]
  1c:	66 41 8d 16          	lea    dx,[r14]
  20:	66 45 8d 06          	lea    r8w,[r14]
  24:	66 45 8d 0e          	lea    r9w,[r14]
  28:	48 a5                	movs   QWORD PTR es:[rdi],QWORD PTR ds:[rsi]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 10.02
- Reference cycles: 10.0
- UOPS_PORT_0: 9.98

With blocking instructions for port '1':

Code:

   0:	66 0f 58 c1          	addpd  xmm0,xmm1
   4:	66 0f 58 d1          	addpd  xmm2,xmm1
   8:	66 0f 58 d9          	addpd  xmm3,xmm1
   c:	66 0f 58 e1          	addpd  xmm4,xmm1
  10:	66 0f 58 e9          	addpd  xmm5,xmm1
  14:	66 0f 58 f1          	addpd  xmm6,xmm1
  18:	66 0f 58 f9          	addpd  xmm7,xmm1
  1c:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  21:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  26:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  2b:	48 a5                	movs   QWORD PTR es:[rdi],QWORD PTR ds:[rsi]

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 12.53
- Reference cycles: 12.48
- UOPS_PORT_1: 9.99

With blocking instructions for port '2':

Code:

   0:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
   5:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
   a:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
   f:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  14:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  19:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  1e:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  23:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  28:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
  2d:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
  32:	48 a5                	movs   QWORD PTR es:[rdi],QWORD PTR ds:[rsi]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 12.1
- Reference cycles: 12.07
- UOPS_PORT_2: 12.0

⇨ 2 μops that can only use port '2'

With blocking instructions for port '3':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	48 a5                	movs   QWORD PTR es:[rdi],QWORD PTR ds:[rsi]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.83
- Reference cycles: 11.8
- UOPS_PORT_3: 11.0

⇨ One μop that can only use port '3'

With blocking instructions for port '4':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	48 a5                	movs   QWORD PTR es:[rdi],QWORD PTR ds:[rsi]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.83
- Reference cycles: 11.8
- UOPS_PORT_4: 11.0

⇨ One μop that can only use port '4'

With blocking instructions for port '5':

Code:

   0:	f3 0f 16 c1          	movshdup xmm0,xmm1
   4:	f3 0f 16 d1          	movshdup xmm2,xmm1
   8:	f3 0f 16 d9          	movshdup xmm3,xmm1
   c:	f3 0f 16 e1          	movshdup xmm4,xmm1
  10:	f3 0f 16 e9          	movshdup xmm5,xmm1
  14:	f3 0f 16 f1          	movshdup xmm6,xmm1
  18:	f3 0f 16 f9          	movshdup xmm7,xmm1
  1c:	f3 44 0f 16 c1       	movshdup xmm8,xmm1
  21:	f3 44 0f 16 c9       	movshdup xmm9,xmm1
  26:	f3 44 0f 16 d1       	movshdup xmm10,xmm1
  2b:	48 a5                	movs   QWORD PTR es:[rdi],QWORD PTR ds:[rsi]

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.01
- Reference cycles: 11.01
- UOPS_PORT_5: 10.98

⇨ One μop that can only use port '5'

With blocking instructions for ports {'0', '5'}:

Code:

   0:	41 0f 6e c0          	movd   mm0,r8d
   4:	41 0f 6e c8          	movd   mm1,r8d
   8:	41 0f 6e d0          	movd   mm2,r8d
   c:	41 0f 6e d8          	movd   mm3,r8d
  10:	41 0f 6e e0          	movd   mm4,r8d
  14:	41 0f 6e e8          	movd   mm5,r8d
  18:	41 0f 6e f0          	movd   mm6,r8d
  1c:	41 0f 6e f8          	movd   mm7,r8d
  20:	41 0f 6e c0          	movd   mm0,r8d
  24:	41 0f 6e c8          	movd   mm1,r8d
  28:	41 0f 6e d0          	movd   mm2,r8d
  2c:	41 0f 6e d8          	movd   mm3,r8d
  30:	41 0f 6e e0          	movd   mm4,r8d
  34:	41 0f 6e e8          	movd   mm5,r8d
  38:	41 0f 6e f0          	movd   mm6,r8d
  3c:	41 0f 6e f8          	movd   mm7,r8d
  40:	41 0f 6e c0          	movd   mm0,r8d
  44:	41 0f 6e c8          	movd   mm1,r8d
  48:	41 0f 6e d0          	movd   mm2,r8d
  4c:	41 0f 6e d8          	movd   mm3,r8d
  50:	48 a5                	movs   QWORD PTR es:[rdi],QWORD PTR ds:[rsi]

Show nanoBench command
Results:
- Instructions retired: 21.0
- Core cycles: 11.06
- Reference cycles: 10.96
- UOPS_PORT_0: 11.06
- UOPS_PORT_5: 10.94

⇨ One μop that can only use ports {'0', '5'}

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	66 0f 55 c1          	andnpd xmm0,xmm1
   4:	66 0f 55 d1          	andnpd xmm2,xmm1
   8:	66 0f 55 d9          	andnpd xmm3,xmm1
   c:	66 0f 55 e1          	andnpd xmm4,xmm1
  10:	66 0f 55 e9          	andnpd xmm5,xmm1
  14:	66 0f 55 f1          	andnpd xmm6,xmm1
  18:	66 0f 55 f9          	andnpd xmm7,xmm1
  1c:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  21:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  26:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  2b:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  30:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  35:	66 0f 55 c1          	andnpd xmm0,xmm1
  39:	66 0f 55 d1          	andnpd xmm2,xmm1
  3d:	66 0f 55 d9          	andnpd xmm3,xmm1
  41:	66 0f 55 e1          	andnpd xmm4,xmm1
  45:	66 0f 55 e9          	andnpd xmm5,xmm1
  49:	66 0f 55 f1          	andnpd xmm6,xmm1
  4d:	66 0f 55 f9          	andnpd xmm7,xmm1
  51:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  56:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  5b:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  60:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  65:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  6a:	66 0f 55 c1          	andnpd xmm0,xmm1
  6e:	66 0f 55 d1          	andnpd xmm2,xmm1
  72:	66 0f 55 d9          	andnpd xmm3,xmm1
  76:	66 0f 55 e1          	andnpd xmm4,xmm1
  7a:	66 0f 55 e9          	andnpd xmm5,xmm1
  7e:	66 0f 55 f1          	andnpd xmm6,xmm1
  82:	48 a5                	movs   QWORD PTR es:[rdi],QWORD PTR ds:[rsi]

Init:

PXOR XMM0, XMM0;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12

Show nanoBench command
Results:
- Instructions retired: 31.0
- Core cycles: 32.52
- Reference cycles: 32.48
- UOPS_PORT_0: 5.39
- UOPS_PORT_1: 13.97
- UOPS_PORT_5: 14.64

⇨ 2 μops that can only use ports {'0', '1', '5'}