VMOVDQU8 (M128, K, XMM)

Summary:	"Move Unaligned Packed Integer Values"
Reference:	https://www.felixcloutier.com/x86/movdqu:vmovdqu8:vmovdqu16:vmovdqu32:vmovdqu64
Extension:	AVX512EVEX
Category:	DATAXFER
ISA-Set:	AVX512BW_128
CPL:	3
iform:	VMOVDQU8_MEMu8_MASKmskw_XMMu8_AVX512
iclass:	VMOVDQU8
ASM:	VMOVDQU8

Operands

Operand 1 (w): Memory
Operand 2 (r): Register (K1, K2, K3, K4, K5, K6, K7)
Operand 3 (r): Register (XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, XMM16, XMM17, XMM18, XMM19, XMM20, XMM21, XMM22, XMM23, XMM24, XMM25, XMM26, XMM27, XMM28, XMM29, XMM30, XMM31)

Available performance data

Emerald Rapids
Alder Lake-P
Rocket Lake
Tiger Lake
Ice Lake
Cascade Lake
Cannon Lake
Skylake-X
AMD Zen 5
AMD Zen 4

Emerald Rapids

Measurements

Latencies
Throughput
- Computed from the port usage: 0.50
- Measured (loop): 0.50
- Measured (unrolled): 0.50
Number of μops
- Executed: 2
- Retire slots: 1
- Decoded (MITE): 1
- Microcode Sequencer (MS): 0
Port usage: 1*p49+1*p78

Alder Lake-P

Measurements

Latencies
Throughput
- Computed from the port usage: 0.50
- Measured (loop): 0.50
- Measured (unrolled): 0.50
Number of μops
- Executed: 2
- Retire slots: 1
- Decoded (MITE): 1
- Microcode Sequencer (MS): 0
Port usage: 1*p49+1*p78

Rocket Lake

Measurements

Latencies
Throughput
- Computed from the port usage: 0.50
- Measured (loop): 0.50
- Measured (unrolled): 0.50
Number of μops
- Executed: 2
- Retire slots: 1
- Decoded (MITE): 1
- Microcode Sequencer (MS): 0
Port usage: 1*p49+1*p78

Tiger Lake

Measurements

Latencies
Throughput
- Computed from the port usage: 0.50
- Measured (loop): 0.50
- Measured (unrolled): 0.50
Number of μops
- Executed: 2
- Retire slots: 1
- Decoded (MITE): 1
- Microcode Sequencer (MS): 0
Port usage: 1*p49+1*p78

Ice Lake

Measurements

Latencies
Throughput
- Computed from the port usage: 0.50
- Measured (loop): 0.50
- Measured (unrolled): 0.50
Number of μops
- Executed: 2
- Retire slots: 1
- Decoded (MITE): 1
- Microcode Sequencer (MS): 0
Port usage: 1*p49+1*p78

Cascade Lake

Measurements

Latencies
Throughput
- Computed from the port usage: 1.00
- Measured (loop): 1.00
- Measured (unrolled): 1.00
Number of μops
- Executed: 2
- Retire slots: 1
- Decoded (MITE): 1
- Microcode Sequencer (MS): 0
Port usage: 1*p237+1*p4 (if an indexed addressing mode is used: 1*p23+1*p4)

Cannon Lake

Measurements

Latencies
Throughput
- Computed from the port usage: 1.00
- Measured (loop): 1.00
- Measured (unrolled): 1.00
Number of μops
- Executed: 2
- Retire slots: 1
- Decoded (MITE): 1
- Microcode Sequencer (MS): 0
Port usage: 1*p237+1*p4 (if an indexed addressing mode is used: 1*p23+1*p4)

Skylake-X

Measurements

Latencies
Throughput
- Computed from the port usage: 1.00
- Measured (loop): 1.00
- Measured (unrolled): 1.00
Number of μops
- Executed: 2
- Retire slots: 1
- Decoded (MITE): 1
- Microcode Sequencer (MS): 0
Port usage: 1*p237+1*p4 (if an indexed addressing mode is used: 1*p23+1*p4)

IACA 2.3

Throughput
- Computed from the port usage: 1.00
- IACA: 1.00
Number of μops: 2
Port usage: 1*p237+1*p4

IACA 3.0

Throughput
- Computed from the port usage: 1.00
- IACA: 0.92
Number of μops: 2
Port usage: 1*p237+1*p4

AMD Zen 5

Measurements

Latencies
- Latency operand 1 → 1 (address, base register): ≤18
- Latency operand 1 → 1 (address, index register): ≤18
- Latency operand 3 → 1: ≤14
Throughput
- Computed from the port usage: 0.50
- Measured (loop): 0.50
- Measured (unrolled): 0.50
Number of μops
- Executed: 1
Port usage: 1*FP45

Documentation

Latency: 1
Throughput: 0.25
Number of μops: 1
Port usage: FP0/1/2/3

AMD Zen 4

Measurements

Latencies
- Latency operand 1 → 1 (address, base register): ≤23
- Latency operand 1 → 1 (address, index register): ≤23
- Latency operand 3 → 1: ≤20
Throughput
- Computed from the port usage: 0.50
- Measured (loop): 1.00
- Measured (unrolled): 1.00
Number of μops
- Executed: 1
Port usage: 1*FP45

Documentation

Latency: 1
Throughput: 1.00
Number of μops: 1
Port usage: FP4