PDEP (R64, R64, M64)
Summary:
"Parallel Bits Deposit"
Reference:
https://www.felixcloutier.com/x86/pdep
Extension:
BMI2
Category:
BMI2
ISA-Set:
BMI2
CPL:
3
iform:
PDEP_GPR64q_GPR64q_MEMq
iclass:
PDEP
ASM:
PDEP
Operands
Operand 1 (w): Register (RAX, RCX, RDX, RBX, RSP, RBP, RSI, RDI, R8, R9, R10, R11, R12, R13, R14, R15)
Operand 2 (r): Register (RAX, RCX, RDX, RBX, RSP, RBP, RSI, RDI, R8, R9, R10, R11, R12, R13, R14, R15)
Operand 3 (r): Memory
Available performance data
Arrow Lake-P
Arrow Lake-E
Meteor Lake-P
Meteor Lake-E
Emerald Rapids
Alder Lake-P
Alder Lake-E
Rocket Lake
Tiger Lake
Ice Lake
Cascade Lake
Cannon Lake
Skylake-X
Coffee Lake
Kaby Lake
Skylake
Broadwell
Haswell
AMD Zen 5
AMD Zen 4
AMD Zen 3
AMD Zen 2
AMD Zen+
Arrow Lake-P
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
7
Latency operand 3 → 1 (address, index register):
8
Latency operand 3 → 1 (memory):
≤9
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 1 (if an indexed addressing mode is used: 2)
Decoded (MITE): 1 (if an indexed addressing mode is used: 2)
Microcode Sequencer (MS): 0
Port usage:
1*LD+1*SLOW
Arrow Lake-E
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
7
Latency operand 3 → 1 (address, index register):
7
Latency operand 3 → 1 (memory):
≤3
Throughput
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Microcode Sequencer (MS): 0
Meteor Lake-P
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
8
Latency operand 3 → 1 (address, index register):
8
Latency operand 3 → 1 (memory):
≤8
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 1 (if an indexed addressing mode is used: 2)
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p1+1*p23A
Meteor Lake-E
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
7
Latency operand 3 → 1 (address, index register):
7
Latency operand 3 → 1 (memory):
≤3
Throughput
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Microcode Sequencer (MS): 0
Emerald Rapids
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
8
Latency operand 3 → 1 (address, index register):
8
Latency operand 3 → 1 (memory):
≤8
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 1 (if an indexed addressing mode is used: 2)
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p1+1*p23A
Alder Lake-P
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
8
Latency operand 3 → 1 (address, index register):
8
Latency operand 3 → 1 (memory):
≤8
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 1 (if an indexed addressing mode is used: 2)
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p1+1*p23A
Alder Lake-E
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
7
Latency operand 3 → 1 (address, index register):
7
Latency operand 3 → 1 (memory):
≤3
Throughput
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Microcode Sequencer (MS): 0
Rocket Lake
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
8
Latency operand 3 → 1 (address, index register):
8
Latency operand 3 → 1 (memory):
≤8
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 1 (if an indexed addressing mode is used: 2)
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p1+1*p23
Tiger Lake
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
8
Latency operand 3 → 1 (address, index register):
8
Latency operand 3 → 1 (memory):
≤8
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 1 (if an indexed addressing mode is used: 2)
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p1+1*p23
Ice Lake
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
8
Latency operand 3 → 1 (address, index register):
8
Latency operand 3 → 1 (memory):
≤8
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 1 (if an indexed addressing mode is used: 2)
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p1+1*p23
Cascade Lake
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
8
Latency operand 3 → 1 (address, index register):
8
Latency operand 3 → 1 (memory):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 1 (if an indexed addressing mode is used: 2)
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p1+1*p23
Cannon Lake
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
8
Latency operand 3 → 1 (address, index register):
8
Latency operand 3 → 1 (memory):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 1 (if an indexed addressing mode is used: 2)
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p1+1*p23
Skylake-X
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
8
Latency operand 3 → 1 (address, index register):
8
Latency operand 3 → 1 (memory):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 1 (if an indexed addressing mode is used: 2)
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p1+1*p23
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
2
Port usage:
1*p1+1*p23
IACA 3.0
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
2
Port usage:
1*p1+1*p23
Coffee Lake
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
8
Latency operand 3 → 1 (address, index register):
8
Latency operand 3 → 1 (memory):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 1 (if an indexed addressing mode is used: 2)
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p1+1*p23
Kaby Lake
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
8
Latency operand 3 → 1 (address, index register):
8
Latency operand 3 → 1 (memory):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 1 (if an indexed addressing mode is used: 2)
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p1+1*p23
Skylake
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
8
Latency operand 3 → 1 (address, index register):
8
Latency operand 3 → 1 (memory):
≤5
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 1 (if an indexed addressing mode is used: 2)
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p1+1*p23
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
2
Port usage:
1*p1+1*p23
IACA 3.0
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
2
Port usage:
1*p1+1*p23
Broadwell
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
8
Latency operand 3 → 1 (address, index register):
8
Latency operand 3 → 1 (memory):
≤7
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 1 (if an indexed addressing mode is used: 2)
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p1+1*p23
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
2
Port usage:
1*p1+1*p23
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
2
Port usage:
1*p1+1*p23
IACA 3.0
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
2
Port usage:
1*p1+1*p23
Haswell
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
8
Latency operand 3 → 1 (address, index register):
8
Latency operand 3 → 1 (memory):
≤7
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 1 (if an indexed addressing mode is used: 2)
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p1+1*p23
IACA 2.1
Latency:
8
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
2
Port usage:
1*p1+1*p23
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
2
Port usage:
1*p1+1*p23
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
2
Port usage:
1*p1+1*p23
IACA 3.0
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
2
Port usage:
1*p1+1*p23
AMD Zen 5
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
7
Latency operand 3 → 1 (address, index register):
7
Latency operand 3 → 1 (memory):
≤3
Throughput
Measured (loop):
0.33
Measured (unrolled):
0.33
Number of μops
Executed: 1
Documentation
Latency: 3
Throughput: 0.33
Number of μops: 1
AMD Zen 4
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
7
Latency operand 3 → 1 (address, index register):
7
Latency operand 3 → 1 (memory):
≤9
Throughput
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1 (if an indexed addressing mode is used: 2)
Documentation
Latency: 3
Throughput: 1.00
Number of μops: 1
Port usage: ALU1
AMD Zen 3
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 3 → 1 (address, base register):
7
Latency operand 3 → 1 (address, index register):
7
Latency operand 3 → 1 (memory):
≤8
Throughput
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Documentation
Latency: 3
Throughput: 1.00
Number of μops: 1
Port usage: ALU1
AMD Zen 2
Measurements
Latencies
Latency operand 2 → 1:
0
Latency operand 3 → 1 (address, base register):
22
Latency operand 3 → 1 (address, index register):
22
Latency operand 3 → 1 (memory):
≤25
Throughput
Measured (loop):
43.60
Measured (unrolled):
43.62
Number of μops
Executed: 119
Documentation
Number of μops: ucode
AMD Zen+
Measurements
Latencies
Latency operand 2 → 1:
0
Latency operand 3 → 1 (address, base register):
21
Latency operand 3 → 1 (address, index register):
21
Latency operand 3 → 1 (memory):
≤23
Throughput
Measured (loop):
44.25
Measured (unrolled):
44.75
Number of μops
Executed: 119
Documentation
Number of μops: ucode