PDEP (R64, R64, M64)

Operands

• Operand 1 (w): Register (RAX, RCX, RDX, RBX, RSP, RBP, RSI, RDI, R8, R9, R10, R11, R12, R13, R14, R15)
• Operand 2 (r): Register (RAX, RCX, RDX, RBX, RSP, RBP, RSI, RDI, R8, R9, R10, R11, R12, R13, R14, R15)
• Operand 3 (r): Memory

Available performance data

• Alder Lake-P
• Alder Lake-E
• Rocket Lake
• Tiger Lake
• Ice Lake
• Cascade Lake
• Cannon Lake
• Skylake-X
• Coffee Lake
• Kaby Lake
• Skylake
• Broadwell
• Haswell
• AMD Zen 4
• AMD Zen 3
• AMD Zen 2
• AMD Zen+

Alder Lake-P

• Measurements
• Latencies
  • Latency operand 2 → 1: 3
  • Latency operand 3 → 1 (address, base register): 8
  • Latency operand 3 → 1 (address, index register): 8
  • Latency operand 3 → 1 (memory): ≤8
• Throughput
  • Computed from the port usage: 1.00
  • Measured (loop): 1.00
  • Measured (unrolled): 1.00
• Number of μops
  • Executed: 2
  • Retire slots: 1 (if an indexed addressing mode is used: 2)
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p1+1*p23A

Alder Lake-E

• Measurements
• Latencies
  • Latency operand 2 → 1: 3
  • Latency operand 3 → 1 (address, base register): 7
  • Latency operand 3 → 1 (address, index register): 7
  • Latency operand 3 → 1 (memory): ≤3
• Throughput
  • Measured (loop): 1.00
  • Measured (unrolled): 1.00
• Number of μops
  • Executed: 1
  • Microcode Sequencer (MS): 0

Rocket Lake

• Measurements
• Latencies
  • Latency operand 2 → 1: 3
  • Latency operand 3 → 1 (address, base register): 8
  • Latency operand 3 → 1 (address, index register): 8
  • Latency operand 3 → 1 (memory): ≤8
• Throughput
  • Computed from the port usage: 1.00
  • Measured (loop): 1.00
  • Measured (unrolled): 1.00
• Number of μops
  • Executed: 2
  • Retire slots: 1 (if an indexed addressing mode is used: 2)
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p1+1*p23

Tiger Lake

• Measurements
• Latencies
  • Latency operand 2 → 1: 3
  • Latency operand 3 → 1 (address, base register): 8
  • Latency operand 3 → 1 (address, index register): 8
  • Latency operand 3 → 1 (memory): ≤8
• Throughput
  • Computed from the port usage: 1.00
  • Measured (loop): 1.00
  • Measured (unrolled): 1.00
• Number of μops
  • Executed: 2
  • Retire slots: 1 (if an indexed addressing mode is used: 2)
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p1+1*p23

Ice Lake

• Measurements
• Latencies
  • Latency operand 2 → 1: 3
  • Latency operand 3 → 1 (address, base register): 8
  • Latency operand 3 → 1 (address, index register): 8
  • Latency operand 3 → 1 (memory): ≤8
• Throughput
  • Computed from the port usage: 1.00
  • Measured (loop): 1.00
  • Measured (unrolled): 1.00
• Number of μops
  • Executed: 2
  • Retire slots: 1 (if an indexed addressing mode is used: 2)
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p1+1*p23
• Documentation
• Throughput: 1.0

Cascade Lake

• Measurements
• Latencies
  • Latency operand 2 → 1: 3
  • Latency operand 3 → 1 (address, base register): 8
  • Latency operand 3 → 1 (address, index register): 8
  • Latency operand 3 → 1 (memory): ≤5
• Throughput
  • Computed from the port usage: 1.00
  • Measured (loop): 1.00
  • Measured (unrolled): 1.00
• Number of μops
  • Executed: 2
  • Retire slots: 1 (if an indexed addressing mode is used: 2)
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p1+1*p23

Cannon Lake

• Measurements
• Latencies
  • Latency operand 2 → 1: 3
  • Latency operand 3 → 1 (address, base register): 8
  • Latency operand 3 → 1 (address, index register): 8
  • Latency operand 3 → 1 (memory): ≤5
• Throughput
  • Computed from the port usage: 1.00
  • Measured (loop): 1.00
  • Measured (unrolled): 1.00
• Number of μops
  • Executed: 2
  • Retire slots: 1 (if an indexed addressing mode is used: 2)
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p1+1*p23

Skylake-X

• Measurements
• Latencies
  • Latency operand 2 → 1: 3
  • Latency operand 3 → 1 (address, base register): 8
  • Latency operand 3 → 1 (address, index register): 8
  • Latency operand 3 → 1 (memory): ≤5
• Throughput
  • Computed from the port usage: 1.00
  • Measured (loop): 1.00
  • Measured (unrolled): 1.00
• Number of μops
  • Executed: 2
  • Retire slots: 1 (if an indexed addressing mode is used: 2)
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p1+1*p23
• IACA 2.3
• Throughput
  • Computed from the port usage: 1.00
  • IACA: 1.00
• Number of μops: 2
• Port usage: 1*p1+1*p23
• IACA 3.0
• Throughput
  • Computed from the port usage: 1.00
  • IACA: 1.00
• Number of μops: 2
• Port usage: 1*p1+1*p23

Coffee Lake

• Measurements
• Latencies
  • Latency operand 2 → 1: 3
  • Latency operand 3 → 1 (address, base register): 8
  • Latency operand 3 → 1 (address, index register): 8
  • Latency operand 3 → 1 (memory): ≤5
• Throughput
  • Computed from the port usage: 1.00
  • Measured (loop): 1.00
  • Measured (unrolled): 1.00
• Number of μops
  • Executed: 2
  • Retire slots: 1 (if an indexed addressing mode is used: 2)
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p1+1*p23

Kaby Lake

• Measurements
• Latencies
  • Latency operand 2 → 1: 3
  • Latency operand 3 → 1 (address, base register): 8
  • Latency operand 3 → 1 (address, index register): 8
  • Latency operand 3 → 1 (memory): ≤5
• Throughput
  • Computed from the port usage: 1.00
  • Measured (loop): 1.00
  • Measured (unrolled): 1.00
• Number of μops
  • Executed: 2
  • Retire slots: 1 (if an indexed addressing mode is used: 2)
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p1+1*p23

Skylake

• Measurements
• Latencies
  • Latency operand 2 → 1: 3
  • Latency operand 3 → 1 (address, base register): 8
  • Latency operand 3 → 1 (address, index register): 8
  • Latency operand 3 → 1 (memory): ≤5
• Throughput
  • Computed from the port usage: 1.00
  • Measured (loop): 1.00
  • Measured (unrolled): 1.00
• Number of μops
  • Executed: 2
  • Retire slots: 1 (if an indexed addressing mode is used: 2)
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p1+1*p23
• IACA 2.3
• Throughput
  • Computed from the port usage: 1.00
  • IACA: 1.00
• Number of μops: 2
• Port usage: 1*p1+1*p23
• IACA 3.0
• Throughput
  • Computed from the port usage: 1.00
  • IACA: 1.00
• Number of μops: 2
• Port usage: 1*p1+1*p23

Broadwell

• Measurements
• Latencies
  • Latency operand 2 → 1: 3
  • Latency operand 3 → 1 (address, base register): 8
  • Latency operand 3 → 1 (address, index register): 8
  • Latency operand 3 → 1 (memory): ≤7
• Throughput
  • Computed from the port usage: 1.00
  • Measured (loop): 1.00
  • Measured (unrolled): 1.00
• Number of μops
  • Executed: 2
  • Retire slots: 1 (if an indexed addressing mode is used: 2)
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p1+1*p23
• IACA 2.2
• Throughput
  • Computed from the port usage: 1.00
  • IACA: 1.00 (with the -no_interiteration flag: 1.00)
• Number of μops: 2
• Port usage: 1*p1+1*p23
• IACA 2.3
• Throughput
  • Computed from the port usage: 1.00
  • IACA: 1.00
• Number of μops: 2
• Port usage: 1*p1+1*p23
• IACA 3.0
• Throughput
  • Computed from the port usage: 1.00
  • IACA: 1.00
• Number of μops: 2
• Port usage: 1*p1+1*p23

Haswell

• Measurements
• Latencies
  • Latency operand 2 → 1: 3
  • Latency operand 3 → 1 (address, base register): 8
  • Latency operand 3 → 1 (address, index register): 8
  • Latency operand 3 → 1 (memory): ≤7
• Throughput
  • Computed from the port usage: 1.00
  • Measured (loop): 1.00
  • Measured (unrolled): 1.00
• Number of μops
  • Executed: 2
  • Retire slots: 1 (if an indexed addressing mode is used: 2)
  • Decoded (MITE): 1
  • Microcode Sequencer (MS): 0
• Port usage: 1*p1+1*p23
• IACA 2.1
• Latency: 8
• Throughput
  • Computed from the port usage: 1.00
  • IACA: 1.00 (with the -no_interiteration flag: 1.00)
• Number of μops: 2
• Port usage: 1*p1+1*p23
• IACA 2.2
• Throughput
  • Computed from the port usage: 1.00
  • IACA: 1.00 (with the -no_interiteration flag: 1.00)
• Number of μops: 2
• Port usage: 1*p1+1*p23
• IACA 2.3
• Throughput
  • Computed from the port usage: 1.00
  • IACA: 1.00
• Number of μops: 2
• Port usage: 1*p1+1*p23
• IACA 3.0
• Throughput
  • Computed from the port usage: 1.00
  • IACA: 1.00
• Number of μops: 2
• Port usage: 1*p1+1*p23

AMD Zen 4

• Measurements
• Latencies
  • Latency operand 2 → 1: 3
  • Latency operand 3 → 1 (address, base register): 7
  • Latency operand 3 → 1 (address, index register): 7
  • Latency operand 3 → 1 (memory): ≤9
• Throughput
  • Measured (loop): 1.00
  • Measured (unrolled): 1.00
• Number of μops
  • Executed: 1 (if an indexed addressing mode is used: 2)

AMD Zen 3

• Measurements
• Latencies
  • Latency operand 2 → 1: 3
  • Latency operand 3 → 1 (address, base register): 7
  • Latency operand 3 → 1 (address, index register): 7
  • Latency operand 3 → 1 (memory): ≤8
• Throughput
  • Measured (loop): 1.00
  • Measured (unrolled): 1.00
• Number of μops
  • Executed: 1
• Documentation
• Latency: 3
• Throughput: 1.00
• Number of μops: 1
• Port usage: ALU1

AMD Zen 2

• Measurements
• Latencies
  • Latency operand 2 → 1: 0
  • Latency operand 3 → 1 (address, base register): 22
  • Latency operand 3 → 1 (address, index register): 22
  • Latency operand 3 → 1 (memory): ≤25
• Throughput
  • Measured (loop): 44.82
  • Measured (unrolled): 44.86
• Number of μops
  • Executed: 119
• Documentation
• Number of μops: ucode

AMD Zen+

• Measurements
• Latencies
  • Latency operand 2 → 1: 0
  • Latency operand 3 → 1 (address, base register): 21
  • Latency operand 3 → 1 (address, index register): 21
  • Latency operand 3 → 1 (memory): ≤23
• Throughput
  • Measured (loop): 45.72
  • Measured (unrolled): 45.14
• Number of μops
  • Executed: 119
• Documentation
• Number of μops: ucode