BZHI (R32, R32, R32)
Summary:
"Zero High Bits Starting with Specified Bit Position"
Reference:
https://www.felixcloutier.com/x86/BZHI.html
Extension:
BMI2
Category:
BMI2
ISA-Set:
BMI2
CPL:
3
iform:
BZHI_VGPR32d_VGPR32d_VGPR32d
iclass:
BZHI
ASM:
BZHI
Operands
Operand 1 (w): Register (EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI, R8D, R9D, R10D, R11D, R12D, R13D, R14D, R15D)
Operand 2 (r): Register (EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI, R8D, R9D, R10D, R11D, R12D, R13D, R14D, R15D)
Operand 3 (r): Register (EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI, R8D, R9D, R10D, R11D, R12D, R13D, R14D, R15D)
Operand 4 (w, suppressed): Flags (AF: undef, CF: w, OF: w, PF: undef, SF: w, ZF: w)
Available performance data
Alder Lake-P
Alder Lake-E
Rocket Lake
Tiger Lake
Ice Lake
Cascade Lake
Cannon Lake
Skylake-X
Coffee Lake
Kaby Lake
Skylake
Broadwell
Haswell
AMD Zen 4
AMD Zen 3
AMD Zen 2
AMD Zen+
Alder Lake-P
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 2 → 4:
3
Latency operand 3 → 1:
3
Latency operand 3 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p1
Alder Lake-E
Measurements
Latencies
Latency operand 2 → 1:
3
Latency operand 2 → 4:
3
Latency operand 3 → 1:
3
Latency operand 3 → 4:
3
Throughput
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Microcode Sequencer (MS): 0
Rocket Lake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 2 → 4:
1
Latency operand 3 → 1:
1
Latency operand 3 → 4:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
Tiger Lake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 2 → 4:
1
Latency operand 3 → 1:
1
Latency operand 3 → 4:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
Ice Lake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 2 → 4:
1
Latency operand 3 → 1:
1
Latency operand 3 → 4:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
Documentation
Latency: 1.0
Throughput: 0.5
Cascade Lake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 2 → 4:
1
Latency operand 3 → 1:
1
Latency operand 3 → 4:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
Cannon Lake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 2 → 4:
1
Latency operand 3 → 1:
1
Latency operand 3 → 4:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
Skylake-X
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 2 → 4:
1
Latency operand 3 → 1:
1
Latency operand 3 → 4:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
IACA 2.3
Throughput
Computed from the port usage: 0.50
IACA:
0.50
Number of μops:
1
Port usage:
1*p15
IACA 3.0
Throughput
Computed from the port usage: 0.50
IACA:
0.49
Number of μops:
1
Port usage:
1*p15
Coffee Lake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 2 → 4:
1
Latency operand 3 → 1:
1
Latency operand 3 → 4:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
Kaby Lake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 2 → 4:
1
Latency operand 3 → 1:
1
Latency operand 3 → 4:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
Skylake
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 2 → 4:
1
Latency operand 3 → 1:
1
Latency operand 3 → 4:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
IACA 2.3
Throughput
Computed from the port usage: 0.50
IACA:
0.50
Number of μops:
1
Port usage:
1*p15
IACA 3.0
Throughput
Computed from the port usage: 0.50
IACA:
0.49
Number of μops:
1
Port usage:
1*p15
Broadwell
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 2 → 4:
1
Latency operand 3 → 1:
1
Latency operand 3 → 4:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
IACA 2.2
Throughput
Computed from the port usage: 0.50
IACA:
0.50 (with the -no_interiteration flag: 0.50)
Number of μops:
1
Port usage:
1*p15
IACA 2.3
Throughput
Computed from the port usage: 0.50
IACA:
0.50
Number of μops:
1
Port usage:
1*p15
IACA 3.0
Throughput
Computed from the port usage: 0.50
IACA:
0.49
Number of μops:
1
Port usage:
1*p15
Haswell
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 2 → 4:
1
Latency operand 3 → 1:
1
Latency operand 3 → 4:
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
IACA 2.1
Latency:
1
Throughput
Computed from the port usage: 0.50
IACA:
0.50 (with the -no_interiteration flag: 0.50)
Number of μops:
1
Port usage:
1*p15
IACA 2.2
Throughput
Computed from the port usage: 0.50
IACA:
0.50 (with the -no_interiteration flag: 0.50)
Number of μops:
1
Port usage:
1*p15
IACA 2.3
Throughput
Computed from the port usage: 0.50
IACA:
0.50
Number of μops:
1
Port usage:
1*p15
IACA 3.0
Throughput
Computed from the port usage: 0.50
IACA:
0.49
Number of μops:
1
Port usage:
1*p15
AMD Zen 4
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 2 → 4:
1
Latency operand 3 → 1:
1
Latency operand 3 → 4:
1
Throughput
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
AMD Zen 3
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 2 → 4:
1
Latency operand 3 → 1:
1
Latency operand 3 → 4:
1
Throughput
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Documentation
Latency: 1
Throughput: 0.50
Number of μops: 1
Port usage: ALU1/2
AMD Zen 2
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 2 → 4:
1
Latency operand 3 → 1:
1
Latency operand 3 → 4:
1
Throughput
Measured (loop):
0.33
Measured (unrolled):
0.31
Number of μops
Executed: 1
Documentation
Latency: 1
Throughput: 0.25
Number of μops: 1
Port usage: ALU
AMD Zen+
Measurements
Latencies
Latency operand 2 → 1:
1
Latency operand 2 → 4:
1
Latency operand 3 → 1:
1
Latency operand 3 → 4:
1
Throughput
Measured (loop):
0.36
Measured (unrolled):
0.31
Number of μops
Executed: 1
Documentation
Latency: 1
Throughput: 0.25
Number of μops: 1
Port usage: ALU