INC_LOCK (M32)

With unroll_count=500 and no inner loop

Code:

   0:	f0 41 ff 06          	lock inc DWORD PTR [r14]

Show nanoBench command
Results:
- MPERF: 19.65
- APERF: 22.54
- UOPS: 1.0
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=1000 and unroll_count=10

Code:

   0:	f0 41 ff 06          	lock inc DWORD PTR [r14]

Show nanoBench command
Results:
- MPERF: 19.64
- APERF: 22.52
- UOPS: 1.2
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	f0 41 ff 06          	lock inc DWORD PTR [r14]

Show nanoBench command
Results:
- MPERF: 19.65
- APERF: 22.54
- UOPS: 1.02
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
   4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
   9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
   e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]

Show nanoBench command
Results:
- MPERF: 78.57
- APERF: 90.1
- UOPS: 4.0
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=1000 and unroll_count=2

Code:

   0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
   4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
   9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
   e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]

Show nanoBench command
Results:
- MPERF: 78.64
- APERF: 90.21
- UOPS: 5.0
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
   4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
   9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
   e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]

Show nanoBench command
Results:
- MPERF: 78.61
- APERF: 90.17
- UOPS: 4.1
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
   4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
   9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
   e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
  13:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
  18:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
  1d:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
  22:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]

Show nanoBench command
Results:
- MPERF: 157.14
- APERF: 180.2
- UOPS: 8.0
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
   4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
   9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
   e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
  13:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
  18:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
  1d:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
  22:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]

Show nanoBench command
Results:
- MPERF: 157.31
- APERF: 180.44
- UOPS: 10.0
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
   4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
   9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
   e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
  13:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
  18:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
  1d:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
  22:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]

Show nanoBench command
Results:
- MPERF: 157.22
- APERF: 180.34
- UOPS: 8.2
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With 16 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
   4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
   9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
   e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
  13:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
  18:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
  1d:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
  22:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
  27:	f0 41 ff 46 20       	lock inc DWORD PTR [r14+0x20]
  2c:	f0 41 ff 46 24       	lock inc DWORD PTR [r14+0x24]
  31:	f0 41 ff 46 28       	lock inc DWORD PTR [r14+0x28]
  36:	f0 41 ff 46 2c       	lock inc DWORD PTR [r14+0x2c]
  3b:	f0 41 ff 46 30       	lock inc DWORD PTR [r14+0x30]
  40:	f0 41 ff 46 34       	lock inc DWORD PTR [r14+0x34]
  45:	f0 41 ff 46 38       	lock inc DWORD PTR [r14+0x38]
  4a:	f0 41 ff 46 3c       	lock inc DWORD PTR [r14+0x3c]

Show nanoBench command
Results:
- MPERF: 314.1
- APERF: 360.4
- UOPS: 16.0
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
   4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
   9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
   e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
  13:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
  18:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
  1d:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
  22:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
  27:	f0 41 ff 46 20       	lock inc DWORD PTR [r14+0x20]
  2c:	f0 41 ff 46 24       	lock inc DWORD PTR [r14+0x24]
  31:	f0 41 ff 46 28       	lock inc DWORD PTR [r14+0x28]
  36:	f0 41 ff 46 2c       	lock inc DWORD PTR [r14+0x2c]
  3b:	f0 41 ff 46 30       	lock inc DWORD PTR [r14+0x30]
  40:	f0 41 ff 46 34       	lock inc DWORD PTR [r14+0x34]
  45:	f0 41 ff 46 38       	lock inc DWORD PTR [r14+0x38]
  4a:	f0 41 ff 46 3c       	lock inc DWORD PTR [r14+0x3c]

Show nanoBench command
Results:
- MPERF: 314.42
- APERF: 360.66
- UOPS: 18.0
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
   4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
   9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
   e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
  13:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
  18:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
  1d:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
  22:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
  27:	f0 41 ff 46 20       	lock inc DWORD PTR [r14+0x20]
  2c:	f0 41 ff 46 24       	lock inc DWORD PTR [r14+0x24]
  31:	f0 41 ff 46 28       	lock inc DWORD PTR [r14+0x28]
  36:	f0 41 ff 46 2c       	lock inc DWORD PTR [r14+0x2c]
  3b:	f0 41 ff 46 30       	lock inc DWORD PTR [r14+0x30]
  40:	f0 41 ff 46 34       	lock inc DWORD PTR [r14+0x34]
  45:	f0 41 ff 46 38       	lock inc DWORD PTR [r14+0x38]
  4a:	f0 41 ff 46 3c       	lock inc DWORD PTR [r14+0x3c]

Show nanoBench command
Results:
- MPERF: 314.19
- APERF: 360.41
- UOPS: 16.2
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- MPERF: 19.67
- APERF: 22.54
- UOPS: 1.0
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=1000 and unroll_count=10

Code:

   0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- MPERF: 19.63
- APERF: 22.52
- UOPS: 1.2
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- MPERF: 19.64
- APERF: 22.53
- UOPS: 1.02
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
   5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
   b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
  11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- MPERF: 78.57
- APERF: 90.1
- UOPS: 4.0
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=1000 and unroll_count=2

Code:

   0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
   5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
   b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
  11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- MPERF: 78.64
- APERF: 90.21
- UOPS: 5.0
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
   5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
   b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
  11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- MPERF: 78.54
- APERF: 90.1
- UOPS: 4.1
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
   5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
   b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
  11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
  17:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
  1d:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
  23:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
  29:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- MPERF: 157.08
- APERF: 180.2
- UOPS: 8.0
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
   5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
   b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
  11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
  17:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
  1d:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
  23:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
  29:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- MPERF: 157.3
- APERF: 180.44
- UOPS: 10.0
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
   5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
   b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
  11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
  17:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
  1d:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
  23:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
  29:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- MPERF: 157.08
- APERF: 180.19
- UOPS: 8.2
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With 16 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
   5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
   b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
  11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
  17:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
  1d:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
  23:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
  29:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
  2f:	f0 43 ff 44 2e 20    	lock inc DWORD PTR [r14+r13*1+0x20]
  35:	f0 43 ff 44 2e 24    	lock inc DWORD PTR [r14+r13*1+0x24]
  3b:	f0 43 ff 44 2e 28    	lock inc DWORD PTR [r14+r13*1+0x28]
  41:	f0 43 ff 44 2e 2c    	lock inc DWORD PTR [r14+r13*1+0x2c]
  47:	f0 43 ff 44 2e 30    	lock inc DWORD PTR [r14+r13*1+0x30]
  4d:	f0 43 ff 44 2e 34    	lock inc DWORD PTR [r14+r13*1+0x34]
  53:	f0 43 ff 44 2e 38    	lock inc DWORD PTR [r14+r13*1+0x38]
  59:	f0 43 ff 44 2e 3c    	lock inc DWORD PTR [r14+r13*1+0x3c]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- MPERF: 314.16
- APERF: 360.4
- UOPS: 16.0
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
   5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
   b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
  11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
  17:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
  1d:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
  23:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
  29:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
  2f:	f0 43 ff 44 2e 20    	lock inc DWORD PTR [r14+r13*1+0x20]
  35:	f0 43 ff 44 2e 24    	lock inc DWORD PTR [r14+r13*1+0x24]
  3b:	f0 43 ff 44 2e 28    	lock inc DWORD PTR [r14+r13*1+0x28]
  41:	f0 43 ff 44 2e 2c    	lock inc DWORD PTR [r14+r13*1+0x2c]
  47:	f0 43 ff 44 2e 30    	lock inc DWORD PTR [r14+r13*1+0x30]
  4d:	f0 43 ff 44 2e 34    	lock inc DWORD PTR [r14+r13*1+0x34]
  53:	f0 43 ff 44 2e 38    	lock inc DWORD PTR [r14+r13*1+0x38]
  59:	f0 43 ff 44 2e 3c    	lock inc DWORD PTR [r14+r13*1+0x3c]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- MPERF: 314.42
- APERF: 360.67
- UOPS: 18.0
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
   5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
   b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
  11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
  17:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
  1d:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
  23:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
  29:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
  2f:	f0 43 ff 44 2e 20    	lock inc DWORD PTR [r14+r13*1+0x20]
  35:	f0 43 ff 44 2e 24    	lock inc DWORD PTR [r14+r13*1+0x24]
  3b:	f0 43 ff 44 2e 28    	lock inc DWORD PTR [r14+r13*1+0x28]
  41:	f0 43 ff 44 2e 2c    	lock inc DWORD PTR [r14+r13*1+0x2c]
  47:	f0 43 ff 44 2e 30    	lock inc DWORD PTR [r14+r13*1+0x30]
  4d:	f0 43 ff 44 2e 34    	lock inc DWORD PTR [r14+r13*1+0x34]
  53:	f0 43 ff 44 2e 38    	lock inc DWORD PTR [r14+r13*1+0x38]
  59:	f0 43 ff 44 2e 3c    	lock inc DWORD PTR [r14+r13*1+0x3c]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- MPERF: 314.33
- APERF: 360.56
- UOPS: 16.2
- FpuPipeAssignment.Total0: 0.0
- FpuPipeAssignment.Total1: 0.0
- FpuPipeAssignment.Total2: 0.0
- FpuPipeAssignment.Total3: 0.0
- DIV_CYCLES: 0.0

INC_LOCK (M32) - Throughput and Uops

With a non-indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 16 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 16 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10