RDMSR - Throughput and Uops

With unroll_count=500 and no inner loop

Code:
```
   0:	0f 32                	rdmsr  
```
Init:
```
MOV RCX, 0xE7
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 77.0
- Reference cycles: 71.09
- UOPS_RETIRED.ANY: 66.0
- RETIRE_SLOTS: 66.0
- UOPS_MS: 210.0
- UOPS_PORT_0: 17.0
- UOPS_PORT_1: 21.0
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 1.0

With loop_count=1000 and unroll_count=10

Code:
```
   0:	0f 32                	rdmsr  
```
Init:
```
MOV RCX, 0xE7
```
Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 76.8
- Reference cycles: 70.89
- UOPS_RETIRED.ANY: 66.2
- RETIRE_SLOTS: 66.2
- UOPS_MS: 210.0
- UOPS_PORT_0: 17.0
- UOPS_PORT_1: 21.0
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 1.0

With loop_count=100 and unroll_count=100

Code:
```
   0:	0f 32                	rdmsr  
```
Init:
```
MOV RCX, 0xE7
```
Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 76.98
- Reference cycles: 71.06
- UOPS_RETIRED.ANY: 66.02
- RETIRE_SLOTS: 66.02
- UOPS_MS: 210.0
- UOPS_PORT_0: 17.0
- UOPS_PORT_1: 21.0
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 1.0