MUL (R32) - Throughput and Uops
With unroll_count=500 and no inner loop
Code:
0: 41 f7 e0 mul r8d
Show nanoBench command
Results:
Instructions retired: 1.0
Core cycles: 4.81
Reference cycles: 4.44
UOPS_RETIRED.ANY: 3.01
RETIRE_SLOTS: 3.0
UOPS_MS: 0.0
UOPS_PORT_0: 1.14
UOPS_PORT_1: 1.3
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 0.0
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
INST_DECODED.DEC0: 1.0
With loop_count=1000 and unroll_count=10
Code:
0: 41 f7 e0 mul r8d
Show nanoBench command
Results:
Instructions retired: 1.2
Core cycles: 4.65
Reference cycles: 4.29
UOPS_RETIRED.ANY: 3.2
RETIRE_SLOTS: 3.2
UOPS_MS: 0.0
UOPS_PORT_0: 1.21
UOPS_PORT_1: 1.29
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 0.0
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
INST_DECODED.DEC0: 1.0
With loop_count=100 and unroll_count=100
Code:
0: 41 f7 e0 mul r8d
Show nanoBench command
Results:
Instructions retired: 1.02
Core cycles: 4.79
Reference cycles: 4.57
UOPS_RETIRED.ANY: 3.02
RETIRE_SLOTS: 3.02
UOPS_MS: 0.0
UOPS_PORT_0: 1.16
UOPS_PORT_1: 1.33
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 0.0
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
INST_DECODED.DEC0: 1.0
With additional dependency-breaking instructions
With unroll_count=500 and no inner loop
Code:
0: 48 31 c0 xor rax,rax 3: 41 f7 e0 mul r8d
Show nanoBench command
Results:
Instructions retired: 2.0
Core cycles: 1.99
Reference cycles: 1.83
UOPS_RETIRED.ANY: 4.0
RETIRE_SLOTS: 4.0
UOPS_MS: 0.0
UOPS_PORT_0: 1.21
UOPS_PORT_1: 1.47
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 0.0
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
INST_DECODED.DEC0: 1.0
With loop_count=1000 and unroll_count=10
Code:
0: 48 31 c0 xor rax,rax 3: 41 f7 e0 mul r8d
Show nanoBench command
Results:
Instructions retired: 2.2
Core cycles: 2.1
Reference cycles: 1.94
UOPS_RETIRED.ANY: 4.2
RETIRE_SLOTS: 4.2
UOPS_MS: 0.0
UOPS_PORT_0: 1.25
UOPS_PORT_1: 1.55
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 0.0
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
INST_DECODED.DEC0: 1.0
With loop_count=100 and unroll_count=100
Code:
0: 48 31 c0 xor rax,rax 3: 41 f7 e0 mul r8d
Show nanoBench command
Results:
Instructions retired: 2.02
Core cycles: 2.01
Reference cycles: 1.86
UOPS_RETIRED.ANY: 4.02
RETIRE_SLOTS: 4.02
UOPS_MS: 0.0
UOPS_PORT_0: 1.2
UOPS_PORT_1: 1.49
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 0.0
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
INST_DECODED.DEC0: 1.0