MOVSX (R16, M8) - Throughput and Uops (IACA 2.1)


With a non-indexed addressing mode

With 1 independent instruction

Throughput Analysis Report
--------------------------
Block Throughput: 1.00 Cycles       Throughput Bottleneck: PORT2_AGU, Port2_DATA

Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |
-------------------------------------------------------------------------
| Cycles | 0.0    0.0  | 0.0  | 1.0    1.0  | 0.0    0.0  | 0.0  | 0.0  |
-------------------------------------------------------------------------


| Num Of |              Ports pressure in cycles               |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |    |
---------------------------------------------------------------------
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx r8w, byte ptr [r14]
Total Num Of Uops: 1

With 8 independent instructions


Throughput Analysis Report
--------------------------
Block Throughput: 8.00 Cycles       Throughput Bottleneck: PORT2_AGU, Port2_DATA

Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |
-------------------------------------------------------------------------
| Cycles | 0.0    0.0  | 0.0  | 8.0    8.0  | 0.0    0.0  | 0.0  | 0.0  |
-------------------------------------------------------------------------


| Num Of |              Ports pressure in cycles               |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |    |
---------------------------------------------------------------------
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx r8w, byte ptr [r14]
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx r9w, byte ptr [r14+0x1]
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx r10w, byte ptr [r14+0x2]
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx r11w, byte ptr [r14+0x3]
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx r12w, byte ptr [r14+0x4]
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx bx, byte ptr [r14+0x5]
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx cx, byte ptr [r14+0x6]
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx dx, byte ptr [r14+0x7]
Total Num Of Uops: 8

With an indexed addressing mode

With 1 independent instruction

Throughput Analysis Report
--------------------------
Block Throughput: 1.00 Cycles       Throughput Bottleneck: PORT2_AGU, Port2_DATA

Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |
-------------------------------------------------------------------------
| Cycles | 0.0    0.0  | 0.0  | 1.0    1.0  | 0.0    0.0  | 0.0  | 0.0  |
-------------------------------------------------------------------------


| Num Of |              Ports pressure in cycles               |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |    |
---------------------------------------------------------------------
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx r8w, byte ptr [r14+r13*1]
Total Num Of Uops: 1

With 8 independent instructions


Throughput Analysis Report
--------------------------
Block Throughput: 8.00 Cycles       Throughput Bottleneck: PORT2_AGU, Port2_DATA

Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |
-------------------------------------------------------------------------
| Cycles | 0.0    0.0  | 0.0  | 8.0    8.0  | 0.0    0.0  | 0.0  | 0.0  |
-------------------------------------------------------------------------


| Num Of |              Ports pressure in cycles               |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |    |
---------------------------------------------------------------------
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx r8w, byte ptr [r14+r13*1]
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx r9w, byte ptr [r14+r13*1+0x1]
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx r10w, byte ptr [r14+r13*1+0x2]
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx r11w, byte ptr [r14+r13*1+0x3]
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx r12w, byte ptr [r14+r13*1+0x4]
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx bx, byte ptr [r14+r13*1+0x5]
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx cx, byte ptr [r14+r13*1+0x6]
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx dx, byte ptr [r14+r13*1+0x7]
Total Num Of Uops: 8

With the -no_interiteration flag

Throughput Analysis Report
--------------------------
Block Throughput: 1.00 Cycles       Throughput Bottleneck: PORT2_AGU, Port2_DATA

Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |
-------------------------------------------------------------------------
| Cycles | 0.0    0.0  | 0.0  | 1.0    1.0  | 0.0    0.0  | 0.0  | 0.0  |
-------------------------------------------------------------------------


| Num Of |              Ports pressure in cycles               |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |    |
---------------------------------------------------------------------
|   1    |           |     | 1.0   1.0 |           |     |     | CP | movsx r8w, byte ptr [r14]
Total Num Of Uops: 1