ADC (R64, 0)

With unroll_count=500 and no inner loop

Code:

   0:	49 83 d0 00          	adc    r8,0x0

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 2.0
- Reference cycles: 1.84
- UOPS_RETIRED.ANY: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.61
- UOPS_PORT_1: 0.7
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 1.0

With loop_count=1000 and unroll_count=10

Code:

   0:	49 83 d0 00          	adc    r8,0x0

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 2.7
- Reference cycles: 2.49
- UOPS_RETIRED.ANY: 2.2
- RETIRE_SLOTS: 2.2
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.8
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.01

With loop_count=100 and unroll_count=100

Code:

   0:	49 83 d0 00          	adc    r8,0x0

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 2.07
- Reference cycles: 1.91
- UOPS_RETIRED.ANY: 2.02
- RETIRE_SLOTS: 2.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.62
- UOPS_PORT_1: 0.69
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 1.0

With additional dependency-breaking instructions

With unroll_count=500 and no inner loop

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	49 83 d0 00          	adc    r8,0x0

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 2.0
- Reference cycles: 1.84
- UOPS_RETIRED.ANY: 2.99
- RETIRE_SLOTS: 3.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 1.0

With loop_count=1000 and unroll_count=10

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	49 83 d0 00          	adc    r8,0x0

Show nanoBench command
Results:
- Instructions retired: 2.2
- Core cycles: 2.0
- Reference cycles: 1.85
- UOPS_RETIRED.ANY: 3.2
- RETIRE_SLOTS: 3.2
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.04
- UOPS_PORT_1: 1.03
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 1.0

With loop_count=100 and unroll_count=100

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	49 83 d0 00          	adc    r8,0x0

Show nanoBench command
Results:
- Instructions retired: 2.02
- Core cycles: 2.0
- Reference cycles: 1.85
- UOPS_RETIRED.ANY: 3.02
- RETIRE_SLOTS: 3.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 1.01
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 1.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	49 83 d0 00          	adc    r8,0x0
   4:	49 83 d1 00          	adc    r9,0x0
   8:	49 83 d2 00          	adc    r10,0x0
   c:	49 83 d3 00          	adc    r11,0x0

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 8.0
- Reference cycles: 7.4
- UOPS_RETIRED.ANY: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.4
- UOPS_PORT_1: 2.8
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 4.0

With loop_count=1000 and unroll_count=2

Code:

   0:	49 83 d0 00          	adc    r8,0x0
   4:	49 83 d1 00          	adc    r9,0x0
   8:	49 83 d2 00          	adc    r10,0x0
   c:	49 83 d3 00          	adc    r11,0x0

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 11.51
- Reference cycles: 10.62
- UOPS_RETIRED.ANY: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.0
- UOPS_PORT_1: 2.51
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.05

With loop_count=100 and unroll_count=20

Code:

   0:	49 83 d0 00          	adc    r8,0x0
   4:	49 83 d1 00          	adc    r9,0x0
   8:	49 83 d2 00          	adc    r10,0x0
   c:	49 83 d3 00          	adc    r11,0x0

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 8.35
- Reference cycles: 7.7
- UOPS_RETIRED.ANY: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.53
- UOPS_PORT_1: 2.75
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 4.01

With additional dependency-breaking instructions

With unroll_count=200 and no inner loop

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	49 83 d0 00          	adc    r8,0x0
   7:	4d 85 ff             	test   r15,r15
   a:	49 83 d1 00          	adc    r9,0x0
   e:	4d 85 ff             	test   r15,r15
  11:	49 83 d2 00          	adc    r10,0x0
  15:	4d 85 ff             	test   r15,r15
  18:	49 83 d3 00          	adc    r11,0x0

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 4.0
- Reference cycles: 3.68
- UOPS_RETIRED.ANY: 12.0
- RETIRE_SLOTS: 12.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.02
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 4.0

With loop_count=1000 and unroll_count=2

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	49 83 d0 00          	adc    r8,0x0
   7:	4d 85 ff             	test   r15,r15
   a:	49 83 d1 00          	adc    r9,0x0
   e:	4d 85 ff             	test   r15,r15
  11:	49 83 d2 00          	adc    r10,0x0
  15:	4d 85 ff             	test   r15,r15
  18:	49 83 d3 00          	adc    r11,0x0

Show nanoBench command
Results:
- Instructions retired: 9.0
- Core cycles: 5.0
- Reference cycles: 4.62
- UOPS_RETIRED.ANY: 13.0
- RETIRE_SLOTS: 13.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.13
- UOPS_PORT_1: 4.5
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.05

With loop_count=100 and unroll_count=20

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	49 83 d0 00          	adc    r8,0x0
   7:	4d 85 ff             	test   r15,r15
   a:	49 83 d1 00          	adc    r9,0x0
   e:	4d 85 ff             	test   r15,r15
  11:	49 83 d2 00          	adc    r10,0x0
  15:	4d 85 ff             	test   r15,r15
  18:	49 83 d3 00          	adc    r11,0x0

Show nanoBench command
Results:
- Instructions retired: 8.1
- Core cycles: 4.06
- Reference cycles: 3.75
- UOPS_RETIRED.ANY: 12.1
- RETIRE_SLOTS: 12.1
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.03
- UOPS_PORT_1: 4.02
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 4.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	49 83 d0 00          	adc    r8,0x0
   4:	49 83 d1 00          	adc    r9,0x0
   8:	49 83 d2 00          	adc    r10,0x0
   c:	49 83 d3 00          	adc    r11,0x0
  10:	49 83 d4 00          	adc    r12,0x0
  14:	49 83 d5 00          	adc    r13,0x0
  18:	49 83 d6 00          	adc    r14,0x0
  1c:	48 83 d3 00          	adc    rbx,0x0

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 15.98
- Reference cycles: 14.68
- UOPS_RETIRED.ANY: 16.0
- RETIRE_SLOTS: 16.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.85
- UOPS_PORT_1: 5.56
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 8.0

With loop_count=1000 and unroll_count=1

Code:

   0:	49 83 d0 00          	adc    r8,0x0
   4:	49 83 d1 00          	adc    r9,0x0
   8:	49 83 d2 00          	adc    r10,0x0
   c:	49 83 d3 00          	adc    r11,0x0
  10:	49 83 d4 00          	adc    r12,0x0
  14:	49 83 d5 00          	adc    r13,0x0
  18:	49 83 d6 00          	adc    r14,0x0
  1c:	48 83 d3 00          	adc    rbx,0x0

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 23.01
- Reference cycles: 21.24
- UOPS_RETIRED.ANY: 18.0
- RETIRE_SLOTS: 18.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.01
- UOPS_PORT_1: 5.01
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.11

With loop_count=100 and unroll_count=10

Code:

   0:	49 83 d0 00          	adc    r8,0x0
   4:	49 83 d1 00          	adc    r9,0x0
   8:	49 83 d2 00          	adc    r10,0x0
   c:	49 83 d3 00          	adc    r11,0x0
  10:	49 83 d4 00          	adc    r12,0x0
  14:	49 83 d5 00          	adc    r13,0x0
  18:	49 83 d6 00          	adc    r14,0x0
  1c:	48 83 d3 00          	adc    rbx,0x0

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 16.69
- Reference cycles: 15.41
- UOPS_RETIRED.ANY: 16.2
- RETIRE_SLOTS: 16.2
- UOPS_MS: 0.0
- UOPS_PORT_0: 5.05
- UOPS_PORT_1: 5.5
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 8.02

With additional dependency-breaking instructions

With unroll_count=100 and no inner loop

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	49 83 d0 00          	adc    r8,0x0
   7:	4d 85 ff             	test   r15,r15
   a:	49 83 d1 00          	adc    r9,0x0
   e:	4d 85 ff             	test   r15,r15
  11:	49 83 d2 00          	adc    r10,0x0
  15:	4d 85 ff             	test   r15,r15
  18:	49 83 d3 00          	adc    r11,0x0
  1c:	4d 85 ff             	test   r15,r15
  1f:	49 83 d4 00          	adc    r12,0x0
  23:	4d 85 ff             	test   r15,r15
  26:	49 83 d5 00          	adc    r13,0x0
  2a:	4d 85 ff             	test   r15,r15
  2d:	49 83 d6 00          	adc    r14,0x0
  31:	4d 85 ff             	test   r15,r15
  34:	48 83 d3 00          	adc    rbx,0x0

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 8.0
- Reference cycles: 7.36
- UOPS_RETIRED.ANY: 24.0
- RETIRE_SLOTS: 24.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 8.03
- UOPS_PORT_1: 7.99
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 8.0

With loop_count=1000 and unroll_count=1

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	49 83 d0 00          	adc    r8,0x0
   7:	4d 85 ff             	test   r15,r15
   a:	49 83 d1 00          	adc    r9,0x0
   e:	4d 85 ff             	test   r15,r15
  11:	49 83 d2 00          	adc    r10,0x0
  15:	4d 85 ff             	test   r15,r15
  18:	49 83 d3 00          	adc    r11,0x0
  1c:	4d 85 ff             	test   r15,r15
  1f:	49 83 d4 00          	adc    r12,0x0
  23:	4d 85 ff             	test   r15,r15
  26:	49 83 d5 00          	adc    r13,0x0
  2a:	4d 85 ff             	test   r15,r15
  2d:	49 83 d6 00          	adc    r14,0x0
  31:	4d 85 ff             	test   r15,r15
  34:	48 83 d3 00          	adc    rbx,0x0

Show nanoBench command
Results:
- Instructions retired: 18.0
- Core cycles: 9.62
- Reference cycles: 8.88
- UOPS_RETIRED.ANY: 26.0
- RETIRE_SLOTS: 26.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 8.6
- UOPS_PORT_1: 8.61
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.09

With loop_count=100 and unroll_count=10

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	49 83 d0 00          	adc    r8,0x0
   7:	4d 85 ff             	test   r15,r15
   a:	49 83 d1 00          	adc    r9,0x0
   e:	4d 85 ff             	test   r15,r15
  11:	49 83 d2 00          	adc    r10,0x0
  15:	4d 85 ff             	test   r15,r15
  18:	49 83 d3 00          	adc    r11,0x0
  1c:	4d 85 ff             	test   r15,r15
  1f:	49 83 d4 00          	adc    r12,0x0
  23:	4d 85 ff             	test   r15,r15
  26:	49 83 d5 00          	adc    r13,0x0
  2a:	4d 85 ff             	test   r15,r15
  2d:	49 83 d6 00          	adc    r14,0x0
  31:	4d 85 ff             	test   r15,r15
  34:	48 83 d3 00          	adc    rbx,0x0

Show nanoBench command
Results:
- Instructions retired: 16.2
- Core cycles: 8.12
- Reference cycles: 7.5
- UOPS_RETIRED.ANY: 24.2
- RETIRE_SLOTS: 24.2
- UOPS_MS: 0.0
- UOPS_PORT_0: 8.05
- UOPS_PORT_1: 8.08
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 8.01

With 13 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	49 83 d0 00          	adc    r8,0x0
   4:	49 83 d1 00          	adc    r9,0x0
   8:	49 83 d2 00          	adc    r10,0x0
   c:	49 83 d3 00          	adc    r11,0x0
  10:	49 83 d4 00          	adc    r12,0x0
  14:	49 83 d5 00          	adc    r13,0x0
  18:	49 83 d6 00          	adc    r14,0x0
  1c:	48 83 d3 00          	adc    rbx,0x0
  20:	48 83 d1 00          	adc    rcx,0x0
  24:	48 83 d2 00          	adc    rdx,0x0
  28:	48 83 d7 00          	adc    rdi,0x0
  2c:	48 83 d6 00          	adc    rsi,0x0
  30:	48 83 d5 00          	adc    rbp,0x0

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 25.98
- Reference cycles: 24.0
- UOPS_RETIRED.ANY: 26.0
- RETIRE_SLOTS: 26.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 7.83
- UOPS_PORT_1: 9.09
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 13.0

With loop_count=1000 and unroll_count=1

Code:

   0:	49 83 d0 00          	adc    r8,0x0
   4:	49 83 d1 00          	adc    r9,0x0
   8:	49 83 d2 00          	adc    r10,0x0
   c:	49 83 d3 00          	adc    r11,0x0
  10:	49 83 d4 00          	adc    r12,0x0
  14:	49 83 d5 00          	adc    r13,0x0
  18:	49 83 d6 00          	adc    r14,0x0
  1c:	48 83 d3 00          	adc    rbx,0x0
  20:	48 83 d1 00          	adc    rcx,0x0
  24:	48 83 d2 00          	adc    rdx,0x0
  28:	48 83 d7 00          	adc    rdi,0x0
  2c:	48 83 d6 00          	adc    rsi,0x0
  30:	48 83 d5 00          	adc    rbp,0x0

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 33.0
- Reference cycles: 30.46
- UOPS_RETIRED.ANY: 28.0
- RETIRE_SLOTS: 28.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 8.01
- UOPS_PORT_1: 10.96
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.17

With loop_count=100 and unroll_count=10

Code:

   0:	49 83 d0 00          	adc    r8,0x0
   4:	49 83 d1 00          	adc    r9,0x0
   8:	49 83 d2 00          	adc    r10,0x0
   c:	49 83 d3 00          	adc    r11,0x0
  10:	49 83 d4 00          	adc    r12,0x0
  14:	49 83 d5 00          	adc    r13,0x0
  18:	49 83 d6 00          	adc    r14,0x0
  1c:	48 83 d3 00          	adc    rbx,0x0
  20:	48 83 d1 00          	adc    rcx,0x0
  24:	48 83 d2 00          	adc    rdx,0x0
  28:	48 83 d7 00          	adc    rdi,0x0
  2c:	48 83 d6 00          	adc    rsi,0x0
  30:	48 83 d5 00          	adc    rbp,0x0

Show nanoBench command
Results:
- Instructions retired: 13.2
- Core cycles: 26.69
- Reference cycles: 24.64
- UOPS_RETIRED.ANY: 26.2
- RETIRE_SLOTS: 26.2
- UOPS_MS: 0.0
- UOPS_PORT_0: 7.76
- UOPS_PORT_1: 9.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 13.02

With additional dependency-breaking instructions

With unroll_count=100 and no inner loop

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	49 83 d0 00          	adc    r8,0x0
   7:	4d 85 ff             	test   r15,r15
   a:	49 83 d1 00          	adc    r9,0x0
   e:	4d 85 ff             	test   r15,r15
  11:	49 83 d2 00          	adc    r10,0x0
  15:	4d 85 ff             	test   r15,r15
  18:	49 83 d3 00          	adc    r11,0x0
  1c:	4d 85 ff             	test   r15,r15
  1f:	49 83 d4 00          	adc    r12,0x0
  23:	4d 85 ff             	test   r15,r15
  26:	49 83 d5 00          	adc    r13,0x0
  2a:	4d 85 ff             	test   r15,r15
  2d:	49 83 d6 00          	adc    r14,0x0
  31:	4d 85 ff             	test   r15,r15
  34:	48 83 d3 00          	adc    rbx,0x0
  38:	4d 85 ff             	test   r15,r15
  3b:	48 83 d1 00          	adc    rcx,0x0
  3f:	4d 85 ff             	test   r15,r15
  42:	48 83 d2 00          	adc    rdx,0x0
  46:	4d 85 ff             	test   r15,r15
  49:	48 83 d7 00          	adc    rdi,0x0
  4d:	4d 85 ff             	test   r15,r15
  50:	48 83 d6 00          	adc    rsi,0x0
  54:	4d 85 ff             	test   r15,r15
  57:	48 83 d5 00          	adc    rbp,0x0

Show nanoBench command
Results:
- Instructions retired: 26.0
- Core cycles: 13.02
- Reference cycles: 12.08
- UOPS_RETIRED.ANY: 39.0
- RETIRE_SLOTS: 39.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 13.02
- UOPS_PORT_1: 12.97
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 13.0

With loop_count=1000 and unroll_count=1

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	49 83 d0 00          	adc    r8,0x0
   7:	4d 85 ff             	test   r15,r15
   a:	49 83 d1 00          	adc    r9,0x0
   e:	4d 85 ff             	test   r15,r15
  11:	49 83 d2 00          	adc    r10,0x0
  15:	4d 85 ff             	test   r15,r15
  18:	49 83 d3 00          	adc    r11,0x0
  1c:	4d 85 ff             	test   r15,r15
  1f:	49 83 d4 00          	adc    r12,0x0
  23:	4d 85 ff             	test   r15,r15
  26:	49 83 d5 00          	adc    r13,0x0
  2a:	4d 85 ff             	test   r15,r15
  2d:	49 83 d6 00          	adc    r14,0x0
  31:	4d 85 ff             	test   r15,r15
  34:	48 83 d3 00          	adc    rbx,0x0
  38:	4d 85 ff             	test   r15,r15
  3b:	48 83 d1 00          	adc    rcx,0x0
  3f:	4d 85 ff             	test   r15,r15
  42:	48 83 d2 00          	adc    rdx,0x0
  46:	4d 85 ff             	test   r15,r15
  49:	48 83 d7 00          	adc    rdi,0x0
  4d:	4d 85 ff             	test   r15,r15
  50:	48 83 d6 00          	adc    rsi,0x0
  54:	4d 85 ff             	test   r15,r15
  57:	48 83 d5 00          	adc    rbp,0x0

Show nanoBench command
Results:
- Instructions retired: 28.0
- Core cycles: 14.02
- Reference cycles: 12.94
- UOPS_RETIRED.ANY: 41.0
- RETIRE_SLOTS: 41.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 13.81
- UOPS_PORT_1: 13.81
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 13.02

With loop_count=100 and unroll_count=10

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	49 83 d0 00          	adc    r8,0x0
   7:	4d 85 ff             	test   r15,r15
   a:	49 83 d1 00          	adc    r9,0x0
   e:	4d 85 ff             	test   r15,r15
  11:	49 83 d2 00          	adc    r10,0x0
  15:	4d 85 ff             	test   r15,r15
  18:	49 83 d3 00          	adc    r11,0x0
  1c:	4d 85 ff             	test   r15,r15
  1f:	49 83 d4 00          	adc    r12,0x0
  23:	4d 85 ff             	test   r15,r15
  26:	49 83 d5 00          	adc    r13,0x0
  2a:	4d 85 ff             	test   r15,r15
  2d:	49 83 d6 00          	adc    r14,0x0
  31:	4d 85 ff             	test   r15,r15
  34:	48 83 d3 00          	adc    rbx,0x0
  38:	4d 85 ff             	test   r15,r15
  3b:	48 83 d1 00          	adc    rcx,0x0
  3f:	4d 85 ff             	test   r15,r15
  42:	48 83 d2 00          	adc    rdx,0x0
  46:	4d 85 ff             	test   r15,r15
  49:	48 83 d7 00          	adc    rdi,0x0
  4d:	4d 85 ff             	test   r15,r15
  50:	48 83 d6 00          	adc    rsi,0x0
  54:	4d 85 ff             	test   r15,r15
  57:	48 83 d5 00          	adc    rbp,0x0

Show nanoBench command
Results:
- Instructions retired: 26.2
- Core cycles: 13.12
- Reference cycles: 12.27
- UOPS_RETIRED.ANY: 39.2
- RETIRE_SLOTS: 39.2
- UOPS_MS: 0.0
- UOPS_PORT_0: 13.07
- UOPS_PORT_1: 13.09
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 13.02

ADC (R64, 0) - Throughput and Uops

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With additional dependency-breaking instructions

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With additional dependency-breaking instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With additional dependency-breaking instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 13 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With additional dependency-breaking instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10