ADC (AL, 0) - Throughput and Uops
With unroll_count=500 and no inner loop
Code:
0: 14 00 adc al,0x0
Show nanoBench command
Results:
Instructions retired: 1.0
Core cycles: 2.0
Reference cycles: 1.85
UOPS_RETIRED.ANY: 2.0
RETIRE_SLOTS: 2.0
UOPS_MS: 0.0
UOPS_PORT_0: 0.61
UOPS_PORT_1: 0.7
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 2.0
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
INST_DECODED.DEC0: 1.0
With loop_count=1000 and unroll_count=10
Code:
0: 14 00 adc al,0x0
Show nanoBench command
Results:
Instructions retired: 1.2
Core cycles: 2.7
Reference cycles: 2.49
UOPS_RETIRED.ANY: 2.2
RETIRE_SLOTS: 2.2
UOPS_MS: 0.0
UOPS_PORT_0: 0.5
UOPS_PORT_1: 0.8
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 2.7
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
INST_DECODED.DEC0: 0.01
With loop_count=100 and unroll_count=100
Code:
0: 14 00 adc al,0x0
Show nanoBench command
Results:
Instructions retired: 1.02
Core cycles: 2.07
Reference cycles: 1.91
UOPS_RETIRED.ANY: 2.02
RETIRE_SLOTS: 2.02
UOPS_MS: 0.0
UOPS_PORT_0: 0.62
UOPS_PORT_1: 0.69
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 0.0
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
INST_DECODED.DEC0: 1.0
With additional dependency-breaking instructions
With unroll_count=500 and no inner loop
Code:
0: 48 31 c0 xor rax,rax 3: 14 00 adc al,0x0
Show nanoBench command
Results:
Instructions retired: 2.0
Core cycles: 1.0
Reference cycles: 0.91
UOPS_RETIRED.ANY: 3.0
RETIRE_SLOTS: 3.0
UOPS_MS: 0.0
UOPS_PORT_0: 1.01
UOPS_PORT_1: 1.0
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 0.0
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
INST_DECODED.DEC0: 1.0
With loop_count=1000 and unroll_count=10
Code:
0: 48 31 c0 xor rax,rax 3: 14 00 adc al,0x0
Show nanoBench command
Results:
Instructions retired: 2.2
Core cycles: 1.1
Reference cycles: 1.02
UOPS_RETIRED.ANY: 3.2
RETIRE_SLOTS: 3.2
UOPS_MS: 0.0
UOPS_PORT_0: 1.05
UOPS_PORT_1: 1.05
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 1.1
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
INST_DECODED.DEC0: 1.0
With loop_count=100 and unroll_count=100
Code:
0: 48 31 c0 xor rax,rax 3: 14 00 adc al,0x0
Show nanoBench command
Results:
Instructions retired: 2.02
Core cycles: 1.01
Reference cycles: 0.97
UOPS_RETIRED.ANY: 3.02
RETIRE_SLOTS: 3.02
UOPS_MS: 0.0
UOPS_PORT_0: 1.01
UOPS_PORT_1: 1.01
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 1.01
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
INST_DECODED.DEC0: 1.0