VSQRTSS (XMM, XMM, XMM) - Throughput and Uops

With unroll_count=500 and no inner loop

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 3.0
  • Reference cycles: 1.75
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 1.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 6.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.25

With unroll_count=500 and no inner loop

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
     4:	0f ae e8             	lfence 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 24.2
  • Reference cycles: 14.45
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 0.98
  • UOPS_MS: 2.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 6.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 3.0
  • Reference cycles: 1.79
  • UOPS_EXECUTED.THREAD: 1.1
  • RETIRE_SLOTS: 1.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 6.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 3.0
  • Reference cycles: 1.8
  • UOPS_EXECUTED.THREAD: 1.01
  • RETIRE_SLOTS: 1.01
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 6.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With unroll_count=200 and no inner loop

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
     4:	c5 f2 51 d8          	vsqrtss xmm3,xmm1,xmm0
     8:	c5 f2 51 e0          	vsqrtss xmm4,xmm1,xmm0
     c:	c5 f2 51 e8          	vsqrtss xmm5,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 12.0
  • Reference cycles: 7.24
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 3.89
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 24.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
     4:	c5 f2 51 d8          	vsqrtss xmm3,xmm1,xmm0
     8:	c5 f2 51 e0          	vsqrtss xmm4,xmm1,xmm0
     c:	c5 f2 51 e8          	vsqrtss xmm5,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 12.01
  • Reference cycles: 7.18
  • UOPS_EXECUTED.THREAD: 4.5
  • RETIRE_SLOTS: 4.5
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.01
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 24.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
     4:	c5 f2 51 d8          	vsqrtss xmm3,xmm1,xmm0
     8:	c5 f2 51 e0          	vsqrtss xmm4,xmm1,xmm0
     c:	c5 f2 51 e8          	vsqrtss xmm5,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 12.01
  • Reference cycles: 7.18
  • UOPS_EXECUTED.THREAD: 4.05
  • RETIRE_SLOTS: 4.05
  • UOPS_MITE: 0.05
  • UOPS_MS: 0.01
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 24.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=100 and no inner loop

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
     4:	c5 f2 51 d8          	vsqrtss xmm3,xmm1,xmm0
     8:	c5 f2 51 e0          	vsqrtss xmm4,xmm1,xmm0
     c:	c5 f2 51 e8          	vsqrtss xmm5,xmm1,xmm0
    10:	c5 f2 51 f0          	vsqrtss xmm6,xmm1,xmm0
    14:	c5 f2 51 f8          	vsqrtss xmm7,xmm1,xmm0
    18:	c5 72 51 c0          	vsqrtss xmm8,xmm1,xmm0
    1c:	c5 72 51 c8          	vsqrtss xmm9,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 24.0
  • Reference cycles: 14.11
  • UOPS_EXECUTED.THREAD: 8.0
  • RETIRE_SLOTS: 8.0
  • UOPS_MITE: 8.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 48.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
     4:	c5 f2 51 d8          	vsqrtss xmm3,xmm1,xmm0
     8:	c5 f2 51 e0          	vsqrtss xmm4,xmm1,xmm0
     c:	c5 f2 51 e8          	vsqrtss xmm5,xmm1,xmm0
    10:	c5 f2 51 f0          	vsqrtss xmm6,xmm1,xmm0
    14:	c5 f2 51 f8          	vsqrtss xmm7,xmm1,xmm0
    18:	c5 72 51 c0          	vsqrtss xmm8,xmm1,xmm0
    1c:	c5 72 51 c8          	vsqrtss xmm9,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 24.02
  • Reference cycles: 14.34
  • UOPS_EXECUTED.THREAD: 9.0
  • RETIRE_SLOTS: 9.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 48.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
     4:	c5 f2 51 d8          	vsqrtss xmm3,xmm1,xmm0
     8:	c5 f2 51 e0          	vsqrtss xmm4,xmm1,xmm0
     c:	c5 f2 51 e8          	vsqrtss xmm5,xmm1,xmm0
    10:	c5 f2 51 f0          	vsqrtss xmm6,xmm1,xmm0
    14:	c5 f2 51 f8          	vsqrtss xmm7,xmm1,xmm0
    18:	c5 72 51 c0          	vsqrtss xmm8,xmm1,xmm0
    1c:	c5 72 51 c8          	vsqrtss xmm9,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 24.01
  • Reference cycles: 14.34
  • UOPS_EXECUTED.THREAD: 8.1
  • RETIRE_SLOTS: 8.1
  • UOPS_MITE: 0.09
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 48.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.02

With unroll_count=500 and no inner loop

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x72d30ff172d30ff1;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 3.0
  • Reference cycles: 1.78
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 1.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 6.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.25

With unroll_count=500 and no inner loop

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
     4:	0f ae e8             	lfence 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x72d30ff172d30ff1;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 24.2
  • Reference cycles: 14.43
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 0.98
  • UOPS_MS: 2.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 6.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x72d30ff172d30ff1;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 3.0
  • Reference cycles: 1.79
  • UOPS_EXECUTED.THREAD: 1.1
  • RETIRE_SLOTS: 1.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 6.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x72d30ff172d30ff1;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 3.0
  • Reference cycles: 1.93
  • UOPS_EXECUTED.THREAD: 1.01
  • RETIRE_SLOTS: 1.01
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 6.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With unroll_count=200 and no inner loop

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
     4:	c5 f2 51 d8          	vsqrtss xmm3,xmm1,xmm0
     8:	c5 f2 51 e0          	vsqrtss xmm4,xmm1,xmm0
     c:	c5 f2 51 e8          	vsqrtss xmm5,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x72d30ff172d30ff1;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 12.0
  • Reference cycles: 7.12
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 24.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
     4:	c5 f2 51 d8          	vsqrtss xmm3,xmm1,xmm0
     8:	c5 f2 51 e0          	vsqrtss xmm4,xmm1,xmm0
     c:	c5 f2 51 e8          	vsqrtss xmm5,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x72d30ff172d30ff1;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 12.01
  • Reference cycles: 7.16
  • UOPS_EXECUTED.THREAD: 4.5
  • RETIRE_SLOTS: 4.5
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.01
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 24.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
     4:	c5 f2 51 d8          	vsqrtss xmm3,xmm1,xmm0
     8:	c5 f2 51 e0          	vsqrtss xmm4,xmm1,xmm0
     c:	c5 f2 51 e8          	vsqrtss xmm5,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x72d30ff172d30ff1;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 12.01
  • Reference cycles: 7.18
  • UOPS_EXECUTED.THREAD: 4.05
  • RETIRE_SLOTS: 4.05
  • UOPS_MITE: 0.04
  • UOPS_MS: 0.01
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 24.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=100 and no inner loop

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
     4:	c5 f2 51 d8          	vsqrtss xmm3,xmm1,xmm0
     8:	c5 f2 51 e0          	vsqrtss xmm4,xmm1,xmm0
     c:	c5 f2 51 e8          	vsqrtss xmm5,xmm1,xmm0
    10:	c5 f2 51 f0          	vsqrtss xmm6,xmm1,xmm0
    14:	c5 f2 51 f8          	vsqrtss xmm7,xmm1,xmm0
    18:	c5 72 51 c0          	vsqrtss xmm8,xmm1,xmm0
    1c:	c5 72 51 c8          	vsqrtss xmm9,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x72d30ff172d30ff1;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 24.0
  • Reference cycles: 14.6
  • UOPS_EXECUTED.THREAD: 8.0
  • RETIRE_SLOTS: 8.0
  • UOPS_MITE: 8.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 48.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
     4:	c5 f2 51 d8          	vsqrtss xmm3,xmm1,xmm0
     8:	c5 f2 51 e0          	vsqrtss xmm4,xmm1,xmm0
     c:	c5 f2 51 e8          	vsqrtss xmm5,xmm1,xmm0
    10:	c5 f2 51 f0          	vsqrtss xmm6,xmm1,xmm0
    14:	c5 f2 51 f8          	vsqrtss xmm7,xmm1,xmm0
    18:	c5 72 51 c0          	vsqrtss xmm8,xmm1,xmm0
    1c:	c5 72 51 c8          	vsqrtss xmm9,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x72d30ff172d30ff1;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 24.01
  • Reference cycles: 14.32
  • UOPS_EXECUTED.THREAD: 9.0
  • RETIRE_SLOTS: 9.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 48.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

• Code:

     0:	c5 f2 51 d0          	vsqrtss xmm2,xmm1,xmm0
     4:	c5 f2 51 d8          	vsqrtss xmm3,xmm1,xmm0
     8:	c5 f2 51 e0          	vsqrtss xmm4,xmm1,xmm0
     c:	c5 f2 51 e8          	vsqrtss xmm5,xmm1,xmm0
    10:	c5 f2 51 f0          	vsqrtss xmm6,xmm1,xmm0
    14:	c5 f2 51 f8          	vsqrtss xmm7,xmm1,xmm0
    18:	c5 72 51 c0          	vsqrtss xmm8,xmm1,xmm0
    1c:	c5 72 51 c8          	vsqrtss xmm9,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x72d30ff172d30ff1;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPS XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 24.01
  • Reference cycles: 14.36
  • UOPS_EXECUTED.THREAD: 8.1
  • RETIRE_SLOTS: 8.1
  • UOPS_MITE: 0.09
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 48.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.02