VCVTPD2PS (XMM, YMM) - Throughput and Uops

With unroll_count=500 and no inner loop

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 1.0
  • Reference cycles: 0.58
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 2.0
  • UOPS_MITE: 2.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.45
  • UOPS_PORT_1: 0.55
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
     4:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 1.0
  • Reference cycles: 0.58
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.44
  • UOPS_PORT_1: 0.56
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
     4:	90                   	nop
     5:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 1.0
  • Reference cycles: 0.58
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.44
  • UOPS_PORT_1: 0.56
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
     4:	90                   	nop
     5:	90                   	nop
     6:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 1.0
  • Reference cycles: 0.58
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 4.98
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.44
  • UOPS_PORT_1: 0.56
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 4 NOPs

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
     4:	90                   	nop
     5:	90                   	nop
     6:	90                   	nop
     7:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 2.0
  • Reference cycles: 1.05
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 6.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.5
  • UOPS_PORT_1: 0.5
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 1.0
  • Reference cycles: 0.6
  • UOPS_EXECUTED.THREAD: 2.1
  • RETIRE_SLOTS: 2.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.48
  • UOPS_PORT_1: 0.52
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 1.0
  • Reference cycles: 0.6
  • UOPS_EXECUTED.THREAD: 2.01
  • RETIRE_SLOTS: 2.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.49
  • UOPS_PORT_1: 0.51
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=200 and no inner loop

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
     4:	c5 fd 5a d1          	vcvtpd2ps xmm2,ymm1
     8:	c5 fd 5a d9          	vcvtpd2ps xmm3,ymm1
     c:	c5 fd 5a e1          	vcvtpd2ps xmm4,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 4.0
  • Reference cycles: 2.43
  • UOPS_EXECUTED.THREAD: 8.0
  • RETIRE_SLOTS: 8.0
  • UOPS_MITE: 7.88
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.78
  • UOPS_PORT_1: 2.23
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
     4:	c5 fd 5a d1          	vcvtpd2ps xmm2,ymm1
     8:	c5 fd 5a d9          	vcvtpd2ps xmm3,ymm1
     c:	c5 fd 5a e1          	vcvtpd2ps xmm4,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 4.01
  • Reference cycles: 2.38
  • UOPS_EXECUTED.THREAD: 8.5
  • RETIRE_SLOTS: 8.5
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.01
  • UOPS_PORT_0: 1.96
  • UOPS_PORT_1: 2.04
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
     4:	c5 fd 5a d1          	vcvtpd2ps xmm2,ymm1
     8:	c5 fd 5a d9          	vcvtpd2ps xmm3,ymm1
     c:	c5 fd 5a e1          	vcvtpd2ps xmm4,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 4.01
  • Reference cycles: 2.37
  • UOPS_EXECUTED.THREAD: 8.05
  • RETIRE_SLOTS: 8.05
  • UOPS_MITE: 0.08
  • UOPS_MS: 0.01
  • UOPS_PORT_0: 1.95
  • UOPS_PORT_1: 2.05
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.04

With unroll_count=100 and no inner loop

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
     4:	c5 fd 5a d1          	vcvtpd2ps xmm2,ymm1
     8:	c5 fd 5a d9          	vcvtpd2ps xmm3,ymm1
     c:	c5 fd 5a e1          	vcvtpd2ps xmm4,ymm1
    10:	c5 fd 5a e9          	vcvtpd2ps xmm5,ymm1
    14:	c5 fd 5a f1          	vcvtpd2ps xmm6,ymm1
    18:	c5 fd 5a f9          	vcvtpd2ps xmm7,ymm1
    1c:	c5 7d 5a c1          	vcvtpd2ps xmm8,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 8.0
  • Reference cycles: 4.99
  • UOPS_EXECUTED.THREAD: 16.0
  • RETIRE_SLOTS: 16.0
  • UOPS_MITE: 16.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 3.55
  • UOPS_PORT_1: 4.45
  • UOPS_PORT_5: 8.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
     4:	c5 fd 5a d1          	vcvtpd2ps xmm2,ymm1
     8:	c5 fd 5a d9          	vcvtpd2ps xmm3,ymm1
     c:	c5 fd 5a e1          	vcvtpd2ps xmm4,ymm1
    10:	c5 fd 5a e9          	vcvtpd2ps xmm5,ymm1
    14:	c5 fd 5a f1          	vcvtpd2ps xmm6,ymm1
    18:	c5 fd 5a f9          	vcvtpd2ps xmm7,ymm1
    1c:	c5 7d 5a c1          	vcvtpd2ps xmm8,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 8.01
  • Reference cycles: 4.77
  • UOPS_EXECUTED.THREAD: 17.0
  • RETIRE_SLOTS: 17.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 3.92
  • UOPS_PORT_1: 4.08
  • UOPS_PORT_5: 8.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
     4:	c5 fd 5a d1          	vcvtpd2ps xmm2,ymm1
     8:	c5 fd 5a d9          	vcvtpd2ps xmm3,ymm1
     c:	c5 fd 5a e1          	vcvtpd2ps xmm4,ymm1
    10:	c5 fd 5a e9          	vcvtpd2ps xmm5,ymm1
    14:	c5 fd 5a f1          	vcvtpd2ps xmm6,ymm1
    18:	c5 fd 5a f9          	vcvtpd2ps xmm7,ymm1
    1c:	c5 7d 5a c1          	vcvtpd2ps xmm8,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 8.01
  • Reference cycles: 4.79
  • UOPS_EXECUTED.THREAD: 16.11
  • RETIRE_SLOTS: 16.1
  • UOPS_MITE: 0.17
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 3.88
  • UOPS_PORT_1: 4.12
  • UOPS_PORT_5: 8.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.08

With unroll_count=100 and no inner loop

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
     4:	c5 fd 5a d1          	vcvtpd2ps xmm2,ymm1
     8:	c5 fd 5a d9          	vcvtpd2ps xmm3,ymm1
     c:	c5 fd 5a e1          	vcvtpd2ps xmm4,ymm1
    10:	c5 fd 5a e9          	vcvtpd2ps xmm5,ymm1
    14:	c5 fd 5a f1          	vcvtpd2ps xmm6,ymm1
    18:	c5 fd 5a f9          	vcvtpd2ps xmm7,ymm1
    1c:	c5 7d 5a c1          	vcvtpd2ps xmm8,ymm1
    20:	c5 7d 5a c9          	vcvtpd2ps xmm9,ymm1
    24:	c5 7d 5a d1          	vcvtpd2ps xmm10,ymm1
    28:	c5 7d 5a d9          	vcvtpd2ps xmm11,ymm1
    2c:	c5 7d 5a e1          	vcvtpd2ps xmm12,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 12.0
  • Core cycles: 12.0
  • Reference cycles: 7.18
  • UOPS_EXECUTED.THREAD: 24.0
  • RETIRE_SLOTS: 24.0
  • UOPS_MITE: 24.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 5.32
  • UOPS_PORT_1: 6.68
  • UOPS_PORT_5: 12.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 12.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
     4:	c5 fd 5a d1          	vcvtpd2ps xmm2,ymm1
     8:	c5 fd 5a d9          	vcvtpd2ps xmm3,ymm1
     c:	c5 fd 5a e1          	vcvtpd2ps xmm4,ymm1
    10:	c5 fd 5a e9          	vcvtpd2ps xmm5,ymm1
    14:	c5 fd 5a f1          	vcvtpd2ps xmm6,ymm1
    18:	c5 fd 5a f9          	vcvtpd2ps xmm7,ymm1
    1c:	c5 7d 5a c1          	vcvtpd2ps xmm8,ymm1
    20:	c5 7d 5a c9          	vcvtpd2ps xmm9,ymm1
    24:	c5 7d 5a d1          	vcvtpd2ps xmm10,ymm1
    28:	c5 7d 5a d9          	vcvtpd2ps xmm11,ymm1
    2c:	c5 7d 5a e1          	vcvtpd2ps xmm12,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 14.0
  • Core cycles: 12.01
  • Reference cycles: 7.18
  • UOPS_EXECUTED.THREAD: 25.01
  • RETIRE_SLOTS: 25.0
  • UOPS_MITE: 0.43
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 5.75
  • UOPS_PORT_1: 6.26
  • UOPS_PORT_5: 12.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.2

With loop_count=100 and unroll_count=10

• Code:

     0:	c5 fd 5a c1          	vcvtpd2ps xmm0,ymm1
     4:	c5 fd 5a d1          	vcvtpd2ps xmm2,ymm1
     8:	c5 fd 5a d9          	vcvtpd2ps xmm3,ymm1
     c:	c5 fd 5a e1          	vcvtpd2ps xmm4,ymm1
    10:	c5 fd 5a e9          	vcvtpd2ps xmm5,ymm1
    14:	c5 fd 5a f1          	vcvtpd2ps xmm6,ymm1
    18:	c5 fd 5a f9          	vcvtpd2ps xmm7,ymm1
    1c:	c5 7d 5a c1          	vcvtpd2ps xmm8,ymm1
    20:	c5 7d 5a c9          	vcvtpd2ps xmm9,ymm1
    24:	c5 7d 5a d1          	vcvtpd2ps xmm10,ymm1
    28:	c5 7d 5a d9          	vcvtpd2ps xmm11,ymm1
    2c:	c5 7d 5a e1          	vcvtpd2ps xmm12,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 12.2
  • Core cycles: 12.01
  • Reference cycles: 7.15
  • UOPS_EXECUTED.THREAD: 24.1
  • RETIRE_SLOTS: 24.11
  • UOPS_MITE: 0.24
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 5.86
  • UOPS_PORT_1: 6.15
  • UOPS_PORT_5: 12.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.12

With unroll_count=500 and no inner loop

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 7.0
  • Reference cycles: 4.19
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 2.0
  • UOPS_MITE: 2.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.49
  • UOPS_PORT_1: 0.51
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
     4:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 7.0
  • Reference cycles: 4.14
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.49
  • UOPS_PORT_1: 0.51
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
     4:	90                   	nop
     5:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 7.0
  • Reference cycles: 4.14
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.49
  • UOPS_PORT_1: 0.51
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
     4:	90                   	nop
     5:	90                   	nop
     6:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 7.0
  • Reference cycles: 4.16
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 5.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.48
  • UOPS_PORT_1: 0.52
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 4 NOPs

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
     4:	90                   	nop
     5:	90                   	nop
     6:	90                   	nop
     7:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 7.0
  • Reference cycles: 4.21
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 6.03
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.49
  • UOPS_PORT_1: 0.51
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 7.0
  • Reference cycles: 4.19
  • UOPS_EXECUTED.THREAD: 2.1
  • RETIRE_SLOTS: 2.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.5
  • UOPS_PORT_1: 0.5
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 7.0
  • Reference cycles: 4.19
  • UOPS_EXECUTED.THREAD: 2.01
  • RETIRE_SLOTS: 2.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.49
  • UOPS_PORT_1: 0.51
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=200 and no inner loop

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
     4:	c5 fd 5a c9          	vcvtpd2ps xmm1,ymm1
     8:	c5 fd 5a d2          	vcvtpd2ps xmm2,ymm2
     c:	c5 fd 5a db          	vcvtpd2ps xmm3,ymm3
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14];
  VMOVUPD YMM1, [R14];
  VMOVUPD YMM2, [R14];
  VMOVUPD YMM3, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 7.0
  • Reference cycles: 4.38
  • UOPS_EXECUTED.THREAD: 8.0
  • RETIRE_SLOTS: 8.0
  • UOPS_MITE: 8.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.98
  • UOPS_PORT_1: 2.02
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
     4:	c5 fd 5a c9          	vcvtpd2ps xmm1,ymm1
     8:	c5 fd 5a d2          	vcvtpd2ps xmm2,ymm2
     c:	c5 fd 5a db          	vcvtpd2ps xmm3,ymm3
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14];
  VMOVUPD YMM1, [R14];
  VMOVUPD YMM2, [R14];
  VMOVUPD YMM3, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 7.0
  • Reference cycles: 4.19
  • UOPS_EXECUTED.THREAD: 8.5
  • RETIRE_SLOTS: 8.5
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.01
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 2.0
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
     4:	c5 fd 5a c9          	vcvtpd2ps xmm1,ymm1
     8:	c5 fd 5a d2          	vcvtpd2ps xmm2,ymm2
     c:	c5 fd 5a db          	vcvtpd2ps xmm3,ymm3
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14];
  VMOVUPD YMM1, [R14];
  VMOVUPD YMM2, [R14];
  VMOVUPD YMM3, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 7.0
  • Reference cycles: 4.17
  • UOPS_EXECUTED.THREAD: 8.05
  • RETIRE_SLOTS: 8.05
  • UOPS_MITE: 0.08
  • UOPS_MS: 0.01
  • UOPS_PORT_0: 1.98
  • UOPS_PORT_1: 2.02
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.04

With unroll_count=100 and no inner loop

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
     4:	c5 fd 5a c9          	vcvtpd2ps xmm1,ymm1
     8:	c5 fd 5a d2          	vcvtpd2ps xmm2,ymm2
     c:	c5 fd 5a db          	vcvtpd2ps xmm3,ymm3
    10:	c5 fd 5a e4          	vcvtpd2ps xmm4,ymm4
    14:	c5 fd 5a ed          	vcvtpd2ps xmm5,ymm5
    18:	c5 fd 5a f6          	vcvtpd2ps xmm6,ymm6
    1c:	c5 fd 5a ff          	vcvtpd2ps xmm7,ymm7
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14];
  VMOVUPD YMM1, [R14];
  VMOVUPD YMM2, [R14];
  VMOVUPD YMM3, [R14];
  VMOVUPD YMM4, [R14];
  VMOVUPD YMM5, [R14];
  VMOVUPD YMM6, [R14];
  VMOVUPD YMM7, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 8.0
  • Reference cycles: 4.87
  • UOPS_EXECUTED.THREAD: 16.0
  • RETIRE_SLOTS: 16.0
  • UOPS_MITE: 16.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_5: 8.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
     4:	c5 fd 5a c9          	vcvtpd2ps xmm1,ymm1
     8:	c5 fd 5a d2          	vcvtpd2ps xmm2,ymm2
     c:	c5 fd 5a db          	vcvtpd2ps xmm3,ymm3
    10:	c5 fd 5a e4          	vcvtpd2ps xmm4,ymm4
    14:	c5 fd 5a ed          	vcvtpd2ps xmm5,ymm5
    18:	c5 fd 5a f6          	vcvtpd2ps xmm6,ymm6
    1c:	c5 fd 5a ff          	vcvtpd2ps xmm7,ymm7
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14];
  VMOVUPD YMM1, [R14];
  VMOVUPD YMM2, [R14];
  VMOVUPD YMM3, [R14];
  VMOVUPD YMM4, [R14];
  VMOVUPD YMM5, [R14];
  VMOVUPD YMM6, [R14];
  VMOVUPD YMM7, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 8.01
  • Reference cycles: 4.79
  • UOPS_EXECUTED.THREAD: 17.0
  • RETIRE_SLOTS: 17.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 3.99
  • UOPS_PORT_1: 4.01
  • UOPS_PORT_5: 8.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
     4:	c5 fd 5a c9          	vcvtpd2ps xmm1,ymm1
     8:	c5 fd 5a d2          	vcvtpd2ps xmm2,ymm2
     c:	c5 fd 5a db          	vcvtpd2ps xmm3,ymm3
    10:	c5 fd 5a e4          	vcvtpd2ps xmm4,ymm4
    14:	c5 fd 5a ed          	vcvtpd2ps xmm5,ymm5
    18:	c5 fd 5a f6          	vcvtpd2ps xmm6,ymm6
    1c:	c5 fd 5a ff          	vcvtpd2ps xmm7,ymm7
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14];
  VMOVUPD YMM1, [R14];
  VMOVUPD YMM2, [R14];
  VMOVUPD YMM3, [R14];
  VMOVUPD YMM4, [R14];
  VMOVUPD YMM5, [R14];
  VMOVUPD YMM6, [R14];
  VMOVUPD YMM7, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 8.01
  • Reference cycles: 4.82
  • UOPS_EXECUTED.THREAD: 16.1
  • RETIRE_SLOTS: 16.1
  • UOPS_MITE: 0.17
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 3.97
  • UOPS_PORT_1: 4.03
  • UOPS_PORT_5: 8.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.08

With unroll_count=100 and no inner loop

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
     4:	c5 fd 5a c9          	vcvtpd2ps xmm1,ymm1
     8:	c5 fd 5a d2          	vcvtpd2ps xmm2,ymm2
     c:	c5 fd 5a db          	vcvtpd2ps xmm3,ymm3
    10:	c5 fd 5a e4          	vcvtpd2ps xmm4,ymm4
    14:	c5 fd 5a ed          	vcvtpd2ps xmm5,ymm5
    18:	c5 fd 5a f6          	vcvtpd2ps xmm6,ymm6
    1c:	c5 fd 5a ff          	vcvtpd2ps xmm7,ymm7
    20:	c4 41 7d 5a c0       	vcvtpd2ps xmm8,ymm8
    25:	c4 41 7d 5a c9       	vcvtpd2ps xmm9,ymm9
    2a:	c4 41 7d 5a d2       	vcvtpd2ps xmm10,ymm10
    2f:	c4 41 7d 5a db       	vcvtpd2ps xmm11,ymm11
    34:	c4 41 7d 5a e4       	vcvtpd2ps xmm12,ymm12
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14];
  VMOVUPD YMM1, [R14];
  VMOVUPD YMM2, [R14];
  VMOVUPD YMM3, [R14];
  VMOVUPD YMM4, [R14];
  VMOVUPD YMM5, [R14];
  VMOVUPD YMM6, [R14];
  VMOVUPD YMM7, [R14];
  VMOVUPD YMM8, [R14];
  VMOVUPD YMM9, [R14];
  VMOVUPD YMM10, [R14];
  VMOVUPD YMM11, [R14];
  VMOVUPD YMM12, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 13.0
  • Core cycles: 13.0
  • Reference cycles: 7.3
  • UOPS_EXECUTED.THREAD: 26.0
  • RETIRE_SLOTS: 26.0
  • UOPS_MITE: 26.24
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 6.27
  • UOPS_PORT_1: 6.73
  • UOPS_PORT_5: 13.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 13.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
     4:	c5 fd 5a c9          	vcvtpd2ps xmm1,ymm1
     8:	c5 fd 5a d2          	vcvtpd2ps xmm2,ymm2
     c:	c5 fd 5a db          	vcvtpd2ps xmm3,ymm3
    10:	c5 fd 5a e4          	vcvtpd2ps xmm4,ymm4
    14:	c5 fd 5a ed          	vcvtpd2ps xmm5,ymm5
    18:	c5 fd 5a f6          	vcvtpd2ps xmm6,ymm6
    1c:	c5 fd 5a ff          	vcvtpd2ps xmm7,ymm7
    20:	c4 41 7d 5a c0       	vcvtpd2ps xmm8,ymm8
    25:	c4 41 7d 5a c9       	vcvtpd2ps xmm9,ymm9
    2a:	c4 41 7d 5a d2       	vcvtpd2ps xmm10,ymm10
    2f:	c4 41 7d 5a db       	vcvtpd2ps xmm11,ymm11
    34:	c4 41 7d 5a e4       	vcvtpd2ps xmm12,ymm12
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14];
  VMOVUPD YMM1, [R14];
  VMOVUPD YMM2, [R14];
  VMOVUPD YMM3, [R14];
  VMOVUPD YMM4, [R14];
  VMOVUPD YMM5, [R14];
  VMOVUPD YMM6, [R14];
  VMOVUPD YMM7, [R14];
  VMOVUPD YMM8, [R14];
  VMOVUPD YMM9, [R14];
  VMOVUPD YMM10, [R14];
  VMOVUPD YMM11, [R14];
  VMOVUPD YMM12, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 15.0
  • Core cycles: 13.01
  • Reference cycles: 7.81
  • UOPS_EXECUTED.THREAD: 27.0
  • RETIRE_SLOTS: 27.0
  • UOPS_MITE: 0.04
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 6.46
  • UOPS_PORT_1: 6.54
  • UOPS_PORT_5: 13.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

• Code:

     0:	c5 fd 5a c0          	vcvtpd2ps xmm0,ymm0
     4:	c5 fd 5a c9          	vcvtpd2ps xmm1,ymm1
     8:	c5 fd 5a d2          	vcvtpd2ps xmm2,ymm2
     c:	c5 fd 5a db          	vcvtpd2ps xmm3,ymm3
    10:	c5 fd 5a e4          	vcvtpd2ps xmm4,ymm4
    14:	c5 fd 5a ed          	vcvtpd2ps xmm5,ymm5
    18:	c5 fd 5a f6          	vcvtpd2ps xmm6,ymm6
    1c:	c5 fd 5a ff          	vcvtpd2ps xmm7,ymm7
    20:	c4 41 7d 5a c0       	vcvtpd2ps xmm8,ymm8
    25:	c4 41 7d 5a c9       	vcvtpd2ps xmm9,ymm9
    2a:	c4 41 7d 5a d2       	vcvtpd2ps xmm10,ymm10
    2f:	c4 41 7d 5a db       	vcvtpd2ps xmm11,ymm11
    34:	c4 41 7d 5a e4       	vcvtpd2ps xmm12,ymm12
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14];
  VMOVUPD YMM1, [R14];
  VMOVUPD YMM2, [R14];
  VMOVUPD YMM3, [R14];
  VMOVUPD YMM4, [R14];
  VMOVUPD YMM5, [R14];
  VMOVUPD YMM6, [R14];
  VMOVUPD YMM7, [R14];
  VMOVUPD YMM8, [R14];
  VMOVUPD YMM9, [R14];
  VMOVUPD YMM10, [R14];
  VMOVUPD YMM11, [R14];
  VMOVUPD YMM12, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 13.2
  • Core cycles: 13.01
  • Reference cycles: 7.75
  • UOPS_EXECUTED.THREAD: 26.1
  • RETIRE_SLOTS: 26.1
  • UOPS_MITE: 0.27
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 6.46
  • UOPS_PORT_1: 6.54
  • UOPS_PORT_5: 13.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.13