MULSS (XMM, XMM)

With unroll_count=500 and no inner loop

Code:

   0:	f3 0f 59 c1          	mulss  xmm0,xmm1

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 4.0
- Reference cycles: 2.43
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.49
- UOPS_PORT_1: 0.51
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	f3 0f 59 c1          	mulss  xmm0,xmm1

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 4.0
- Reference cycles: 2.39
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	f3 0f 59 c1          	mulss  xmm0,xmm1

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 4.0
- Reference cycles: 2.39
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.51
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	f3 0f 59 c1          	mulss  xmm0,xmm1
   4:	f3 0f 59 d1          	mulss  xmm2,xmm1
   8:	f3 0f 59 d9          	mulss  xmm3,xmm1
   c:	f3 0f 59 e1          	mulss  xmm4,xmm1

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 2.25
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.98
- UOPS_PORT_1: 2.02
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	f3 0f 59 c1          	mulss  xmm0,xmm1
   4:	f3 0f 59 d1          	mulss  xmm2,xmm1
   8:	f3 0f 59 d9          	mulss  xmm3,xmm1
   c:	f3 0f 59 e1          	mulss  xmm4,xmm1

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.0
- Reference cycles: 2.38
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.01
- UOPS_MS: 0.01
- UOPS_PORT_0: 1.99
- UOPS_PORT_1: 2.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	f3 0f 59 c1          	mulss  xmm0,xmm1
   4:	f3 0f 59 d1          	mulss  xmm2,xmm1
   8:	f3 0f 59 d9          	mulss  xmm3,xmm1
   c:	f3 0f 59 e1          	mulss  xmm4,xmm1

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.0
- Reference cycles: 2.38
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.01
- UOPS_PORT_0: 1.99
- UOPS_PORT_1: 2.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f3 0f 59 c1          	mulss  xmm0,xmm1
   4:	f3 0f 59 d1          	mulss  xmm2,xmm1
   8:	f3 0f 59 d9          	mulss  xmm3,xmm1
   c:	f3 0f 59 e1          	mulss  xmm4,xmm1
  10:	f3 0f 59 e9          	mulss  xmm5,xmm1
  14:	f3 0f 59 f1          	mulss  xmm6,xmm1
  18:	f3 0f 59 f9          	mulss  xmm7,xmm1
  1c:	f3 44 0f 59 c1       	mulss  xmm8,xmm1

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 4.22
- Reference cycles: 2.8
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 3.98
- UOPS_PORT_1: 4.02
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.98

With loop_count=1000 and unroll_count=1

Code:

   0:	f3 0f 59 c1          	mulss  xmm0,xmm1
   4:	f3 0f 59 d1          	mulss  xmm2,xmm1
   8:	f3 0f 59 d9          	mulss  xmm3,xmm1
   c:	f3 0f 59 e1          	mulss  xmm4,xmm1
  10:	f3 0f 59 e9          	mulss  xmm5,xmm1
  14:	f3 0f 59 f1          	mulss  xmm6,xmm1
  18:	f3 0f 59 f9          	mulss  xmm7,xmm1
  1c:	f3 44 0f 59 c1       	mulss  xmm8,xmm1

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14]

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 4.38
- Reference cycles: 2.62
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.01
- UOPS_MITE: 0.02
- UOPS_MS: 0.02
- UOPS_PORT_0: 3.99
- UOPS_PORT_1: 4.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f3 0f 59 c1          	mulss  xmm0,xmm1
   4:	f3 0f 59 d1          	mulss  xmm2,xmm1
   8:	f3 0f 59 d9          	mulss  xmm3,xmm1
   c:	f3 0f 59 e1          	mulss  xmm4,xmm1
  10:	f3 0f 59 e9          	mulss  xmm5,xmm1
  14:	f3 0f 59 f1          	mulss  xmm6,xmm1
  18:	f3 0f 59 f9          	mulss  xmm7,xmm1
  1c:	f3 44 0f 59 c1       	mulss  xmm8,xmm1

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 4.23
- Reference cycles: 2.56
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.1
- UOPS_MS: 0.02
- UOPS_PORT_0: 3.98
- UOPS_PORT_1: 4.02
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 12 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f3 0f 59 c1          	mulss  xmm0,xmm1
   4:	f3 0f 59 d1          	mulss  xmm2,xmm1
   8:	f3 0f 59 d9          	mulss  xmm3,xmm1
   c:	f3 0f 59 e1          	mulss  xmm4,xmm1
  10:	f3 0f 59 e9          	mulss  xmm5,xmm1
  14:	f3 0f 59 f1          	mulss  xmm6,xmm1
  18:	f3 0f 59 f9          	mulss  xmm7,xmm1
  1c:	f3 44 0f 59 c1       	mulss  xmm8,xmm1
  21:	f3 44 0f 59 c9       	mulss  xmm9,xmm1
  26:	f3 44 0f 59 d1       	mulss  xmm10,xmm1
  2b:	f3 44 0f 59 d9       	mulss  xmm11,xmm1
  30:	f3 44 0f 59 e1       	mulss  xmm12,xmm1

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 5.98
- Reference cycles: 3.65
- UOPS_EXECUTED.THREAD: 12.0
- RETIRE_SLOTS: 12.0
- UOPS_MITE: 12.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.0
- UOPS_PORT_1: 6.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 3.0

With loop_count=1000 and unroll_count=1

Code:

   0:	f3 0f 59 c1          	mulss  xmm0,xmm1
   4:	f3 0f 59 d1          	mulss  xmm2,xmm1
   8:	f3 0f 59 d9          	mulss  xmm3,xmm1
   c:	f3 0f 59 e1          	mulss  xmm4,xmm1
  10:	f3 0f 59 e9          	mulss  xmm5,xmm1
  14:	f3 0f 59 f1          	mulss  xmm6,xmm1
  18:	f3 0f 59 f9          	mulss  xmm7,xmm1
  1c:	f3 44 0f 59 c1       	mulss  xmm8,xmm1
  21:	f3 44 0f 59 c9       	mulss  xmm9,xmm1
  26:	f3 44 0f 59 d1       	mulss  xmm10,xmm1
  2b:	f3 44 0f 59 d9       	mulss  xmm11,xmm1
  30:	f3 44 0f 59 e1       	mulss  xmm12,xmm1

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 14.0
- Core cycles: 6.01
- Reference cycles: 3.6
- UOPS_EXECUTED.THREAD: 13.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 0.0
- UOPS_MS: 0.02
- UOPS_PORT_0: 6.0
- UOPS_PORT_1: 6.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	f3 0f 59 c1          	mulss  xmm0,xmm1
   4:	f3 0f 59 d1          	mulss  xmm2,xmm1
   8:	f3 0f 59 d9          	mulss  xmm3,xmm1
   c:	f3 0f 59 e1          	mulss  xmm4,xmm1
  10:	f3 0f 59 e9          	mulss  xmm5,xmm1
  14:	f3 0f 59 f1          	mulss  xmm6,xmm1
  18:	f3 0f 59 f9          	mulss  xmm7,xmm1
  1c:	f3 44 0f 59 c1       	mulss  xmm8,xmm1
  21:	f3 44 0f 59 c9       	mulss  xmm9,xmm1
  26:	f3 44 0f 59 d1       	mulss  xmm10,xmm1
  2b:	f3 44 0f 59 d9       	mulss  xmm11,xmm1
  30:	f3 44 0f 59 e1       	mulss  xmm12,xmm1

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.2
- Core cycles: 6.01
- Reference cycles: 3.58
- UOPS_EXECUTED.THREAD: 12.11
- RETIRE_SLOTS: 12.1
- UOPS_MITE: 0.12
- UOPS_MS: 0.02
- UOPS_PORT_0: 6.0
- UOPS_PORT_1: 6.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.03

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	f3 0f 59 c0          	mulss  xmm0,xmm0

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 4.0
- Reference cycles: 2.38
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.49
- UOPS_PORT_1: 0.51
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	f3 0f 59 c0          	mulss  xmm0,xmm0

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 4.0
- Reference cycles: 2.39
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	f3 0f 59 c0          	mulss  xmm0,xmm0

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 4.0
- Reference cycles: 2.39
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.51
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	f3 0f 59 c0          	mulss  xmm0,xmm0
   4:	f3 0f 59 c9          	mulss  xmm1,xmm1
   8:	f3 0f 59 d2          	mulss  xmm2,xmm2
   c:	f3 0f 59 db          	mulss  xmm3,xmm3

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14]

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 2.56
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.98
- UOPS_PORT_1: 2.02
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	f3 0f 59 c0          	mulss  xmm0,xmm0
   4:	f3 0f 59 c9          	mulss  xmm1,xmm1
   8:	f3 0f 59 d2          	mulss  xmm2,xmm2
   c:	f3 0f 59 db          	mulss  xmm3,xmm3

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14]

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.0
- Reference cycles: 2.4
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.01
- UOPS_MS: 0.01
- UOPS_PORT_0: 1.99
- UOPS_PORT_1: 2.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	f3 0f 59 c0          	mulss  xmm0,xmm0
   4:	f3 0f 59 c9          	mulss  xmm1,xmm1
   8:	f3 0f 59 d2          	mulss  xmm2,xmm2
   c:	f3 0f 59 db          	mulss  xmm3,xmm3

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14]

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.0
- Reference cycles: 2.68
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.05
- UOPS_MS: 0.01
- UOPS_PORT_0: 1.99
- UOPS_PORT_1: 2.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f3 0f 59 c0          	mulss  xmm0,xmm0
   4:	f3 0f 59 c9          	mulss  xmm1,xmm1
   8:	f3 0f 59 d2          	mulss  xmm2,xmm2
   c:	f3 0f 59 db          	mulss  xmm3,xmm3
  10:	f3 0f 59 e4          	mulss  xmm4,xmm4
  14:	f3 0f 59 ed          	mulss  xmm5,xmm5
  18:	f3 0f 59 f6          	mulss  xmm6,xmm6
  1c:	f3 0f 59 ff          	mulss  xmm7,xmm7

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 4.28
- Reference cycles: 2.8
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 3.98
- UOPS_PORT_1: 4.02
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	f3 0f 59 c0          	mulss  xmm0,xmm0
   4:	f3 0f 59 c9          	mulss  xmm1,xmm1
   8:	f3 0f 59 d2          	mulss  xmm2,xmm2
   c:	f3 0f 59 db          	mulss  xmm3,xmm3
  10:	f3 0f 59 e4          	mulss  xmm4,xmm4
  14:	f3 0f 59 ed          	mulss  xmm5,xmm5
  18:	f3 0f 59 f6          	mulss  xmm6,xmm6
  1c:	f3 0f 59 ff          	mulss  xmm7,xmm7

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14]

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 4.39
- Reference cycles: 2.64
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.01
- UOPS_MITE: 0.02
- UOPS_MS: 0.02
- UOPS_PORT_0: 3.99
- UOPS_PORT_1: 4.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f3 0f 59 c0          	mulss  xmm0,xmm0
   4:	f3 0f 59 c9          	mulss  xmm1,xmm1
   8:	f3 0f 59 d2          	mulss  xmm2,xmm2
   c:	f3 0f 59 db          	mulss  xmm3,xmm3
  10:	f3 0f 59 e4          	mulss  xmm4,xmm4
  14:	f3 0f 59 ed          	mulss  xmm5,xmm5
  18:	f3 0f 59 f6          	mulss  xmm6,xmm6
  1c:	f3 0f 59 ff          	mulss  xmm7,xmm7

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 4.25
- Reference cycles: 2.54
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.07
- UOPS_MS: 0.02
- UOPS_PORT_0: 3.98
- UOPS_PORT_1: 4.02
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 13 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f3 0f 59 c0          	mulss  xmm0,xmm0
   4:	f3 0f 59 c9          	mulss  xmm1,xmm1
   8:	f3 0f 59 d2          	mulss  xmm2,xmm2
   c:	f3 0f 59 db          	mulss  xmm3,xmm3
  10:	f3 0f 59 e4          	mulss  xmm4,xmm4
  14:	f3 0f 59 ed          	mulss  xmm5,xmm5
  18:	f3 0f 59 f6          	mulss  xmm6,xmm6
  1c:	f3 0f 59 ff          	mulss  xmm7,xmm7
  20:	f3 45 0f 59 c0       	mulss  xmm8,xmm8
  25:	f3 45 0f 59 c9       	mulss  xmm9,xmm9
  2a:	f3 45 0f 59 d2       	mulss  xmm10,xmm10
  2f:	f3 45 0f 59 db       	mulss  xmm11,xmm11
  34:	f3 45 0f 59 e4       	mulss  xmm12,xmm12

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 6.5
- Reference cycles: 3.89
- UOPS_EXECUTED.THREAD: 13.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 13.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.51
- UOPS_PORT_1: 6.49
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 3.23

With loop_count=1000 and unroll_count=1

Code:

   0:	f3 0f 59 c0          	mulss  xmm0,xmm0
   4:	f3 0f 59 c9          	mulss  xmm1,xmm1
   8:	f3 0f 59 d2          	mulss  xmm2,xmm2
   c:	f3 0f 59 db          	mulss  xmm3,xmm3
  10:	f3 0f 59 e4          	mulss  xmm4,xmm4
  14:	f3 0f 59 ed          	mulss  xmm5,xmm5
  18:	f3 0f 59 f6          	mulss  xmm6,xmm6
  1c:	f3 0f 59 ff          	mulss  xmm7,xmm7
  20:	f3 45 0f 59 c0       	mulss  xmm8,xmm8
  25:	f3 45 0f 59 c9       	mulss  xmm9,xmm9
  2a:	f3 45 0f 59 d2       	mulss  xmm10,xmm10
  2f:	f3 45 0f 59 db       	mulss  xmm11,xmm11
  34:	f3 45 0f 59 e4       	mulss  xmm12,xmm12

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 6.51
- Reference cycles: 3.87
- UOPS_EXECUTED.THREAD: 14.0
- RETIRE_SLOTS: 14.0
- UOPS_MITE: 0.02
- UOPS_MS: 0.02
- UOPS_PORT_0: 6.5
- UOPS_PORT_1: 6.5
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f3 0f 59 c0          	mulss  xmm0,xmm0
   4:	f3 0f 59 c9          	mulss  xmm1,xmm1
   8:	f3 0f 59 d2          	mulss  xmm2,xmm2
   c:	f3 0f 59 db          	mulss  xmm3,xmm3
  10:	f3 0f 59 e4          	mulss  xmm4,xmm4
  14:	f3 0f 59 ed          	mulss  xmm5,xmm5
  18:	f3 0f 59 f6          	mulss  xmm6,xmm6
  1c:	f3 0f 59 ff          	mulss  xmm7,xmm7
  20:	f3 45 0f 59 c0       	mulss  xmm8,xmm8
  25:	f3 45 0f 59 c9       	mulss  xmm9,xmm9
  2a:	f3 45 0f 59 d2       	mulss  xmm10,xmm10
  2f:	f3 45 0f 59 db       	mulss  xmm11,xmm11
  34:	f3 45 0f 59 e4       	mulss  xmm12,xmm12

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.2
- Core cycles: 6.51
- Reference cycles: 3.87
- UOPS_EXECUTED.THREAD: 13.11
- RETIRE_SLOTS: 13.1
- UOPS_MITE: 0.14
- UOPS_MS: 0.02
- UOPS_PORT_0: 6.5
- UOPS_PORT_1: 6.5
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.03

MULSS (XMM, XMM) - Throughput and Uops

With different registers for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 12 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 13 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10