VRSQRTSS (XMM, XMM, XMM) - Throughput and Uops (IACA 2.3)
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 1.00 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 1.0 0.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 0.0 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 1 | 1.0 | | | | | | CP | vrsqrtss xmm2, xmm1, xmm0
Total Num Of Uops: 1
With 8 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 8.00 Cycles Throughput Bottleneck: Backend. Port0
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 8.0 0.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 0.0 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 1 | 1.0 | | | | | | CP | vrsqrtss xmm2, xmm1, xmm0
| 1 | 1.0 | | | | | | CP | vrsqrtss xmm3, xmm1, xmm0
| 1 | 1.0 | | | | | | CP | vrsqrtss xmm4, xmm1, xmm0
| 1 | 1.0 | | | | | | CP | vrsqrtss xmm5, xmm1, xmm0
| 1 | 1.0 | | | | | | CP | vrsqrtss xmm6, xmm1, xmm0
| 1 | 1.0 | | | | | | CP | vrsqrtss xmm7, xmm1, xmm0
| 1 | 1.0 | | | | | | CP | vrsqrtss xmm8, xmm1, xmm0
| 1 | 1.0 | | | | | | CP | vrsqrtss xmm9, xmm1, xmm0
Total Num Of Uops: 8