VMOVDQA (M256, YMM) - Throughput and Uops (IACA 2.3)
With a non-indexed addressing mode
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 2.00 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.5 0.0 | 0.5 0.0 | 2.0 | 0.0 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 2^ | | | 0.5 | 0.5 | 2.0 | | CP | vmovdqa ymmword ptr [r14], ymm0
Total Num Of Uops: 2
With 16 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 32.00 Cycles Throughput Bottleneck: Backend. Port4
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 8.0 0.0 | 8.0 0.0 | 32.0 | 0.0 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 2^ | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14], ymm0
| 2^ | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+0x20], ymm0
| 2^ | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14+0x40], ymm0
| 2^ | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+0x60], ymm0
| 2^ | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14+0x80], ymm0
| 2^ | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+0xa0], ymm0
| 2^ | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14+0xc0], ymm0
| 2^ | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+0xe0], ymm0
| 2^ | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14+0x100], ymm0
| 2^ | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+0x120], ymm0
| 2^ | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14+0x140], ymm0
| 2^ | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+0x160], ymm0
| 2^ | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14+0x180], ymm0
| 2^ | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+0x1a0], ymm0
| 2^ | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14+0x1c0], ymm0
| 2^ | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+0x1e0], ymm0
Total Num Of Uops: 32
With an indexed addressing mode
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 2.00 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.5 0.0 | 0.5 0.0 | 2.0 | 0.0 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 2 | | | 0.5 | 0.5 | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1], ymm0
Total Num Of Uops: 2
With 16 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 32.00 Cycles Throughput Bottleneck: Backend. Port4
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 8.0 0.0 | 8.0 0.0 | 32.0 | 0.0 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 2 | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1], ymm0
| 2 | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1+0x20], ymm0
| 2 | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1+0x40], ymm0
| 2 | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1+0x60], ymm0
| 2 | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1+0x80], ymm0
| 2 | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1+0xa0], ymm0
| 2 | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1+0xc0], ymm0
| 2 | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1+0xe0], ymm0
| 2 | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1+0x100], ymm0
| 2 | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1+0x120], ymm0
| 2 | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1+0x140], ymm0
| 2 | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1+0x160], ymm0
| 2 | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1+0x180], ymm0
| 2 | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1+0x1a0], ymm0
| 2 | | | 1.0 | | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1+0x1c0], ymm0
| 2 | | | | 1.0 | 2.0 | | CP | vmovdqa ymmword ptr [r14+r13*1+0x1e0], ymm0
Total Num Of Uops: 32