VPSADBW (ZMM, ZMM, ZMM) - Throughput and Uops (IACA 2.3)
With different registers for different operands
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 1.00 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 1.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm0, zmm1, zmm2
Total Num Of Uops: 1
With 16 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 16.00 Cycles Throughput Bottleneck: Backend. Port5
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 16.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm0, zmm1, zmm2
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm3, zmm1, zmm2
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm4, zmm1, zmm2
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm5, zmm1, zmm2
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm6, zmm1, zmm2
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm7, zmm1, zmm2
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm8, zmm1, zmm2
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm9, zmm1, zmm2
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm10, zmm1, zmm2
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm11, zmm1, zmm2
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm12, zmm1, zmm2
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm16, zmm1, zmm2
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm17, zmm1, zmm2
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm18, zmm1, zmm2
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm19, zmm1, zmm2
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm20, zmm1, zmm2
Total Num Of Uops: 16
With the same register for for different operands
Throughput Analysis Report
--------------------------
Block Throughput: 2.86 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 1.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | | | | 1.0 | | | CP | vpsadbw zmm0, zmm0, zmm0
Total Num Of Uops: 1