VPMULLQ (ZMM, ZMM, ZMM) - Throughput and Uops (IACA 2.3)
With different registers for different operands
With 1 independent instruction
Throughput Analysis Report
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Block Throughput: 1.50 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
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| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
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| Cycles | 1.5 0.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 1.5 | 0.0 | 0.0 |
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| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
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| 3 | 1.5 | | | | | 1.5 | | | CP | vpmullq zmm0, zmm1, zmm2
Total Num Of Uops: 3
With 16 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 24.00 Cycles Throughput Bottleneck: Backend. Port0, Port5
Port Binding In Cycles Per Iteration:
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| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
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| Cycles | 24.0 0.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 24.0 | 0.0 | 0.0 |
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| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
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| 3 | 2.0 | | | | | 1.0 | | | CP | vpmullq zmm0, zmm1, zmm2
| 3 | 1.0 | | | | | 2.0 | | | CP | vpmullq zmm3, zmm1, zmm2
| 3 | 2.0 | | | | | 1.0 | | | CP | vpmullq zmm4, zmm1, zmm2
| 3 | 1.0 | | | | | 2.0 | | | CP | vpmullq zmm5, zmm1, zmm2
| 3 | 2.0 | | | | | 1.0 | | | CP | vpmullq zmm6, zmm1, zmm2
| 3 | 1.0 | | | | | 2.0 | | | CP | vpmullq zmm7, zmm1, zmm2
| 3 | 2.0 | | | | | 1.0 | | | CP | vpmullq zmm8, zmm1, zmm2
| 3 | 1.0 | | | | | 2.0 | | | CP | vpmullq zmm9, zmm1, zmm2
| 3 | 2.0 | | | | | 1.0 | | | CP | vpmullq zmm10, zmm1, zmm2
| 3 | 1.0 | | | | | 2.0 | | | CP | vpmullq zmm11, zmm1, zmm2
| 3 | 2.0 | | | | | 1.0 | | | CP | vpmullq zmm12, zmm1, zmm2
| 3 | 1.0 | | | | | 2.0 | | | CP | vpmullq zmm16, zmm1, zmm2
| 3 | 2.0 | | | | | 1.0 | | | CP | vpmullq zmm17, zmm1, zmm2
| 3 | 1.0 | | | | | 2.0 | | | CP | vpmullq zmm18, zmm1, zmm2
| 3 | 2.0 | | | | | 1.0 | | | CP | vpmullq zmm19, zmm1, zmm2
| 3 | 1.0 | | | | | 2.0 | | | CP | vpmullq zmm20, zmm1, zmm2
Total Num Of Uops: 48
With the same register for for different operands
Throughput Analysis Report
--------------------------
Block Throughput: 11.48 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
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| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 1.5 0.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 1.5 | 0.0 | 0.0 |
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| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
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| 3 | 1.5 | | | | | 1.5 | | | CP | vpmullq zmm0, zmm0, zmm0
Total Num Of Uops: 3