VPERMT2D (YMM, YMM, M256)

With unroll_count=500 and no inner loop

Code:

   0:	62 d2 75 28 7e 06    	vpermt2d ymm0,ymm1,YMMWORD PTR [r14]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 3.0
- Reference cycles: 2.58
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	62 d2 75 28 7e 06    	vpermt2d ymm0,ymm1,YMMWORD PTR [r14]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 3.0
- Reference cycles: 2.7
- UOPS_EXECUTED.THREAD: 2.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 1.1
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.3

With loop_count=100 and unroll_count=100

Code:

   0:	62 d2 75 28 7e 06    	vpermt2d ymm0,ymm1,YMMWORD PTR [r14]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 3.0
- Reference cycles: 2.7
- UOPS_EXECUTED.THREAD: 2.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.06
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	62 d2 75 28 7e 06    	vpermt2d ymm0,ymm1,YMMWORD PTR [r14]
   6:	62 d2 75 28 7e 56 01 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+0x20]
   d:	62 d2 75 28 7e 5e 02 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+0x40]
  14:	62 d2 75 28 7e 66 03 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+0x60]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 3.99
- Reference cycles: 3.65
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	62 d2 75 28 7e 06    	vpermt2d ymm0,ymm1,YMMWORD PTR [r14]
   6:	62 d2 75 28 7e 56 01 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+0x20]
   d:	62 d2 75 28 7e 5e 02 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+0x40]
  14:	62 d2 75 28 7e 66 03 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+0x60]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.01
- Reference cycles: 3.6
- UOPS_EXECUTED.THREAD: 8.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	62 d2 75 28 7e 06    	vpermt2d ymm0,ymm1,YMMWORD PTR [r14]
   6:	62 d2 75 28 7e 56 01 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+0x20]
   d:	62 d2 75 28 7e 5e 02 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+0x40]
  14:	62 d2 75 28 7e 66 03 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+0x60]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.01
- Reference cycles: 3.61
- UOPS_EXECUTED.THREAD: 8.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.29
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.11

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 d2 75 28 7e 06    	vpermt2d ymm0,ymm1,YMMWORD PTR [r14]
   6:	62 d2 75 28 7e 56 01 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+0x20]
   d:	62 d2 75 28 7e 5e 02 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+0x40]
  14:	62 d2 75 28 7e 66 03 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+0x60]
  1b:	62 d2 75 28 7e 6e 04 	vpermt2d ymm5,ymm1,YMMWORD PTR [r14+0x80]
  22:	62 d2 75 28 7e 76 05 	vpermt2d ymm6,ymm1,YMMWORD PTR [r14+0xa0]
  29:	62 d2 75 28 7e 7e 06 	vpermt2d ymm7,ymm1,YMMWORD PTR [r14+0xc0]
  30:	62 52 75 28 7e 46 07 	vpermt2d ymm8,ymm1,YMMWORD PTR [r14+0xe0]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 7.3
- UOPS_EXECUTED.THREAD: 16.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	62 d2 75 28 7e 06    	vpermt2d ymm0,ymm1,YMMWORD PTR [r14]
   6:	62 d2 75 28 7e 56 01 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+0x20]
   d:	62 d2 75 28 7e 5e 02 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+0x40]
  14:	62 d2 75 28 7e 66 03 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+0x60]
  1b:	62 d2 75 28 7e 6e 04 	vpermt2d ymm5,ymm1,YMMWORD PTR [r14+0x80]
  22:	62 d2 75 28 7e 76 05 	vpermt2d ymm6,ymm1,YMMWORD PTR [r14+0xa0]
  29:	62 d2 75 28 7e 7e 06 	vpermt2d ymm7,ymm1,YMMWORD PTR [r14+0xc0]
  30:	62 52 75 28 7e 46 07 	vpermt2d ymm8,ymm1,YMMWORD PTR [r14+0xe0]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.02
- Reference cycles: 7.18
- UOPS_EXECUTED.THREAD: 17.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 9.06
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 3.02

With loop_count=100 and unroll_count=10

Code:

   0:	62 d2 75 28 7e 06    	vpermt2d ymm0,ymm1,YMMWORD PTR [r14]
   6:	62 d2 75 28 7e 56 01 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+0x20]
   d:	62 d2 75 28 7e 5e 02 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+0x40]
  14:	62 d2 75 28 7e 66 03 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+0x60]
  1b:	62 d2 75 28 7e 6e 04 	vpermt2d ymm5,ymm1,YMMWORD PTR [r14+0x80]
  22:	62 d2 75 28 7e 76 05 	vpermt2d ymm6,ymm1,YMMWORD PTR [r14+0xa0]
  29:	62 d2 75 28 7e 7e 06 	vpermt2d ymm7,ymm1,YMMWORD PTR [r14+0xc0]
  30:	62 52 75 28 7e 46 07 	vpermt2d ymm8,ymm1,YMMWORD PTR [r14+0xe0]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.02
- Reference cycles: 7.18
- UOPS_EXECUTED.THREAD: 16.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 16 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 d2 75 28 7e 06    	vpermt2d ymm0,ymm1,YMMWORD PTR [r14]
   6:	62 d2 75 28 7e 56 01 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+0x20]
   d:	62 d2 75 28 7e 5e 02 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+0x40]
  14:	62 d2 75 28 7e 66 03 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+0x60]
  1b:	62 d2 75 28 7e 6e 04 	vpermt2d ymm5,ymm1,YMMWORD PTR [r14+0x80]
  22:	62 d2 75 28 7e 76 05 	vpermt2d ymm6,ymm1,YMMWORD PTR [r14+0xa0]
  29:	62 d2 75 28 7e 7e 06 	vpermt2d ymm7,ymm1,YMMWORD PTR [r14+0xc0]
  30:	62 52 75 28 7e 46 07 	vpermt2d ymm8,ymm1,YMMWORD PTR [r14+0xe0]
  37:	62 52 75 28 7e 4e 08 	vpermt2d ymm9,ymm1,YMMWORD PTR [r14+0x100]
  3e:	62 52 75 28 7e 56 09 	vpermt2d ymm10,ymm1,YMMWORD PTR [r14+0x120]
  45:	62 52 75 28 7e 5e 0a 	vpermt2d ymm11,ymm1,YMMWORD PTR [r14+0x140]
  4c:	62 52 75 28 7e 66 0b 	vpermt2d ymm12,ymm1,YMMWORD PTR [r14+0x160]
  53:	62 c2 75 28 7e 46 0c 	vpermt2d ymm16,ymm1,YMMWORD PTR [r14+0x180]
  5a:	62 c2 75 28 7e 4e 0d 	vpermt2d ymm17,ymm1,YMMWORD PTR [r14+0x1a0]
  61:	62 c2 75 28 7e 56 0e 	vpermt2d ymm18,ymm1,YMMWORD PTR [r14+0x1c0]
  68:	62 c2 75 28 7e 5e 0f 	vpermt2d ymm19,ymm1,YMMWORD PTR [r14+0x1e0]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8;
VXORPS YMM9, YMM9, YMM9;
VXORPS YMM10, YMM10, YMM10;
VXORPS YMM11, YMM11, YMM11;
VXORPS YMM12, YMM12, YMM12;
VXORPS YMM16, YMM16, YMM16;
VXORPS YMM17, YMM17, YMM17;
VXORPS YMM18, YMM18, YMM18;
VXORPS YMM19, YMM19, YMM19

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 16.0
- Reference cycles: 14.6
- UOPS_EXECUTED.THREAD: 32.0
- RETIRE_SLOTS: 16.0
- UOPS_MITE: 16.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 8.0
- UOPS_PORT_3: 8.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=1

Code:

   0:	62 d2 75 28 7e 06    	vpermt2d ymm0,ymm1,YMMWORD PTR [r14]
   6:	62 d2 75 28 7e 56 01 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+0x20]
   d:	62 d2 75 28 7e 5e 02 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+0x40]
  14:	62 d2 75 28 7e 66 03 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+0x60]
  1b:	62 d2 75 28 7e 6e 04 	vpermt2d ymm5,ymm1,YMMWORD PTR [r14+0x80]
  22:	62 d2 75 28 7e 76 05 	vpermt2d ymm6,ymm1,YMMWORD PTR [r14+0xa0]
  29:	62 d2 75 28 7e 7e 06 	vpermt2d ymm7,ymm1,YMMWORD PTR [r14+0xc0]
  30:	62 52 75 28 7e 46 07 	vpermt2d ymm8,ymm1,YMMWORD PTR [r14+0xe0]
  37:	62 52 75 28 7e 4e 08 	vpermt2d ymm9,ymm1,YMMWORD PTR [r14+0x100]
  3e:	62 52 75 28 7e 56 09 	vpermt2d ymm10,ymm1,YMMWORD PTR [r14+0x120]
  45:	62 52 75 28 7e 5e 0a 	vpermt2d ymm11,ymm1,YMMWORD PTR [r14+0x140]
  4c:	62 52 75 28 7e 66 0b 	vpermt2d ymm12,ymm1,YMMWORD PTR [r14+0x160]
  53:	62 c2 75 28 7e 46 0c 	vpermt2d ymm16,ymm1,YMMWORD PTR [r14+0x180]
  5a:	62 c2 75 28 7e 4e 0d 	vpermt2d ymm17,ymm1,YMMWORD PTR [r14+0x1a0]
  61:	62 c2 75 28 7e 56 0e 	vpermt2d ymm18,ymm1,YMMWORD PTR [r14+0x1c0]
  68:	62 c2 75 28 7e 5e 0f 	vpermt2d ymm19,ymm1,YMMWORD PTR [r14+0x1e0]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8;
VXORPS YMM9, YMM9, YMM9;
VXORPS YMM10, YMM10, YMM10;
VXORPS YMM11, YMM11, YMM11;
VXORPS YMM12, YMM12, YMM12;
VXORPS YMM16, YMM16, YMM16;
VXORPS YMM17, YMM17, YMM17;
VXORPS YMM18, YMM18, YMM18;
VXORPS YMM19, YMM19, YMM19

Show nanoBench command
Results:
- Instructions retired: 18.0
- Core cycles: 16.02
- Reference cycles: 14.38
- UOPS_EXECUTED.THREAD: 33.0
- RETIRE_SLOTS: 17.0
- UOPS_MITE: 0.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 8.0
- UOPS_PORT_3: 8.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	62 d2 75 28 7e 06    	vpermt2d ymm0,ymm1,YMMWORD PTR [r14]
   6:	62 d2 75 28 7e 56 01 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+0x20]
   d:	62 d2 75 28 7e 5e 02 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+0x40]
  14:	62 d2 75 28 7e 66 03 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+0x60]
  1b:	62 d2 75 28 7e 6e 04 	vpermt2d ymm5,ymm1,YMMWORD PTR [r14+0x80]
  22:	62 d2 75 28 7e 76 05 	vpermt2d ymm6,ymm1,YMMWORD PTR [r14+0xa0]
  29:	62 d2 75 28 7e 7e 06 	vpermt2d ymm7,ymm1,YMMWORD PTR [r14+0xc0]
  30:	62 52 75 28 7e 46 07 	vpermt2d ymm8,ymm1,YMMWORD PTR [r14+0xe0]
  37:	62 52 75 28 7e 4e 08 	vpermt2d ymm9,ymm1,YMMWORD PTR [r14+0x100]
  3e:	62 52 75 28 7e 56 09 	vpermt2d ymm10,ymm1,YMMWORD PTR [r14+0x120]
  45:	62 52 75 28 7e 5e 0a 	vpermt2d ymm11,ymm1,YMMWORD PTR [r14+0x140]
  4c:	62 52 75 28 7e 66 0b 	vpermt2d ymm12,ymm1,YMMWORD PTR [r14+0x160]
  53:	62 c2 75 28 7e 46 0c 	vpermt2d ymm16,ymm1,YMMWORD PTR [r14+0x180]
  5a:	62 c2 75 28 7e 4e 0d 	vpermt2d ymm17,ymm1,YMMWORD PTR [r14+0x1a0]
  61:	62 c2 75 28 7e 56 0e 	vpermt2d ymm18,ymm1,YMMWORD PTR [r14+0x1c0]
  68:	62 c2 75 28 7e 5e 0f 	vpermt2d ymm19,ymm1,YMMWORD PTR [r14+0x1e0]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8;
VXORPS YMM9, YMM9, YMM9;
VXORPS YMM10, YMM10, YMM10;
VXORPS YMM11, YMM11, YMM11;
VXORPS YMM12, YMM12, YMM12;
VXORPS YMM16, YMM16, YMM16;
VXORPS YMM17, YMM17, YMM17;
VXORPS YMM18, YMM18, YMM18;
VXORPS YMM19, YMM19, YMM19

Show nanoBench command
Results:
- Instructions retired: 16.2
- Core cycles: 16.02
- Reference cycles: 14.41
- UOPS_EXECUTED.THREAD: 32.11
- RETIRE_SLOTS: 16.1
- UOPS_MITE: 0.16
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 8.0
- UOPS_PORT_3: 8.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.05

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	62 92 75 28 7e 04 2e 	vpermt2d ymm0,ymm1,YMMWORD PTR [r14+r13*1]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 3.0
- Reference cycles: 2.73
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	62 92 75 28 7e 04 2e 	vpermt2d ymm0,ymm1,YMMWORD PTR [r14+r13*1]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 3.0
- Reference cycles: 2.7
- UOPS_EXECUTED.THREAD: 2.1
- RETIRE_SLOTS: 2.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	62 92 75 28 7e 04 2e 	vpermt2d ymm0,ymm1,YMMWORD PTR [r14+r13*1]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 3.0
- Reference cycles: 2.7
- UOPS_EXECUTED.THREAD: 2.01
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 0.1
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.03

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	62 92 75 28 7e 04 2e 	vpermt2d ymm0,ymm1,YMMWORD PTR [r14+r13*1]
   7:	62 92 75 28 7e 54 2e 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+r13*1+0x20]
   e:	01 
   f:	62 92 75 28 7e 5c 2e 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x40]
  16:	02 
  17:	62 92 75 28 7e 64 2e 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x60]
  1e:	03

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
XOR R13, R13;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 3.65
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	62 92 75 28 7e 04 2e 	vpermt2d ymm0,ymm1,YMMWORD PTR [r14+r13*1]
   7:	62 92 75 28 7e 54 2e 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+r13*1+0x20]
   e:	01 
   f:	62 92 75 28 7e 5c 2e 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x40]
  16:	02 
  17:	62 92 75 28 7e 64 2e 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x60]
  1e:	03

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
XOR R13, R13;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.01
- Reference cycles: 3.61
- UOPS_EXECUTED.THREAD: 8.5
- RETIRE_SLOTS: 8.5
- UOPS_MITE: 4.53
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.52

With loop_count=100 and unroll_count=20

Code:

   0:	62 92 75 28 7e 04 2e 	vpermt2d ymm0,ymm1,YMMWORD PTR [r14+r13*1]
   7:	62 92 75 28 7e 54 2e 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+r13*1+0x20]
   e:	01 
   f:	62 92 75 28 7e 5c 2e 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x40]
  16:	02 
  17:	62 92 75 28 7e 64 2e 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x60]
  1e:	03

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
XOR R13, R13;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.01
- Reference cycles: 3.61
- UOPS_EXECUTED.THREAD: 8.05
- RETIRE_SLOTS: 8.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 92 75 28 7e 04 2e 	vpermt2d ymm0,ymm1,YMMWORD PTR [r14+r13*1]
   7:	62 92 75 28 7e 54 2e 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+r13*1+0x20]
   e:	01 
   f:	62 92 75 28 7e 5c 2e 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x40]
  16:	02 
  17:	62 92 75 28 7e 64 2e 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x60]
  1e:	03 
  1f:	62 92 75 28 7e 6c 2e 	vpermt2d ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x80]
  26:	04 
  27:	62 92 75 28 7e 74 2e 	vpermt2d ymm6,ymm1,YMMWORD PTR [r14+r13*1+0xa0]
  2e:	05 
  2f:	62 92 75 28 7e 7c 2e 	vpermt2d ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xc0]
  36:	06 
  37:	62 12 75 28 7e 44 2e 	vpermt2d ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xe0]
  3e:	07

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
XOR R13, R13;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 7.3
- UOPS_EXECUTED.THREAD: 16.0
- RETIRE_SLOTS: 16.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.01

With loop_count=1000 and unroll_count=1

Code:

   0:	62 92 75 28 7e 04 2e 	vpermt2d ymm0,ymm1,YMMWORD PTR [r14+r13*1]
   7:	62 92 75 28 7e 54 2e 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+r13*1+0x20]
   e:	01 
   f:	62 92 75 28 7e 5c 2e 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x40]
  16:	02 
  17:	62 92 75 28 7e 64 2e 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x60]
  1e:	03 
  1f:	62 92 75 28 7e 6c 2e 	vpermt2d ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x80]
  26:	04 
  27:	62 92 75 28 7e 74 2e 	vpermt2d ymm6,ymm1,YMMWORD PTR [r14+r13*1+0xa0]
  2e:	05 
  2f:	62 92 75 28 7e 7c 2e 	vpermt2d ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xc0]
  36:	06 
  37:	62 12 75 28 7e 44 2e 	vpermt2d ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xe0]
  3e:	07

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
XOR R13, R13;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.02
- Reference cycles: 7.2
- UOPS_EXECUTED.THREAD: 17.01
- RETIRE_SLOTS: 17.0
- UOPS_MITE: 9.06
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 3.03

With loop_count=100 and unroll_count=10

Code:

   0:	62 92 75 28 7e 04 2e 	vpermt2d ymm0,ymm1,YMMWORD PTR [r14+r13*1]
   7:	62 92 75 28 7e 54 2e 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+r13*1+0x20]
   e:	01 
   f:	62 92 75 28 7e 5c 2e 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x40]
  16:	02 
  17:	62 92 75 28 7e 64 2e 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x60]
  1e:	03 
  1f:	62 92 75 28 7e 6c 2e 	vpermt2d ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x80]
  26:	04 
  27:	62 92 75 28 7e 74 2e 	vpermt2d ymm6,ymm1,YMMWORD PTR [r14+r13*1+0xa0]
  2e:	05 
  2f:	62 92 75 28 7e 7c 2e 	vpermt2d ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xc0]
  36:	06 
  37:	62 12 75 28 7e 44 2e 	vpermt2d ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xe0]
  3e:	07

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
XOR R13, R13;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.02
- Reference cycles: 7.2
- UOPS_EXECUTED.THREAD: 16.1
- RETIRE_SLOTS: 16.1
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.01
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 16 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 92 75 28 7e 04 2e 	vpermt2d ymm0,ymm1,YMMWORD PTR [r14+r13*1]
   7:	62 92 75 28 7e 54 2e 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+r13*1+0x20]
   e:	01 
   f:	62 92 75 28 7e 5c 2e 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x40]
  16:	02 
  17:	62 92 75 28 7e 64 2e 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x60]
  1e:	03 
  1f:	62 92 75 28 7e 6c 2e 	vpermt2d ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x80]
  26:	04 
  27:	62 92 75 28 7e 74 2e 	vpermt2d ymm6,ymm1,YMMWORD PTR [r14+r13*1+0xa0]
  2e:	05 
  2f:	62 92 75 28 7e 7c 2e 	vpermt2d ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xc0]
  36:	06 
  37:	62 12 75 28 7e 44 2e 	vpermt2d ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xe0]
  3e:	07 
  3f:	62 12 75 28 7e 4c 2e 	vpermt2d ymm9,ymm1,YMMWORD PTR [r14+r13*1+0x100]
  46:	08 
  47:	62 12 75 28 7e 54 2e 	vpermt2d ymm10,ymm1,YMMWORD PTR [r14+r13*1+0x120]
  4e:	09 
  4f:	62 12 75 28 7e 5c 2e 	vpermt2d ymm11,ymm1,YMMWORD PTR [r14+r13*1+0x140]
  56:	0a 
  57:	62 12 75 28 7e 64 2e 	vpermt2d ymm12,ymm1,YMMWORD PTR [r14+r13*1+0x160]
  5e:	0b 
  5f:	62 82 75 28 7e 44 2e 	vpermt2d ymm16,ymm1,YMMWORD PTR [r14+r13*1+0x180]
  66:	0c 
  67:	62 82 75 28 7e 4c 2e 	vpermt2d ymm17,ymm1,YMMWORD PTR [r14+r13*1+0x1a0]
  6e:	0d 
  6f:	62 82 75 28 7e 54 2e 	vpermt2d ymm18,ymm1,YMMWORD PTR [r14+r13*1+0x1c0]
  76:	0e 
  77:	62 82 75 28 7e 5c 2e 	vpermt2d ymm19,ymm1,YMMWORD PTR [r14+r13*1+0x1e0]
  7e:	0f

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
XOR R13, R13;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8;
VXORPS YMM9, YMM9, YMM9;
VXORPS YMM10, YMM10, YMM10;
VXORPS YMM11, YMM11, YMM11;
VXORPS YMM12, YMM12, YMM12;
VXORPS YMM16, YMM16, YMM16;
VXORPS YMM17, YMM17, YMM17;
VXORPS YMM18, YMM18, YMM18;
VXORPS YMM19, YMM19, YMM19

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 16.0
- Reference cycles: 14.6
- UOPS_EXECUTED.THREAD: 32.0
- RETIRE_SLOTS: 32.0
- UOPS_MITE: 16.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 8.0
- UOPS_PORT_3: 8.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=1

Code:

   0:	62 92 75 28 7e 04 2e 	vpermt2d ymm0,ymm1,YMMWORD PTR [r14+r13*1]
   7:	62 92 75 28 7e 54 2e 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+r13*1+0x20]
   e:	01 
   f:	62 92 75 28 7e 5c 2e 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x40]
  16:	02 
  17:	62 92 75 28 7e 64 2e 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x60]
  1e:	03 
  1f:	62 92 75 28 7e 6c 2e 	vpermt2d ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x80]
  26:	04 
  27:	62 92 75 28 7e 74 2e 	vpermt2d ymm6,ymm1,YMMWORD PTR [r14+r13*1+0xa0]
  2e:	05 
  2f:	62 92 75 28 7e 7c 2e 	vpermt2d ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xc0]
  36:	06 
  37:	62 12 75 28 7e 44 2e 	vpermt2d ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xe0]
  3e:	07 
  3f:	62 12 75 28 7e 4c 2e 	vpermt2d ymm9,ymm1,YMMWORD PTR [r14+r13*1+0x100]
  46:	08 
  47:	62 12 75 28 7e 54 2e 	vpermt2d ymm10,ymm1,YMMWORD PTR [r14+r13*1+0x120]
  4e:	09 
  4f:	62 12 75 28 7e 5c 2e 	vpermt2d ymm11,ymm1,YMMWORD PTR [r14+r13*1+0x140]
  56:	0a 
  57:	62 12 75 28 7e 64 2e 	vpermt2d ymm12,ymm1,YMMWORD PTR [r14+r13*1+0x160]
  5e:	0b 
  5f:	62 82 75 28 7e 44 2e 	vpermt2d ymm16,ymm1,YMMWORD PTR [r14+r13*1+0x180]
  66:	0c 
  67:	62 82 75 28 7e 4c 2e 	vpermt2d ymm17,ymm1,YMMWORD PTR [r14+r13*1+0x1a0]
  6e:	0d 
  6f:	62 82 75 28 7e 54 2e 	vpermt2d ymm18,ymm1,YMMWORD PTR [r14+r13*1+0x1c0]
  76:	0e 
  77:	62 82 75 28 7e 5c 2e 	vpermt2d ymm19,ymm1,YMMWORD PTR [r14+r13*1+0x1e0]
  7e:	0f

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
XOR R13, R13;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8;
VXORPS YMM9, YMM9, YMM9;
VXORPS YMM10, YMM10, YMM10;
VXORPS YMM11, YMM11, YMM11;
VXORPS YMM12, YMM12, YMM12;
VXORPS YMM16, YMM16, YMM16;
VXORPS YMM17, YMM17, YMM17;
VXORPS YMM18, YMM18, YMM18;
VXORPS YMM19, YMM19, YMM19

Show nanoBench command
Results:
- Instructions retired: 18.0
- Core cycles: 16.02
- Reference cycles: 14.41
- UOPS_EXECUTED.THREAD: 33.01
- RETIRE_SLOTS: 33.0
- UOPS_MITE: 8.03
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 8.0
- UOPS_PORT_3: 8.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.01

With loop_count=100 and unroll_count=10

Code:

   0:	62 92 75 28 7e 04 2e 	vpermt2d ymm0,ymm1,YMMWORD PTR [r14+r13*1]
   7:	62 92 75 28 7e 54 2e 	vpermt2d ymm2,ymm1,YMMWORD PTR [r14+r13*1+0x20]
   e:	01 
   f:	62 92 75 28 7e 5c 2e 	vpermt2d ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x40]
  16:	02 
  17:	62 92 75 28 7e 64 2e 	vpermt2d ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x60]
  1e:	03 
  1f:	62 92 75 28 7e 6c 2e 	vpermt2d ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x80]
  26:	04 
  27:	62 92 75 28 7e 74 2e 	vpermt2d ymm6,ymm1,YMMWORD PTR [r14+r13*1+0xa0]
  2e:	05 
  2f:	62 92 75 28 7e 7c 2e 	vpermt2d ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xc0]
  36:	06 
  37:	62 12 75 28 7e 44 2e 	vpermt2d ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xe0]
  3e:	07 
  3f:	62 12 75 28 7e 4c 2e 	vpermt2d ymm9,ymm1,YMMWORD PTR [r14+r13*1+0x100]
  46:	08 
  47:	62 12 75 28 7e 54 2e 	vpermt2d ymm10,ymm1,YMMWORD PTR [r14+r13*1+0x120]
  4e:	09 
  4f:	62 12 75 28 7e 5c 2e 	vpermt2d ymm11,ymm1,YMMWORD PTR [r14+r13*1+0x140]
  56:	0a 
  57:	62 12 75 28 7e 64 2e 	vpermt2d ymm12,ymm1,YMMWORD PTR [r14+r13*1+0x160]
  5e:	0b 
  5f:	62 82 75 28 7e 44 2e 	vpermt2d ymm16,ymm1,YMMWORD PTR [r14+r13*1+0x180]
  66:	0c 
  67:	62 82 75 28 7e 4c 2e 	vpermt2d ymm17,ymm1,YMMWORD PTR [r14+r13*1+0x1a0]
  6e:	0d 
  6f:	62 82 75 28 7e 54 2e 	vpermt2d ymm18,ymm1,YMMWORD PTR [r14+r13*1+0x1c0]
  76:	0e 
  77:	62 82 75 28 7e 5c 2e 	vpermt2d ymm19,ymm1,YMMWORD PTR [r14+r13*1+0x1e0]
  7e:	0f

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
XOR R13, R13;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8;
VXORPS YMM9, YMM9, YMM9;
VXORPS YMM10, YMM10, YMM10;
VXORPS YMM11, YMM11, YMM11;
VXORPS YMM12, YMM12, YMM12;
VXORPS YMM16, YMM16, YMM16;
VXORPS YMM17, YMM17, YMM17;
VXORPS YMM18, YMM18, YMM18;
VXORPS YMM19, YMM19, YMM19

Show nanoBench command
Results:
- Instructions retired: 16.2
- Core cycles: 16.02
- Reference cycles: 14.41
- UOPS_EXECUTED.THREAD: 32.1
- RETIRE_SLOTS: 32.1
- UOPS_MITE: 0.16
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 8.0
- UOPS_PORT_3: 8.01
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.05

VPERMT2D (YMM, YMM, M256) - Throughput and Uops

With a non-indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 16 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 16 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10