VPCMPEQW (K, ZMM, ZMM) - Throughput and Uops (IACA 3.0)

With different registers for different operands

With 1 independent instruction

Throughput Analysis Report
--------------------------
Block Throughput: 0.98 Cycles       Throughput Bottleneck: Dependency chains
Loop Count:  60
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.0     0.0  |  0.0  |  0.0     0.0  |  0.0     0.0  |  0.0  |  1.0  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k1, zmm0, zmm1
Total Num Of Uops: 1

With 7 independent instructions

Throughput Analysis Report
--------------------------
Block Throughput: 6.95 Cycles       Throughput Bottleneck: Backend
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.0     0.0  |  0.0  |  0.0     0.0  |  0.0     0.0  |  0.0  |  7.0  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k1, zmm0, zmm1
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k2, zmm0, zmm1
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k3, zmm0, zmm1
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k4, zmm0, zmm1
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k5, zmm0, zmm1
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k6, zmm0, zmm1
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k7, zmm0, zmm1
Total Num Of Uops: 7

With the same register for for different operands

With 1 independent instruction

Throughput Analysis Report
--------------------------
Block Throughput: 0.98 Cycles       Throughput Bottleneck: Dependency chains
Loop Count:  60
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.0     0.0  |  0.0  |  0.0     0.0  |  0.0     0.0  |  0.0  |  1.0  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k1, zmm0, zmm0
Total Num Of Uops: 1

With 7 independent instructions

Throughput Analysis Report
--------------------------
Block Throughput: 6.95 Cycles       Throughput Bottleneck: Backend
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.0     0.0  |  0.0  |  0.0     0.0  |  0.0     0.0  |  0.0  |  7.0  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k1, zmm0, zmm0
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k2, zmm0, zmm0
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k3, zmm0, zmm0
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k4, zmm0, zmm0
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k5, zmm0, zmm0
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k6, zmm0, zmm0
|   1      |             |      |             |             |      | 1.0  |      |      | vpcmpeqw k7, zmm0, zmm0
Total Num Of Uops: 7