VMOVDQA32 (ZMM, ZMM) - Throughput and Uops (IACA 2.3)
With different registers for different operands
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 0.24 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 0.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1* | | | | | | | | | | vmovdqa32 zmm0, zmm1
Total Num Of Uops: 1
With 16 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 4.00 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 0.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1* | | | | | | | | | | vmovdqa32 zmm0, zmm1
| 1* | | | | | | | | | | vmovdqa32 zmm2, zmm1
| 1* | | | | | | | | | | vmovdqa32 zmm3, zmm1
| 1* | | | | | | | | | | vmovdqa32 zmm4, zmm1
| 1* | | | | | | | | | | vmovdqa32 zmm5, zmm1
| 1* | | | | | | | | | | vmovdqa32 zmm6, zmm1
| 1* | | | | | | | | | | vmovdqa32 zmm7, zmm1
| 1* | | | | | | | | | | vmovdqa32 zmm8, zmm1
| 1* | | | | | | | | | | vmovdqa32 zmm9, zmm1
| 1* | | | | | | | | | | vmovdqa32 zmm10, zmm1
| 1* | | | | | | | | | | vmovdqa32 zmm11, zmm1
| 1* | | | | | | | | | | vmovdqa32 zmm12, zmm1
| 1* | | | | | | | | | | vmovdqa32 zmm16, zmm1
| 1* | | | | | | | | | | vmovdqa32 zmm17, zmm1
| 1* | | | | | | | | | | vmovdqa32 zmm18, zmm1
| 1* | | | | | | | | | | vmovdqa32 zmm19, zmm1
Total Num Of Uops: 16
With the same register for for different operands
Throughput Analysis Report
--------------------------
Block Throughput: 0.24 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 0.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1* | | | | | | | | | | vmovdqa32 zmm0, zmm0
Total Num Of Uops: 1