SQRTSS (XMM, M32) - Throughput and Uops (IACA 2.3)
With a non-indexed addressing mode
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 3.00 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 1.0 3.0 | 0.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 0.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 2^ | 1.0 3.0 | | 0.5 0.5 | 0.5 0.5 | | | | | CP | sqrtss xmm2, dword ptr [r14]
Total Num Of Uops: 2
With 8 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 24.00 Cycles Throughput Bottleneck: Backend. Divider
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 8.0 24.0 | 0.0 | 4.0 4.0 | 4.0 4.0 | 0.0 | 0.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 2^ | 1.0 3.0 | | 1.0 1.0 | | | | | | CP | sqrtss xmm2, dword ptr [r14]
| 2^ | 1.0 3.0 | | | 1.0 1.0 | | | | | CP | sqrtss xmm3, dword ptr [r14]
| 2^ | 1.0 3.0 | | 1.0 1.0 | | | | | | CP | sqrtss xmm4, dword ptr [r14]
| 2^ | 1.0 3.0 | | | 1.0 1.0 | | | | | CP | sqrtss xmm5, dword ptr [r14]
| 2^ | 1.0 3.0 | | 1.0 1.0 | | | | | | CP | sqrtss xmm6, dword ptr [r14]
| 2^ | 1.0 3.0 | | | 1.0 1.0 | | | | | CP | sqrtss xmm7, dword ptr [r14]
| 2^ | 1.0 3.0 | | 1.0 1.0 | | | | | | CP | sqrtss xmm8, dword ptr [r14]
| 2^ | 1.0 3.0 | | | 1.0 1.0 | | | | | CP | sqrtss xmm9, dword ptr [r14]
Total Num Of Uops: 16
With an indexed addressing mode
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 3.00 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 1.0 3.0 | 0.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 0.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 2^ | 1.0 3.0 | | 0.5 0.5 | 0.5 0.5 | | | | | CP | sqrtss xmm2, dword ptr [r14]
Total Num Of Uops: 2
With 8 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 24.00 Cycles Throughput Bottleneck: Backend. Divider
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 8.0 24.0 | 0.0 | 4.0 4.0 | 4.0 4.0 | 0.0 | 0.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 2^ | 1.0 3.0 | | 1.0 1.0 | | | | | | CP | sqrtss xmm2, dword ptr [r14]
| 2^ | 1.0 3.0 | | | 1.0 1.0 | | | | | CP | sqrtss xmm3, dword ptr [r14]
| 2^ | 1.0 3.0 | | 1.0 1.0 | | | | | | CP | sqrtss xmm4, dword ptr [r14]
| 2^ | 1.0 3.0 | | | 1.0 1.0 | | | | | CP | sqrtss xmm5, dword ptr [r14]
| 2^ | 1.0 3.0 | | 1.0 1.0 | | | | | | CP | sqrtss xmm6, dword ptr [r14]
| 2^ | 1.0 3.0 | | | 1.0 1.0 | | | | | CP | sqrtss xmm7, dword ptr [r14]
| 2^ | 1.0 3.0 | | 1.0 1.0 | | | | | | CP | sqrtss xmm8, dword ptr [r14]
| 2^ | 1.0 3.0 | | | 1.0 1.0 | | | | | CP | sqrtss xmm9, dword ptr [r14]
Total Num Of Uops: 16