ADDSD (XMM, M64) - Throughput and Uops (IACA 3.0)


With a non-indexed addressing mode

With 1 independent instruction

Throughput Analysis Report
--------------------------
Block Throughput: 3.34 Cycles       Throughput Bottleneck: Backend
Loop Count:  82
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.3     0.0  |  0.3  |  0.5     0.5  |  0.5     0.5  |  0.0  |  0.3  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   2^     | 0.3         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm0, qword ptr [r14]
Total Num Of Uops: 2

With 13 independent instructions


Throughput Analysis Report
--------------------------
Block Throughput: 6.53 Cycles       Throughput Bottleneck: Backend
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  4.3     0.0  |  4.4  |  6.5     6.5  |  6.5     6.5  |  0.0  |  4.3  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   2^     | 0.3         | 0.4  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm0, qword ptr [r14]
|   2^     | 0.3         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.4  |      |      | addsd xmm1, qword ptr [r14+0x8]
|   2^     | 0.4         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm2, qword ptr [r14+0x10]
|   2^     | 0.3         | 0.4  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm3, qword ptr [r14+0x18]
|   2^     | 0.3         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.4  |      |      | addsd xmm4, qword ptr [r14+0x20]
|   2^     | 0.4         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm5, qword ptr [r14+0x28]
|   2^     | 0.3         | 0.4  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm6, qword ptr [r14+0x30]
|   2^     | 0.3         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.4  |      |      | addsd xmm7, qword ptr [r14+0x38]
|   2^     | 0.4         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm8, qword ptr [r14+0x40]
|   2^     | 0.3         | 0.4  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm9, qword ptr [r14+0x48]
|   2^     | 0.3         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.4  |      |      | addsd xmm10, qword ptr [r14+0x50]
|   2^     | 0.4         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm11, qword ptr [r14+0x58]
|   2^     | 0.3         | 0.4  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm12, qword ptr [r14+0x60]
Total Num Of Uops: 26

With an indexed addressing mode

With 1 independent instruction

Throughput Analysis Report
--------------------------
Block Throughput: 3.33 Cycles       Throughput Bottleneck: Dependency chains
Loop Count:  66
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.3     0.0  |  0.3  |  0.5     0.5  |  0.5     0.5  |  0.0  |  0.3  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   2      | 0.3         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm0, qword ptr [r14+r13*1]
Total Num Of Uops: 2

With 13 independent instructions


Throughput Analysis Report
--------------------------
Block Throughput: 6.53 Cycles       Throughput Bottleneck: FrontEnd
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  4.3     0.0  |  4.4  |  6.5     6.5  |  6.5     6.5  |  0.0  |  4.3  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   2      | 0.3         | 0.4  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm0, qword ptr [r14+r13*1]
|   2      | 0.3         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.4  |      |      | addsd xmm1, qword ptr [r14+r13*1+0x8]
|   2      | 0.4         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm2, qword ptr [r14+r13*1+0x10]
|   2      | 0.3         | 0.4  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm3, qword ptr [r14+r13*1+0x18]
|   2      | 0.3         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.4  |      |      | addsd xmm4, qword ptr [r14+r13*1+0x20]
|   2      | 0.4         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm5, qword ptr [r14+r13*1+0x28]
|   2      | 0.3         | 0.4  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm6, qword ptr [r14+r13*1+0x30]
|   2      | 0.3         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.4  |      |      | addsd xmm7, qword ptr [r14+r13*1+0x38]
|   2      | 0.4         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm8, qword ptr [r14+r13*1+0x40]
|   2      | 0.3         | 0.4  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm9, qword ptr [r14+r13*1+0x48]
|   2      | 0.3         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.4  |      |      | addsd xmm10, qword ptr [r14+r13*1+0x50]
|   2      | 0.4         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm11, qword ptr [r14+r13*1+0x58]
|   2      | 0.3         | 0.4  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | addsd xmm12, qword ptr [r14+r13*1+0x60]
Total Num Of Uops: 26