RCL (R64, CL) - Throughput and Uops (IACA 3.0)
With different registers for different operands
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 10.52 Cycles Throughput Bottleneck: Backend
Loop Count: 26
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 1.7 0.0 | 2.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 1.7 | 1.7 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 7 | 1.7 | 2.0 | | | | 1.7 | 1.7 | | rcl r8, cl
Total Num Of Uops: 7
With additional dependency-breaking instructions
Throughput Analysis Report
--------------------------
Block Throughput: 10.55 Cycles Throughput Bottleneck: Backend
Loop Count: 25
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 2.0 0.0 | 2.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 2.0 | 2.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r8, cl
| 1 | | | | | | 1.0 | | | test r15, r15
Total Num Of Uops: 8
With 12 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 23.89 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 20.0 0.0 | 24.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 20.0 | 20.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 7 | 1.0 | 2.0 | | | | 2.0 | 2.0 | | rcl r8, cl
| 7 | 2.0 | 2.0 | | | | 2.0 | 1.0 | | rcl r9, cl
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r10, cl
| 7 | 1.0 | 2.0 | | | | 2.0 | 2.0 | | rcl r11, cl
| 7 | 2.0 | 2.0 | | | | 2.0 | 1.0 | | rcl r12, cl
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r13, cl
| 7 | 1.0 | 2.0 | | | | 2.0 | 2.0 | | rcl r14, cl
| 7 | 2.0 | 2.0 | | | | 2.0 | 1.0 | | rcl rbx, cl
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl rdx, cl
| 7 | 1.0 | 2.0 | | | | 2.0 | 2.0 | | rcl rdi, cl
| 7 | 2.0 | 2.0 | | | | 2.0 | 1.0 | | rcl rsi, cl
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl rbp, cl
Total Num Of Uops: 84
With additional dependency-breaking instructions
Throughput Analysis Report
--------------------------
Block Throughput: 23.95 Cycles Throughput Bottleneck: Dependency chains
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 24.0 0.0 | 24.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 24.0 | 24.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r8, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r9, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r10, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r11, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r12, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r13, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r14, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl rbx, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl rdx, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl rdi, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl rsi, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl rbp, cl
| 1 | | | | | | 1.0 | | | test r15, r15
Total Num Of Uops: 96
With the same register for for different operands
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 10.52 Cycles Throughput Bottleneck: Backend
Loop Count: 26
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 1.7 0.0 | 2.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 1.7 | 1.7 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 7 | 1.7 | 2.0 | | | | 1.7 | 1.7 | | rcl rcx, cl
Total Num Of Uops: 7
With additional dependency-breaking instructions
Throughput Analysis Report
--------------------------
Block Throughput: 10.55 Cycles Throughput Bottleneck: Backend
Loop Count: 25
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 2.0 0.0 | 2.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 2.0 | 2.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl rcx, cl
| 1 | | | | | | 1.0 | | | test r15, r15
Total Num Of Uops: 8
With 13 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 34.89 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 21.7 0.0 | 26.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 21.7 | 21.6 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 7 | 1.7 | 2.0 | | | | 1.7 | 1.6 | | rcl rcx, cl
| 7 | 1.7 | 2.0 | | | | 1.6 | 1.7 | | rcl r8, cl
| 7 | 1.6 | 2.0 | | | | 1.7 | 1.7 | | rcl r9, cl
| 7 | 1.7 | 2.0 | | | | 1.7 | 1.6 | | rcl r10, cl
| 7 | 1.7 | 2.0 | | | | 1.6 | 1.7 | | rcl r11, cl
| 7 | 1.6 | 2.0 | | | | 1.7 | 1.7 | | rcl r12, cl
| 7 | 1.7 | 2.0 | | | | 1.7 | 1.6 | | rcl r13, cl
| 7 | 1.7 | 2.0 | | | | 1.6 | 1.7 | | rcl r14, cl
| 7 | 1.6 | 2.0 | | | | 1.7 | 1.7 | | rcl rbx, cl
| 7 | 1.7 | 2.0 | | | | 1.7 | 1.6 | | rcl rdx, cl
| 7 | 1.7 | 2.0 | | | | 1.6 | 1.7 | | rcl rdi, cl
| 7 | 1.6 | 2.0 | | | | 1.7 | 1.7 | | rcl rsi, cl
| 7 | 1.7 | 2.0 | | | | 1.7 | 1.6 | | rcl rbp, cl
Total Num Of Uops: 91
With additional dependency-breaking instructions
Throughput Analysis Report
--------------------------
Block Throughput: 34.95 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 26.0 0.0 | 26.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 26.0 | 26.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl rcx, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r8, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r9, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r10, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r11, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r12, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r13, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl r14, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl rbx, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl rdx, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl rdi, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl rsi, cl
| 1 | | | | | | 1.0 | | | test r15, r15
| 7 | 2.0 | 2.0 | | | | 1.0 | 2.0 | | rcl rbp, cl
| 1 | | | | | | 1.0 | | | test r15, r15
Total Num Of Uops: 104