MUL (R32) - Throughput and Uops (IACA 3.0)
Throughput Analysis Report
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Block Throughput: 3.91 Cycles Throughput Bottleneck: Backend
Loop Count: 49
Port Binding In Cycles Per Iteration:
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| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
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| Cycles | 0.0 0.0 | 1.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 1.0 | 0.0 | 0.0 |
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| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
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| 2 | | 1.0 | | | | 1.0 | | | mul r8d
Total Num Of Uops: 2
With additional dependency-breaking instructions
Throughput Analysis Report
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Block Throughput: 0.95 Cycles Throughput Bottleneck: Dependency chains
Loop Count: 24
Port Binding In Cycles Per Iteration:
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| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 1.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 1.0 | 0.0 | 0.0 |
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| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
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| 2 | | 1.0 | | | | 1.0 | | | mul r8d
| 1* | | | | | | | | | xor rax, rax
Total Num Of Uops: 3