CMOVB (R32, R32) - Throughput and Uops

With unroll_count=500 and no inner loop

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 1.0
  • Reference cycles: 0.8
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 1.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.5
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
     4:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 1.0
  • Reference cycles: 0.98
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 2.0
  • UOPS_MITE: 2.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.47
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.53
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
     4:	90                   	nop
     5:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 1.0
  • Reference cycles: 0.93
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.5
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
     4:	90                   	nop
     5:	90                   	nop
     6:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 1.0
  • Reference cycles: 0.93
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.63
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.37
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 4 NOPs

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
     4:	90                   	nop
     5:	90                   	nop
     6:	90                   	nop
     7:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 2.0
  • Reference cycles: 1.77
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 5.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.5
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 1.0
  • Reference cycles: 0.89
  • UOPS_EXECUTED.THREAD: 1.1
  • RETIRE_SLOTS: 1.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.51
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.59
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 1.0
  • Reference cycles: 0.89
  • UOPS_EXECUTED.THREAD: 1.01
  • RETIRE_SLOTS: 1.01
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.5
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.51
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=200 and no inner loop

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
     4:	45 0f 42 d1          	cmovb  r10d,r9d
     8:	45 0f 42 d9          	cmovb  r11d,r9d
     c:	45 0f 42 e1          	cmovb  r12d,r9d
  

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 4.0
  • Reference cycles: 3.44
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.72
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 2.29
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
     4:	45 0f 42 d1          	cmovb  r10d,r9d
     8:	45 0f 42 d9          	cmovb  r11d,r9d
     c:	45 0f 42 e1          	cmovb  r12d,r9d
  

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 2.27
  • Reference cycles: 2.0
  • UOPS_EXECUTED.THREAD: 4.51
  • RETIRE_SLOTS: 4.5
  • UOPS_MITE: 0.04
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.25
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 2.25
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.04

With loop_count=100 and unroll_count=20

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
     4:	45 0f 42 d1          	cmovb  r10d,r9d
     8:	45 0f 42 d9          	cmovb  r11d,r9d
     c:	45 0f 42 e1          	cmovb  r12d,r9d
  

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 2.04
  • Reference cycles: 1.8
  • UOPS_EXECUTED.THREAD: 4.06
  • RETIRE_SLOTS: 4.05
  • UOPS_MITE: 0.04
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.03
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 2.03
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.04

With unroll_count=100 and no inner loop

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
     4:	45 0f 42 d1          	cmovb  r10d,r9d
     8:	45 0f 42 d9          	cmovb  r11d,r9d
     c:	45 0f 42 e1          	cmovb  r12d,r9d
    10:	45 0f 42 e9          	cmovb  r13d,r9d
    14:	45 0f 42 f1          	cmovb  r14d,r9d
    18:	41 0f 42 d9          	cmovb  ebx,r9d
    1c:	41 0f 42 c9          	cmovb  ecx,r9d
  

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 8.0
  • Reference cycles: 6.65
  • UOPS_EXECUTED.THREAD: 8.0
  • RETIRE_SLOTS: 8.0
  • UOPS_MITE: 8.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 3.43
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 4.57
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
     4:	45 0f 42 d1          	cmovb  r10d,r9d
     8:	45 0f 42 d9          	cmovb  r11d,r9d
     c:	45 0f 42 e1          	cmovb  r12d,r9d
    10:	45 0f 42 e9          	cmovb  r13d,r9d
    14:	45 0f 42 f1          	cmovb  r14d,r9d
    18:	41 0f 42 d9          	cmovb  ebx,r9d
    1c:	41 0f 42 c9          	cmovb  ecx,r9d
  

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 4.54
  • Reference cycles: 4.03
  • UOPS_EXECUTED.THREAD: 9.01
  • RETIRE_SLOTS: 9.0
  • UOPS_MITE: 0.09
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.5
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 4.51
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.08

With loop_count=100 and unroll_count=10

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
     4:	45 0f 42 d1          	cmovb  r10d,r9d
     8:	45 0f 42 d9          	cmovb  r11d,r9d
     c:	45 0f 42 e1          	cmovb  r12d,r9d
    10:	45 0f 42 e9          	cmovb  r13d,r9d
    14:	45 0f 42 f1          	cmovb  r14d,r9d
    18:	41 0f 42 d9          	cmovb  ebx,r9d
    1c:	41 0f 42 c9          	cmovb  ecx,r9d
  

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 4.08
  • Reference cycles: 3.61
  • UOPS_EXECUTED.THREAD: 8.11
  • RETIRE_SLOTS: 8.1
  • UOPS_MITE: 0.08
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.06
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 4.06
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.08

With unroll_count=100 and no inner loop

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
     4:	45 0f 42 d1          	cmovb  r10d,r9d
     8:	45 0f 42 d9          	cmovb  r11d,r9d
     c:	45 0f 42 e1          	cmovb  r12d,r9d
    10:	45 0f 42 e9          	cmovb  r13d,r9d
    14:	45 0f 42 f1          	cmovb  r14d,r9d
    18:	41 0f 42 d9          	cmovb  ebx,r9d
    1c:	41 0f 42 c9          	cmovb  ecx,r9d
    20:	41 0f 42 d1          	cmovb  edx,r9d
    24:	41 0f 42 f9          	cmovb  edi,r9d
    28:	41 0f 42 f1          	cmovb  esi,r9d
    2c:	41 0f 42 e9          	cmovb  ebp,r9d
  

• Show nanoBench command
• Results:
  • Instructions retired: 12.0
  • Core cycles: 12.0
  • Reference cycles: 10.64
  • UOPS_EXECUTED.THREAD: 12.0
  • RETIRE_SLOTS: 12.0
  • UOPS_MITE: 12.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 5.14
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 6.86
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 12.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
     4:	45 0f 42 d1          	cmovb  r10d,r9d
     8:	45 0f 42 d9          	cmovb  r11d,r9d
     c:	45 0f 42 e1          	cmovb  r12d,r9d
    10:	45 0f 42 e9          	cmovb  r13d,r9d
    14:	45 0f 42 f1          	cmovb  r14d,r9d
    18:	41 0f 42 d9          	cmovb  ebx,r9d
    1c:	41 0f 42 c9          	cmovb  ecx,r9d
    20:	41 0f 42 d1          	cmovb  edx,r9d
    24:	41 0f 42 f9          	cmovb  edi,r9d
    28:	41 0f 42 f1          	cmovb  esi,r9d
    2c:	41 0f 42 e9          	cmovb  ebp,r9d
  

• Show nanoBench command
• Results:
  • Instructions retired: 14.0
  • Core cycles: 6.52
  • Reference cycles: 5.76
  • UOPS_EXECUTED.THREAD: 13.01
  • RETIRE_SLOTS: 13.0
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 6.51
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 6.51
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

• Code:

     0:	45 0f 42 c1          	cmovb  r8d,r9d
     4:	45 0f 42 d1          	cmovb  r10d,r9d
     8:	45 0f 42 d9          	cmovb  r11d,r9d
     c:	45 0f 42 e1          	cmovb  r12d,r9d
    10:	45 0f 42 e9          	cmovb  r13d,r9d
    14:	45 0f 42 f1          	cmovb  r14d,r9d
    18:	41 0f 42 d9          	cmovb  ebx,r9d
    1c:	41 0f 42 c9          	cmovb  ecx,r9d
    20:	41 0f 42 d1          	cmovb  edx,r9d
    24:	41 0f 42 f9          	cmovb  edi,r9d
    28:	41 0f 42 f1          	cmovb  esi,r9d
    2c:	41 0f 42 e9          	cmovb  ebp,r9d
  

• Show nanoBench command
• Results:
  • Instructions retired: 12.2
  • Core cycles: 6.09
  • Reference cycles: 5.39
  • UOPS_EXECUTED.THREAD: 12.11
  • RETIRE_SLOTS: 12.1
  • UOPS_MITE: 0.13
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 6.05
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 6.06
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.12

With unroll_count=500 and no inner loop

• Code:

     0:	45 0f 42 c0          	cmovb  r8d,r8d
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 1.0
  • Reference cycles: 1.02
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 1.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.5
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	45 0f 42 c0          	cmovb  r8d,r8d
     4:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 1.0
  • Reference cycles: 1.02
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 2.0
  • UOPS_MITE: 2.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.47
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.53
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	45 0f 42 c0          	cmovb  r8d,r8d
     4:	90                   	nop
     5:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 1.0
  • Reference cycles: 0.8
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.5
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	45 0f 42 c0          	cmovb  r8d,r8d
     4:	90                   	nop
     5:	90                   	nop
     6:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 1.0
  • Reference cycles: 1.02
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.63
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.37
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 4 NOPs

• Code:

     0:	45 0f 42 c0          	cmovb  r8d,r8d
     4:	90                   	nop
     5:	90                   	nop
     6:	90                   	nop
     7:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 2.0
  • Reference cycles: 1.86
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 5.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.5
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	45 0f 42 c0          	cmovb  r8d,r8d
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 1.0
  • Reference cycles: 0.92
  • UOPS_EXECUTED.THREAD: 1.1
  • RETIRE_SLOTS: 1.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.51
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.59
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	45 0f 42 c0          	cmovb  r8d,r8d
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 1.0
  • Reference cycles: 0.92
  • UOPS_EXECUTED.THREAD: 1.01
  • RETIRE_SLOTS: 1.01
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.5
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.51
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01