BSF (R64, M64) - Throughput and Uops

With a non-indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 3.0
- Reference cycles: 2.88
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 3.0
- Reference cycles: 2.74
- UOPS_EXECUTED.THREAD: 2.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 3.0
- Reference cycles: 2.74
- UOPS_EXECUTED.THREAD: 2.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	4d 0f bc 4e 08       	bsf    r9,QWORD PTR [r14+0x8]
   9:	4d 0f bc 56 10       	bsf    r10,QWORD PTR [r14+0x10]
   e:	4d 0f bc 5e 18       	bsf    r11,QWORD PTR [r14+0x18]

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 3.66
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	4d 0f bc 4e 08       	bsf    r9,QWORD PTR [r14+0x8]
   9:	4d 0f bc 56 10       	bsf    r10,QWORD PTR [r14+0x10]
   e:	4d 0f bc 5e 18       	bsf    r11,QWORD PTR [r14+0x18]

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.01
- Reference cycles: 3.56
- UOPS_EXECUTED.THREAD: 8.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	4d 0f bc 4e 08       	bsf    r9,QWORD PTR [r14+0x8]
   9:	4d 0f bc 56 10       	bsf    r10,QWORD PTR [r14+0x10]
   e:	4d 0f bc 5e 18       	bsf    r11,QWORD PTR [r14+0x18]

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.01
- Reference cycles: 3.55
- UOPS_EXECUTED.THREAD: 8.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.68
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.21

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	4d 0f bc 4e 08       	bsf    r9,QWORD PTR [r14+0x8]
   9:	4d 0f bc 56 10       	bsf    r10,QWORD PTR [r14+0x10]
   e:	4d 0f bc 5e 18       	bsf    r11,QWORD PTR [r14+0x18]
  13:	4d 0f bc 66 20       	bsf    r12,QWORD PTR [r14+0x20]
  18:	49 0f bc 5e 28       	bsf    rbx,QWORD PTR [r14+0x28]
  1d:	49 0f bc 4e 30       	bsf    rcx,QWORD PTR [r14+0x30]
  22:	49 0f bc 56 38       	bsf    rdx,QWORD PTR [r14+0x38]

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 7.54
- UOPS_EXECUTED.THREAD: 16.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	4d 0f bc 4e 08       	bsf    r9,QWORD PTR [r14+0x8]
   9:	4d 0f bc 56 10       	bsf    r10,QWORD PTR [r14+0x10]
   e:	4d 0f bc 5e 18       	bsf    r11,QWORD PTR [r14+0x18]
  13:	4d 0f bc 66 20       	bsf    r12,QWORD PTR [r14+0x20]
  18:	49 0f bc 5e 28       	bsf    rbx,QWORD PTR [r14+0x28]
  1d:	49 0f bc 4e 30       	bsf    rcx,QWORD PTR [r14+0x30]
  22:	49 0f bc 56 38       	bsf    rdx,QWORD PTR [r14+0x38]

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.01
- Reference cycles: 7.09
- UOPS_EXECUTED.THREAD: 17.01
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	4d 0f bc 4e 08       	bsf    r9,QWORD PTR [r14+0x8]
   9:	4d 0f bc 56 10       	bsf    r10,QWORD PTR [r14+0x10]
   e:	4d 0f bc 5e 18       	bsf    r11,QWORD PTR [r14+0x18]
  13:	4d 0f bc 66 20       	bsf    r12,QWORD PTR [r14+0x20]
  18:	49 0f bc 5e 28       	bsf    rbx,QWORD PTR [r14+0x28]
  1d:	49 0f bc 4e 30       	bsf    rcx,QWORD PTR [r14+0x30]
  22:	49 0f bc 56 38       	bsf    rdx,QWORD PTR [r14+0x38]

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.01
- Reference cycles: 7.07
- UOPS_EXECUTED.THREAD: 16.11
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	4f 0f bc 04 2e       	bsf    r8,QWORD PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 3.0
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	4f 0f bc 04 2e       	bsf    r8,QWORD PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 3.0
- Reference cycles: 2.67
- UOPS_EXECUTED.THREAD: 2.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	4f 0f bc 04 2e       	bsf    r8,QWORD PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 3.0
- Reference cycles: 2.67
- UOPS_EXECUTED.THREAD: 2.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	4f 0f bc 04 2e       	bsf    r8,QWORD PTR [r14+r13*1]
   5:	4f 0f bc 4c 2e 08    	bsf    r9,QWORD PTR [r14+r13*1+0x8]
   b:	4f 0f bc 54 2e 10    	bsf    r10,QWORD PTR [r14+r13*1+0x10]
  11:	4f 0f bc 5c 2e 18    	bsf    r11,QWORD PTR [r14+r13*1+0x18]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 3.66
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	4f 0f bc 04 2e       	bsf    r8,QWORD PTR [r14+r13*1]
   5:	4f 0f bc 4c 2e 08    	bsf    r9,QWORD PTR [r14+r13*1+0x8]
   b:	4f 0f bc 54 2e 10    	bsf    r10,QWORD PTR [r14+r13*1+0x10]
  11:	4f 0f bc 5c 2e 18    	bsf    r11,QWORD PTR [r14+r13*1+0x18]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.01
- Reference cycles: 3.56
- UOPS_EXECUTED.THREAD: 8.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	4f 0f bc 04 2e       	bsf    r8,QWORD PTR [r14+r13*1]
   5:	4f 0f bc 4c 2e 08    	bsf    r9,QWORD PTR [r14+r13*1+0x8]
   b:	4f 0f bc 54 2e 10    	bsf    r10,QWORD PTR [r14+r13*1+0x10]
  11:	4f 0f bc 5c 2e 18    	bsf    r11,QWORD PTR [r14+r13*1+0x18]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.01
- Reference cycles: 3.55
- UOPS_EXECUTED.THREAD: 8.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	4f 0f bc 04 2e       	bsf    r8,QWORD PTR [r14+r13*1]
   5:	4f 0f bc 4c 2e 08    	bsf    r9,QWORD PTR [r14+r13*1+0x8]
   b:	4f 0f bc 54 2e 10    	bsf    r10,QWORD PTR [r14+r13*1+0x10]
  11:	4f 0f bc 5c 2e 18    	bsf    r11,QWORD PTR [r14+r13*1+0x18]
  17:	4f 0f bc 64 2e 20    	bsf    r12,QWORD PTR [r14+r13*1+0x20]
  1d:	4b 0f bc 5c 2e 28    	bsf    rbx,QWORD PTR [r14+r13*1+0x28]
  23:	4b 0f bc 4c 2e 30    	bsf    rcx,QWORD PTR [r14+r13*1+0x30]
  29:	4b 0f bc 54 2e 38    	bsf    rdx,QWORD PTR [r14+r13*1+0x38]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 7.32
- UOPS_EXECUTED.THREAD: 16.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	4f 0f bc 04 2e       	bsf    r8,QWORD PTR [r14+r13*1]
   5:	4f 0f bc 4c 2e 08    	bsf    r9,QWORD PTR [r14+r13*1+0x8]
   b:	4f 0f bc 54 2e 10    	bsf    r10,QWORD PTR [r14+r13*1+0x10]
  11:	4f 0f bc 5c 2e 18    	bsf    r11,QWORD PTR [r14+r13*1+0x18]
  17:	4f 0f bc 64 2e 20    	bsf    r12,QWORD PTR [r14+r13*1+0x20]
  1d:	4b 0f bc 5c 2e 28    	bsf    rbx,QWORD PTR [r14+r13*1+0x28]
  23:	4b 0f bc 4c 2e 30    	bsf    rcx,QWORD PTR [r14+r13*1+0x30]
  29:	4b 0f bc 54 2e 38    	bsf    rdx,QWORD PTR [r14+r13*1+0x38]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.01
- Reference cycles: 7.09
- UOPS_EXECUTED.THREAD: 17.01
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	4f 0f bc 04 2e       	bsf    r8,QWORD PTR [r14+r13*1]
   5:	4f 0f bc 4c 2e 08    	bsf    r9,QWORD PTR [r14+r13*1+0x8]
   b:	4f 0f bc 54 2e 10    	bsf    r10,QWORD PTR [r14+r13*1+0x10]
  11:	4f 0f bc 5c 2e 18    	bsf    r11,QWORD PTR [r14+r13*1+0x18]
  17:	4f 0f bc 64 2e 20    	bsf    r12,QWORD PTR [r14+r13*1+0x20]
  1d:	4b 0f bc 5c 2e 28    	bsf    rbx,QWORD PTR [r14+r13*1+0x28]
  23:	4b 0f bc 4c 2e 30    	bsf    rcx,QWORD PTR [r14+r13*1+0x30]
  29:	4b 0f bc 54 2e 38    	bsf    rdx,QWORD PTR [r14+r13*1+0x38]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.01
- Reference cycles: 7.09
- UOPS_EXECUTED.THREAD: 16.11
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

Tests for macro-fusion

With JB (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 82 00 00 00 00    	jb     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.52

With JB (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	72 00                	jb     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JBE (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 86 00 00 00 00    	jbe    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 2.88
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.52

With JBE (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	76 00                	jbe    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JL (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 8c 00 00 00 00    	jl     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.52

With JL (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	7c 00                	jl     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JLE (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 8e 00 00 00 00    	jle    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.52

With JLE (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	7e 00                	jle    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.88
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JNB (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 83 00 00 00 00    	jae    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.43
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.02
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.72

With JNB (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	73 00                	jae    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.75
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.87

With JNBE (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 87 00 00 00 00    	ja     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.52
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.02
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.67

With JNBE (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	77 00                	ja     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.12
- Reference cycles: 2.88
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.71
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.02
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.87

With JNL (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 8d 00 00 00 00    	jge    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.88
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.31
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.02
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.69

With JNL (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	7d 00                	jge    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 2.88
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.7
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.02
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.87

With JNLE (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 8f 00 00 00 00    	jg     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.43
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.02
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.69

With JNLE (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	7f 00                	jg     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 3.1
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.59
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.79

With JNO (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 81 00 00 00 00    	jno    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.35
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.98
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.69

With JNO (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	71 00                	jno    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 2.88
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.59
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.98
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.79

With JNP (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 8b 00 00 00 00    	jnp    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.52

With JNP (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	7b 00                	jnp    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JNS (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 89 00 00 00 00    	jns    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.39
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.02
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.98
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.72

With JNS (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	79 00                	jns    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 2.88
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.71
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.86

With JNZ (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 85 00 00 00 00    	jne    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.41
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.02
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.98
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.69

With JNZ (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	75 00                	jne    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.73
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.02
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.86

With JO (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 80 00 00 00 00    	jo     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.52

With JO (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	70 00                	jo     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JP (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 8a 00 00 00 00    	jp     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.33
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.02
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.98
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.71

With JP (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	7a 00                	jp     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 2.88
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.74
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.02
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.88

With JS (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 88 00 00 00 00    	js     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.52

With JS (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	78 00                	js     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JZ (Rel32)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	0f 84 00 00 00 00    	je     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.88
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.52

With JZ (Rel8)

Code:

   0:	4d 0f bc 06          	bsf    r8,QWORD PTR [r14]
   4:	74 00                	je     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 3.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5