ADD (M8, I8) - Throughput and Uops (IACA 3.0)


With a non-indexed addressing mode

With 1 independent instruction

Throughput Analysis Report
--------------------------
Block Throughput: 1.00 Cycles       Throughput Bottleneck: Backend
Loop Count:  40
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.3     0.0  |  0.2  |  0.7     0.7  |  0.6     0.6  |  1.0  |  0.2  |  0.2  |  0.7  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   4^     | 0.3         | 0.2  | 0.7     0.7 | 0.6     0.6 | 1.0  | 0.2  | 0.2  | 0.7  | add byte ptr [r14], 0x2
Total Num Of Uops: 4

With 16 independent instructions


Throughput Analysis Report
--------------------------
Block Throughput: 16.00 Cycles       Throughput Bottleneck: Backend
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  4.0     0.0  |  4.0  | 10.7    10.7  | 10.6    10.6  | 16.0  |  4.0  |  4.0  | 10.7  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   4^     | 1.0         |      | 0.7     0.7 | 0.6     0.6 | 1.0  |      |      | 0.7  | add byte ptr [r14], 0x2
|   4^     |             | 1.0  | 0.6     0.6 | 0.7     0.7 | 1.0  |      |      | 0.7  | add byte ptr [r14+0x1], 0x2
|   4^     |             |      | 0.7     0.7 | 0.7     0.7 | 1.0  | 1.0  |      | 0.6  | add byte ptr [r14+0x2], 0x2
|   4^     |             |      | 0.7     0.7 | 0.6     0.6 | 1.0  |      | 1.0  | 0.7  | add byte ptr [r14+0x3], 0x2
|   4^     | 1.0         |      | 0.6     0.6 | 0.7     0.7 | 1.0  |      |      | 0.7  | add byte ptr [r14+0x4], 0x2
|   4^     |             | 1.0  | 0.7     0.7 | 0.7     0.7 | 1.0  |      |      | 0.6  | add byte ptr [r14+0x5], 0x2
|   4^     |             |      | 0.7     0.7 | 0.6     0.6 | 1.0  | 1.0  |      | 0.7  | add byte ptr [r14+0x6], 0x2
|   4^     |             |      | 0.6     0.6 | 0.7     0.7 | 1.0  |      | 1.0  | 0.7  | add byte ptr [r14+0x7], 0x2
|   4^     | 1.0         |      | 0.7     0.7 | 0.7     0.7 | 1.0  |      |      | 0.6  | add byte ptr [r14+0x8], 0x2
|   4^     |             | 1.0  | 0.7     0.7 | 0.6     0.6 | 1.0  |      |      | 0.7  | add byte ptr [r14+0x9], 0x2
|   4^     |             |      | 0.6     0.6 | 0.7     0.7 | 1.0  | 1.0  |      | 0.7  | add byte ptr [r14+0xa], 0x2
|   4^     |             |      | 0.7     0.7 | 0.7     0.7 | 1.0  |      | 1.0  | 0.6  | add byte ptr [r14+0xb], 0x2
|   4^     | 1.0         |      | 0.7     0.7 | 0.6     0.6 | 1.0  |      |      | 0.7  | add byte ptr [r14+0xc], 0x2
|   4^     |             | 1.0  | 0.6     0.6 | 0.7     0.7 | 1.0  |      |      | 0.7  | add byte ptr [r14+0xd], 0x2
|   4^     |             |      | 0.7     0.7 | 0.7     0.7 | 1.0  | 1.0  |      | 0.6  | add byte ptr [r14+0xe], 0x2
|   4^     |             |      | 0.7     0.7 | 0.6     0.6 | 1.0  |      | 1.0  | 0.7  | add byte ptr [r14+0xf], 0x2
Total Num Of Uops: 64

With an indexed addressing mode

With 1 independent instruction

Throughput Analysis Report
--------------------------
Block Throughput: 1.00 Cycles       Throughput Bottleneck: Dependency chains
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.3     0.0  |  0.3  |  1.0     1.0  |  1.0     1.0  |  1.0  |  0.3  |  0.2  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   4      | 0.3         | 0.3  | 1.0     1.0 | 1.0     1.0 | 1.0  | 0.3  | 0.2  |      | add byte ptr [r14+r13*1], 0x2
Total Num Of Uops: 4

With 16 independent instructions


Throughput Analysis Report
--------------------------
Block Throughput: 16.00 Cycles       Throughput Bottleneck: FrontEnd
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  4.0     0.0  |  4.0  | 16.0    16.0  | 16.0    16.0  | 16.0  |  4.0  |  4.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   4      | 1.0         |      | 1.0     1.0 | 1.0     1.0 | 1.0  |      |      |      | add byte ptr [r14+r13*1], 0x2
|   4      |             | 1.0  | 1.0     1.0 | 1.0     1.0 | 1.0  |      |      |      | add byte ptr [r14+r13*1+0x1], 0x2
|   4      |             |      | 1.0     1.0 | 1.0     1.0 | 1.0  | 1.0  |      |      | add byte ptr [r14+r13*1+0x2], 0x2
|   4      |             |      | 1.0     1.0 | 1.0     1.0 | 1.0  |      | 1.0  |      | add byte ptr [r14+r13*1+0x3], 0x2
|   4      | 1.0         |      | 1.0     1.0 | 1.0     1.0 | 1.0  |      |      |      | add byte ptr [r14+r13*1+0x4], 0x2
|   4      |             | 1.0  | 1.0     1.0 | 1.0     1.0 | 1.0  |      |      |      | add byte ptr [r14+r13*1+0x5], 0x2
|   4      |             |      | 1.0     1.0 | 1.0     1.0 | 1.0  | 1.0  |      |      | add byte ptr [r14+r13*1+0x6], 0x2
|   4      |             |      | 1.0     1.0 | 1.0     1.0 | 1.0  |      | 1.0  |      | add byte ptr [r14+r13*1+0x7], 0x2
|   4      | 1.0         |      | 1.0     1.0 | 1.0     1.0 | 1.0  |      |      |      | add byte ptr [r14+r13*1+0x8], 0x2
|   4      |             | 1.0  | 1.0     1.0 | 1.0     1.0 | 1.0  |      |      |      | add byte ptr [r14+r13*1+0x9], 0x2
|   4      |             |      | 1.0     1.0 | 1.0     1.0 | 1.0  | 1.0  |      |      | add byte ptr [r14+r13*1+0xa], 0x2
|   4      |             |      | 1.0     1.0 | 1.0     1.0 | 1.0  |      | 1.0  |      | add byte ptr [r14+r13*1+0xb], 0x2
|   4      | 1.0         |      | 1.0     1.0 | 1.0     1.0 | 1.0  |      |      |      | add byte ptr [r14+r13*1+0xc], 0x2
|   4      |             | 1.0  | 1.0     1.0 | 1.0     1.0 | 1.0  |      |      |      | add byte ptr [r14+r13*1+0xd], 0x2
|   4      |             |      | 1.0     1.0 | 1.0     1.0 | 1.0  | 1.0  |      |      | add byte ptr [r14+r13*1+0xe], 0x2
|   4      |             |      | 1.0     1.0 | 1.0     1.0 | 1.0  |      | 1.0  |      | add byte ptr [r14+r13*1+0xf], 0x2
Total Num Of Uops: 64