ADDPS (XMM, M128)

With unroll_count=500 and no inner loop

Code:

   0:	41 0f 58 06          	addps  xmm0,XMMWORD PTR [r14]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 4.0
- Reference cycles: 3.46
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	41 0f 58 06          	addps  xmm0,XMMWORD PTR [r14]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 4.0
- Reference cycles: 3.55
- UOPS_EXECUTED.THREAD: 2.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	41 0f 58 06          	addps  xmm0,XMMWORD PTR [r14]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 4.0
- Reference cycles: 3.56
- UOPS_EXECUTED.THREAD: 2.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	41 0f 58 06          	addps  xmm0,XMMWORD PTR [r14]
   4:	41 0f 58 4e 10       	addps  xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 58 56 20       	addps  xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 58 5e 30       	addps  xmm3,XMMWORD PTR [r14+0x30]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 3.33
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.0
- UOPS_PORT_1: 2.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	41 0f 58 06          	addps  xmm0,XMMWORD PTR [r14]
   4:	41 0f 58 4e 10       	addps  xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 58 56 20       	addps  xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 58 5e 30       	addps  xmm3,XMMWORD PTR [r14+0x30]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.01
- Reference cycles: 3.52
- UOPS_EXECUTED.THREAD: 8.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.0
- UOPS_PORT_1: 2.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	41 0f 58 06          	addps  xmm0,XMMWORD PTR [r14]
   4:	41 0f 58 4e 10       	addps  xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 58 56 20       	addps  xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 58 5e 30       	addps  xmm3,XMMWORD PTR [r14+0x30]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.01
- Reference cycles: 3.58
- UOPS_EXECUTED.THREAD: 8.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.68
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.0
- UOPS_PORT_1: 2.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.21

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	41 0f 58 06          	addps  xmm0,XMMWORD PTR [r14]
   4:	41 0f 58 4e 10       	addps  xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 58 56 20       	addps  xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 58 5e 30       	addps  xmm3,XMMWORD PTR [r14+0x30]
  13:	41 0f 58 66 40       	addps  xmm4,XMMWORD PTR [r14+0x40]
  18:	41 0f 58 6e 50       	addps  xmm5,XMMWORD PTR [r14+0x50]
  1d:	41 0f 58 76 60       	addps  xmm6,XMMWORD PTR [r14+0x60]
  22:	41 0f 58 7e 70       	addps  xmm7,XMMWORD PTR [r14+0x70]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOVUPD XMM4, [R14];
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM5, [R14];
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOVUPD XMM6, [R14];
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOVUPD XMM7, [R14];
MOV [R14+112], RAX;
MOV [R14+120], RAX

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 4.36
- Reference cycles: 3.99
- UOPS_EXECUTED.THREAD: 16.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.01

With loop_count=1000 and unroll_count=1

Code:

   0:	41 0f 58 06          	addps  xmm0,XMMWORD PTR [r14]
   4:	41 0f 58 4e 10       	addps  xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 58 56 20       	addps  xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 58 5e 30       	addps  xmm3,XMMWORD PTR [r14+0x30]
  13:	41 0f 58 66 40       	addps  xmm4,XMMWORD PTR [r14+0x40]
  18:	41 0f 58 6e 50       	addps  xmm5,XMMWORD PTR [r14+0x50]
  1d:	41 0f 58 76 60       	addps  xmm6,XMMWORD PTR [r14+0x60]
  22:	41 0f 58 7e 70       	addps  xmm7,XMMWORD PTR [r14+0x70]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOVUPD XMM4, [R14];
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM5, [R14];
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOVUPD XMM6, [R14];
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOVUPD XMM7, [R14];
MOV [R14+112], RAX;
MOV [R14+120], RAX

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 4.24
- Reference cycles: 3.75
- UOPS_EXECUTED.THREAD: 17.01
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	41 0f 58 06          	addps  xmm0,XMMWORD PTR [r14]
   4:	41 0f 58 4e 10       	addps  xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 58 56 20       	addps  xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 58 5e 30       	addps  xmm3,XMMWORD PTR [r14+0x30]
  13:	41 0f 58 66 40       	addps  xmm4,XMMWORD PTR [r14+0x40]
  18:	41 0f 58 6e 50       	addps  xmm5,XMMWORD PTR [r14+0x50]
  1d:	41 0f 58 76 60       	addps  xmm6,XMMWORD PTR [r14+0x60]
  22:	41 0f 58 7e 70       	addps  xmm7,XMMWORD PTR [r14+0x70]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOVUPD XMM4, [R14];
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM5, [R14];
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOVUPD XMM6, [R14];
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOVUPD XMM7, [R14];
MOV [R14+112], RAX;
MOV [R14+120], RAX

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 4.24
- Reference cycles: 3.72
- UOPS_EXECUTED.THREAD: 16.11
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 4.01
- UOPS_PORT_3: 4.01
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 13 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	41 0f 58 06          	addps  xmm0,XMMWORD PTR [r14]
   4:	41 0f 58 4e 10       	addps  xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 58 56 20       	addps  xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 58 5e 30       	addps  xmm3,XMMWORD PTR [r14+0x30]
  13:	41 0f 58 66 40       	addps  xmm4,XMMWORD PTR [r14+0x40]
  18:	41 0f 58 6e 50       	addps  xmm5,XMMWORD PTR [r14+0x50]
  1d:	41 0f 58 76 60       	addps  xmm6,XMMWORD PTR [r14+0x60]
  22:	41 0f 58 7e 70       	addps  xmm7,XMMWORD PTR [r14+0x70]
  27:	45 0f 58 86 80 00 00 	addps  xmm8,XMMWORD PTR [r14+0x80]
  2e:	00 
  2f:	45 0f 58 8e 90 00 00 	addps  xmm9,XMMWORD PTR [r14+0x90]
  36:	00 
  37:	45 0f 58 96 a0 00 00 	addps  xmm10,XMMWORD PTR [r14+0xa0]
  3e:	00 
  3f:	45 0f 58 9e b0 00 00 	addps  xmm11,XMMWORD PTR [r14+0xb0]
  46:	00 
  47:	45 0f 58 a6 c0 00 00 	addps  xmm12,XMMWORD PTR [r14+0xc0]
  4e:	00

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOVUPD XMM4, [R14];
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM5, [R14];
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOVUPD XMM6, [R14];
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOVUPD XMM7, [R14];
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOVUPD XMM8, [R14];
MOV [R14+128], RAX;
MOV [R14+136], RAX;
MOVUPD XMM9, [R14];
MOV [R14+144], RAX;
MOV [R14+152], RAX;
MOVUPD XMM10, [R14];
MOV [R14+160], RAX;
MOV [R14+168], RAX;
MOVUPD XMM11, [R14];
MOV [R14+176], RAX;
MOV [R14+184], RAX;
MOVUPD XMM12, [R14];
MOV [R14+192], RAX;
MOV [R14+200], RAX

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 7.0
- Reference cycles: 5.76
- UOPS_EXECUTED.THREAD: 26.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 13.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.5
- UOPS_PORT_1: 6.5
- UOPS_PORT_2: 6.51
- UOPS_PORT_3: 6.51
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 3.32

With loop_count=1000 and unroll_count=1

Code:

   0:	41 0f 58 06          	addps  xmm0,XMMWORD PTR [r14]
   4:	41 0f 58 4e 10       	addps  xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 58 56 20       	addps  xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 58 5e 30       	addps  xmm3,XMMWORD PTR [r14+0x30]
  13:	41 0f 58 66 40       	addps  xmm4,XMMWORD PTR [r14+0x40]
  18:	41 0f 58 6e 50       	addps  xmm5,XMMWORD PTR [r14+0x50]
  1d:	41 0f 58 76 60       	addps  xmm6,XMMWORD PTR [r14+0x60]
  22:	41 0f 58 7e 70       	addps  xmm7,XMMWORD PTR [r14+0x70]
  27:	45 0f 58 86 80 00 00 	addps  xmm8,XMMWORD PTR [r14+0x80]
  2e:	00 
  2f:	45 0f 58 8e 90 00 00 	addps  xmm9,XMMWORD PTR [r14+0x90]
  36:	00 
  37:	45 0f 58 96 a0 00 00 	addps  xmm10,XMMWORD PTR [r14+0xa0]
  3e:	00 
  3f:	45 0f 58 9e b0 00 00 	addps  xmm11,XMMWORD PTR [r14+0xb0]
  46:	00 
  47:	45 0f 58 a6 c0 00 00 	addps  xmm12,XMMWORD PTR [r14+0xc0]
  4e:	00

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOVUPD XMM4, [R14];
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM5, [R14];
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOVUPD XMM6, [R14];
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOVUPD XMM7, [R14];
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOVUPD XMM8, [R14];
MOV [R14+128], RAX;
MOV [R14+136], RAX;
MOVUPD XMM9, [R14];
MOV [R14+144], RAX;
MOV [R14+152], RAX;
MOVUPD XMM10, [R14];
MOV [R14+160], RAX;
MOV [R14+168], RAX;
MOVUPD XMM11, [R14];
MOV [R14+176], RAX;
MOV [R14+184], RAX;
MOVUPD XMM12, [R14];
MOV [R14+192], RAX;
MOV [R14+200], RAX

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 6.88
- Reference cycles: 6.12
- UOPS_EXECUTED.THREAD: 27.01
- RETIRE_SLOTS: 14.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.5
- UOPS_PORT_1: 6.5
- UOPS_PORT_2: 6.5
- UOPS_PORT_3: 6.51
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	41 0f 58 06          	addps  xmm0,XMMWORD PTR [r14]
   4:	41 0f 58 4e 10       	addps  xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 58 56 20       	addps  xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 58 5e 30       	addps  xmm3,XMMWORD PTR [r14+0x30]
  13:	41 0f 58 66 40       	addps  xmm4,XMMWORD PTR [r14+0x40]
  18:	41 0f 58 6e 50       	addps  xmm5,XMMWORD PTR [r14+0x50]
  1d:	41 0f 58 76 60       	addps  xmm6,XMMWORD PTR [r14+0x60]
  22:	41 0f 58 7e 70       	addps  xmm7,XMMWORD PTR [r14+0x70]
  27:	45 0f 58 86 80 00 00 	addps  xmm8,XMMWORD PTR [r14+0x80]
  2e:	00 
  2f:	45 0f 58 8e 90 00 00 	addps  xmm9,XMMWORD PTR [r14+0x90]
  36:	00 
  37:	45 0f 58 96 a0 00 00 	addps  xmm10,XMMWORD PTR [r14+0xa0]
  3e:	00 
  3f:	45 0f 58 9e b0 00 00 	addps  xmm11,XMMWORD PTR [r14+0xb0]
  46:	00 
  47:	45 0f 58 a6 c0 00 00 	addps  xmm12,XMMWORD PTR [r14+0xc0]
  4e:	00

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOVUPD XMM4, [R14];
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM5, [R14];
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOVUPD XMM6, [R14];
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOVUPD XMM7, [R14];
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOVUPD XMM8, [R14];
MOV [R14+128], RAX;
MOV [R14+136], RAX;
MOVUPD XMM9, [R14];
MOV [R14+144], RAX;
MOV [R14+152], RAX;
MOVUPD XMM10, [R14];
MOV [R14+160], RAX;
MOV [R14+168], RAX;
MOVUPD XMM11, [R14];
MOV [R14+176], RAX;
MOV [R14+184], RAX;
MOVUPD XMM12, [R14];
MOV [R14+192], RAX;
MOV [R14+200], RAX

Show nanoBench command
Results:
- Instructions retired: 13.2
- Core cycles: 6.89
- Reference cycles: 6.14
- UOPS_EXECUTED.THREAD: 26.11
- RETIRE_SLOTS: 13.1
- UOPS_MITE: 0.13
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.5
- UOPS_PORT_1: 6.5
- UOPS_PORT_2: 6.5
- UOPS_PORT_3: 6.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.04

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	43 0f 58 04 2e       	addps  xmm0,XMMWORD PTR [r14+r13*1]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 4.0
- Reference cycles: 3.55
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	43 0f 58 04 2e       	addps  xmm0,XMMWORD PTR [r14+r13*1]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 4.0
- Reference cycles: 3.56
- UOPS_EXECUTED.THREAD: 2.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	43 0f 58 04 2e       	addps  xmm0,XMMWORD PTR [r14+r13*1]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 4.0
- Reference cycles: 3.55
- UOPS_EXECUTED.THREAD: 2.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	43 0f 58 04 2e       	addps  xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 58 4c 2e 10    	addps  xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 58 54 2e 20    	addps  xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 58 5c 2e 30    	addps  xmm3,XMMWORD PTR [r14+r13*1+0x30]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13;
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 3.44
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.0
- UOPS_PORT_1: 2.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	43 0f 58 04 2e       	addps  xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 58 4c 2e 10    	addps  xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 58 54 2e 20    	addps  xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 58 5c 2e 30    	addps  xmm3,XMMWORD PTR [r14+r13*1+0x30]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13;
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.01
- Reference cycles: 3.56
- UOPS_EXECUTED.THREAD: 8.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.0
- UOPS_PORT_1: 2.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	43 0f 58 04 2e       	addps  xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 58 4c 2e 10    	addps  xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 58 54 2e 20    	addps  xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 58 5c 2e 30    	addps  xmm3,XMMWORD PTR [r14+r13*1+0x30]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13;
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.01
- Reference cycles: 3.52
- UOPS_EXECUTED.THREAD: 8.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.0
- UOPS_PORT_1: 2.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	43 0f 58 04 2e       	addps  xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 58 4c 2e 10    	addps  xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 58 54 2e 20    	addps  xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 58 5c 2e 30    	addps  xmm3,XMMWORD PTR [r14+r13*1+0x30]
  17:	43 0f 58 64 2e 40    	addps  xmm4,XMMWORD PTR [r14+r13*1+0x40]
  1d:	43 0f 58 6c 2e 50    	addps  xmm5,XMMWORD PTR [r14+r13*1+0x50]
  23:	43 0f 58 74 2e 60    	addps  xmm6,XMMWORD PTR [r14+r13*1+0x60]
  29:	43 0f 58 7c 2e 70    	addps  xmm7,XMMWORD PTR [r14+r13*1+0x70]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13;
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOVUPD XMM4, [R14];
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM5, [R14];
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOVUPD XMM6, [R14];
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOVUPD XMM7, [R14];
MOV [R14+112], RAX;
MOV [R14+120], RAX

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 4.23
- Reference cycles: 3.33
- UOPS_EXECUTED.THREAD: 16.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.01

With loop_count=1000 and unroll_count=1

Code:

   0:	43 0f 58 04 2e       	addps  xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 58 4c 2e 10    	addps  xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 58 54 2e 20    	addps  xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 58 5c 2e 30    	addps  xmm3,XMMWORD PTR [r14+r13*1+0x30]
  17:	43 0f 58 64 2e 40    	addps  xmm4,XMMWORD PTR [r14+r13*1+0x40]
  1d:	43 0f 58 6c 2e 50    	addps  xmm5,XMMWORD PTR [r14+r13*1+0x50]
  23:	43 0f 58 74 2e 60    	addps  xmm6,XMMWORD PTR [r14+r13*1+0x60]
  29:	43 0f 58 7c 2e 70    	addps  xmm7,XMMWORD PTR [r14+r13*1+0x70]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13;
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOVUPD XMM4, [R14];
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM5, [R14];
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOVUPD XMM6, [R14];
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOVUPD XMM7, [R14];
MOV [R14+112], RAX;
MOV [R14+120], RAX

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 4.24
- Reference cycles: 3.75
- UOPS_EXECUTED.THREAD: 17.01
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.01
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	43 0f 58 04 2e       	addps  xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 58 4c 2e 10    	addps  xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 58 54 2e 20    	addps  xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 58 5c 2e 30    	addps  xmm3,XMMWORD PTR [r14+r13*1+0x30]
  17:	43 0f 58 64 2e 40    	addps  xmm4,XMMWORD PTR [r14+r13*1+0x40]
  1d:	43 0f 58 6c 2e 50    	addps  xmm5,XMMWORD PTR [r14+r13*1+0x50]
  23:	43 0f 58 74 2e 60    	addps  xmm6,XMMWORD PTR [r14+r13*1+0x60]
  29:	43 0f 58 7c 2e 70    	addps  xmm7,XMMWORD PTR [r14+r13*1+0x70]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13;
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOVUPD XMM4, [R14];
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM5, [R14];
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOVUPD XMM6, [R14];
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOVUPD XMM7, [R14];
MOV [R14+112], RAX;
MOV [R14+120], RAX

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 4.24
- Reference cycles: 3.72
- UOPS_EXECUTED.THREAD: 16.11
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 13 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	43 0f 58 04 2e       	addps  xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 58 4c 2e 10    	addps  xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 58 54 2e 20    	addps  xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 58 5c 2e 30    	addps  xmm3,XMMWORD PTR [r14+r13*1+0x30]
  17:	43 0f 58 64 2e 40    	addps  xmm4,XMMWORD PTR [r14+r13*1+0x40]
  1d:	43 0f 58 6c 2e 50    	addps  xmm5,XMMWORD PTR [r14+r13*1+0x50]
  23:	43 0f 58 74 2e 60    	addps  xmm6,XMMWORD PTR [r14+r13*1+0x60]
  29:	43 0f 58 7c 2e 70    	addps  xmm7,XMMWORD PTR [r14+r13*1+0x70]
  2f:	47 0f 58 84 2e 80 00 	addps  xmm8,XMMWORD PTR [r14+r13*1+0x80]
  36:	00 00 
  38:	47 0f 58 8c 2e 90 00 	addps  xmm9,XMMWORD PTR [r14+r13*1+0x90]
  3f:	00 00 
  41:	47 0f 58 94 2e a0 00 	addps  xmm10,XMMWORD PTR [r14+r13*1+0xa0]
  48:	00 00 
  4a:	47 0f 58 9c 2e b0 00 	addps  xmm11,XMMWORD PTR [r14+r13*1+0xb0]
  51:	00 00 
  53:	47 0f 58 a4 2e c0 00 	addps  xmm12,XMMWORD PTR [r14+r13*1+0xc0]
  5a:	00 00

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13;
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOVUPD XMM4, [R14];
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM5, [R14];
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOVUPD XMM6, [R14];
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOVUPD XMM7, [R14];
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOVUPD XMM8, [R14];
MOV [R14+128], RAX;
MOV [R14+136], RAX;
MOVUPD XMM9, [R14];
MOV [R14+144], RAX;
MOV [R14+152], RAX;
MOVUPD XMM10, [R14];
MOV [R14+160], RAX;
MOV [R14+168], RAX;
MOVUPD XMM11, [R14];
MOV [R14+176], RAX;
MOV [R14+184], RAX;
MOVUPD XMM12, [R14];
MOV [R14+192], RAX;
MOV [R14+200], RAX

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 7.03
- Reference cycles: 5.76
- UOPS_EXECUTED.THREAD: 26.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 13.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.51
- UOPS_PORT_1: 6.5
- UOPS_PORT_2: 6.5
- UOPS_PORT_3: 6.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 3.53

With loop_count=1000 and unroll_count=1

Code:

   0:	43 0f 58 04 2e       	addps  xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 58 4c 2e 10    	addps  xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 58 54 2e 20    	addps  xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 58 5c 2e 30    	addps  xmm3,XMMWORD PTR [r14+r13*1+0x30]
  17:	43 0f 58 64 2e 40    	addps  xmm4,XMMWORD PTR [r14+r13*1+0x40]
  1d:	43 0f 58 6c 2e 50    	addps  xmm5,XMMWORD PTR [r14+r13*1+0x50]
  23:	43 0f 58 74 2e 60    	addps  xmm6,XMMWORD PTR [r14+r13*1+0x60]
  29:	43 0f 58 7c 2e 70    	addps  xmm7,XMMWORD PTR [r14+r13*1+0x70]
  2f:	47 0f 58 84 2e 80 00 	addps  xmm8,XMMWORD PTR [r14+r13*1+0x80]
  36:	00 00 
  38:	47 0f 58 8c 2e 90 00 	addps  xmm9,XMMWORD PTR [r14+r13*1+0x90]
  3f:	00 00 
  41:	47 0f 58 94 2e a0 00 	addps  xmm10,XMMWORD PTR [r14+r13*1+0xa0]
  48:	00 00 
  4a:	47 0f 58 9c 2e b0 00 	addps  xmm11,XMMWORD PTR [r14+r13*1+0xb0]
  51:	00 00 
  53:	47 0f 58 a4 2e c0 00 	addps  xmm12,XMMWORD PTR [r14+r13*1+0xc0]
  5a:	00 00

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13;
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOVUPD XMM4, [R14];
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM5, [R14];
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOVUPD XMM6, [R14];
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOVUPD XMM7, [R14];
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOVUPD XMM8, [R14];
MOV [R14+128], RAX;
MOV [R14+136], RAX;
MOVUPD XMM9, [R14];
MOV [R14+144], RAX;
MOV [R14+152], RAX;
MOVUPD XMM10, [R14];
MOV [R14+160], RAX;
MOV [R14+168], RAX;
MOVUPD XMM11, [R14];
MOV [R14+176], RAX;
MOV [R14+184], RAX;
MOVUPD XMM12, [R14];
MOV [R14+192], RAX;
MOV [R14+200], RAX

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 6.88
- Reference cycles: 6.12
- UOPS_EXECUTED.THREAD: 27.01
- RETIRE_SLOTS: 14.0
- UOPS_MITE: 4.03
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.5
- UOPS_PORT_1: 6.5
- UOPS_PORT_2: 6.51
- UOPS_PORT_3: 6.51
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.01

With loop_count=100 and unroll_count=10

Code:

   0:	43 0f 58 04 2e       	addps  xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 58 4c 2e 10    	addps  xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 58 54 2e 20    	addps  xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 58 5c 2e 30    	addps  xmm3,XMMWORD PTR [r14+r13*1+0x30]
  17:	43 0f 58 64 2e 40    	addps  xmm4,XMMWORD PTR [r14+r13*1+0x40]
  1d:	43 0f 58 6c 2e 50    	addps  xmm5,XMMWORD PTR [r14+r13*1+0x50]
  23:	43 0f 58 74 2e 60    	addps  xmm6,XMMWORD PTR [r14+r13*1+0x60]
  29:	43 0f 58 7c 2e 70    	addps  xmm7,XMMWORD PTR [r14+r13*1+0x70]
  2f:	47 0f 58 84 2e 80 00 	addps  xmm8,XMMWORD PTR [r14+r13*1+0x80]
  36:	00 00 
  38:	47 0f 58 8c 2e 90 00 	addps  xmm9,XMMWORD PTR [r14+r13*1+0x90]
  3f:	00 00 
  41:	47 0f 58 94 2e a0 00 	addps  xmm10,XMMWORD PTR [r14+r13*1+0xa0]
  48:	00 00 
  4a:	47 0f 58 9c 2e b0 00 	addps  xmm11,XMMWORD PTR [r14+r13*1+0xb0]
  51:	00 00 
  53:	47 0f 58 a4 2e c0 00 	addps  xmm12,XMMWORD PTR [r14+r13*1+0xc0]
  5a:	00 00

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13;
MOVUPD XMM1, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOVUPD XMM2, [R14];
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOVUPD XMM3, [R14];
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOVUPD XMM4, [R14];
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM5, [R14];
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOVUPD XMM6, [R14];
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOVUPD XMM7, [R14];
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOVUPD XMM8, [R14];
MOV [R14+128], RAX;
MOV [R14+136], RAX;
MOVUPD XMM9, [R14];
MOV [R14+144], RAX;
MOV [R14+152], RAX;
MOVUPD XMM10, [R14];
MOV [R14+160], RAX;
MOV [R14+168], RAX;
MOVUPD XMM11, [R14];
MOV [R14+176], RAX;
MOV [R14+184], RAX;
MOVUPD XMM12, [R14];
MOV [R14+192], RAX;
MOV [R14+200], RAX

Show nanoBench command
Results:
- Instructions retired: 13.2
- Core cycles: 6.89
- Reference cycles: 6.14
- UOPS_EXECUTED.THREAD: 26.11
- RETIRE_SLOTS: 13.1
- UOPS_MITE: 0.43
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.5
- UOPS_PORT_1: 6.5
- UOPS_PORT_2: 6.5
- UOPS_PORT_3: 6.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.14

ADDPS (XMM, M128) - Throughput and Uops

With a non-indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 13 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 13 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10