VFMADD231PS (XMM, XMM, XMM)

With unroll_count=500 and no inner loop

Code:

   0:	c4 e2 71 b8 c2       	vfmadd231ps xmm0,xmm1,xmm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 4.0
- Reference cycles: 2.05
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	c4 e2 71 b8 c2       	vfmadd231ps xmm0,xmm1,xmm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 4.0
- Reference cycles: 2.0
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	c4 e2 71 b8 c2       	vfmadd231ps xmm0,xmm1,xmm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 4.0
- Reference cycles: 1.99
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.49
- UOPS_PORT_1: 0.51
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	c4 e2 71 b8 c2       	vfmadd231ps xmm0,xmm1,xmm2
   5:	c4 e2 71 b8 da       	vfmadd231ps xmm3,xmm1,xmm2
   a:	c4 e2 71 b8 e2       	vfmadd231ps xmm4,xmm1,xmm2
   f:	c4 e2 71 b8 ea       	vfmadd231ps xmm5,xmm1,xmm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14]

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 1.91
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.0
- UOPS_PORT_1: 2.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	c4 e2 71 b8 c2       	vfmadd231ps xmm0,xmm1,xmm2
   5:	c4 e2 71 b8 da       	vfmadd231ps xmm3,xmm1,xmm2
   a:	c4 e2 71 b8 e2       	vfmadd231ps xmm4,xmm1,xmm2
   f:	c4 e2 71 b8 ea       	vfmadd231ps xmm5,xmm1,xmm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14]

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.01
- Reference cycles: 2.0
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.99
- UOPS_PORT_1: 2.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	c4 e2 71 b8 c2       	vfmadd231ps xmm0,xmm1,xmm2
   5:	c4 e2 71 b8 da       	vfmadd231ps xmm3,xmm1,xmm2
   a:	c4 e2 71 b8 e2       	vfmadd231ps xmm4,xmm1,xmm2
   f:	c4 e2 71 b8 ea       	vfmadd231ps xmm5,xmm1,xmm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14]

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.01
- Reference cycles: 2.01
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.99
- UOPS_PORT_1: 2.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c4 e2 71 b8 c2       	vfmadd231ps xmm0,xmm1,xmm2
   5:	c4 e2 71 b8 da       	vfmadd231ps xmm3,xmm1,xmm2
   a:	c4 e2 71 b8 e2       	vfmadd231ps xmm4,xmm1,xmm2
   f:	c4 e2 71 b8 ea       	vfmadd231ps xmm5,xmm1,xmm2
  14:	c4 e2 71 b8 f2       	vfmadd231ps xmm6,xmm1,xmm2
  19:	c4 e2 71 b8 fa       	vfmadd231ps xmm7,xmm1,xmm2
  1e:	c4 62 71 b8 c2       	vfmadd231ps xmm8,xmm1,xmm2
  23:	c4 62 71 b8 ca       	vfmadd231ps xmm9,xmm1,xmm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14];
VMOVUPD XMM6, [R14];
VMOVUPD XMM7, [R14];
VMOVUPD XMM8, [R14];
VMOVUPD XMM9, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 4.25
- Reference cycles: 2.6
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 3.98
- UOPS_PORT_1: 4.02
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	c4 e2 71 b8 c2       	vfmadd231ps xmm0,xmm1,xmm2
   5:	c4 e2 71 b8 da       	vfmadd231ps xmm3,xmm1,xmm2
   a:	c4 e2 71 b8 e2       	vfmadd231ps xmm4,xmm1,xmm2
   f:	c4 e2 71 b8 ea       	vfmadd231ps xmm5,xmm1,xmm2
  14:	c4 e2 71 b8 f2       	vfmadd231ps xmm6,xmm1,xmm2
  19:	c4 e2 71 b8 fa       	vfmadd231ps xmm7,xmm1,xmm2
  1e:	c4 62 71 b8 c2       	vfmadd231ps xmm8,xmm1,xmm2
  23:	c4 62 71 b8 ca       	vfmadd231ps xmm9,xmm1,xmm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14];
VMOVUPD XMM6, [R14];
VMOVUPD XMM7, [R14];
VMOVUPD XMM8, [R14];
VMOVUPD XMM9, [R14]

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 4.37
- Reference cycles: 2.17
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.01
- UOPS_PORT_0: 3.99
- UOPS_PORT_1: 4.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	c4 e2 71 b8 c2       	vfmadd231ps xmm0,xmm1,xmm2
   5:	c4 e2 71 b8 da       	vfmadd231ps xmm3,xmm1,xmm2
   a:	c4 e2 71 b8 e2       	vfmadd231ps xmm4,xmm1,xmm2
   f:	c4 e2 71 b8 ea       	vfmadd231ps xmm5,xmm1,xmm2
  14:	c4 e2 71 b8 f2       	vfmadd231ps xmm6,xmm1,xmm2
  19:	c4 e2 71 b8 fa       	vfmadd231ps xmm7,xmm1,xmm2
  1e:	c4 62 71 b8 c2       	vfmadd231ps xmm8,xmm1,xmm2
  23:	c4 62 71 b8 ca       	vfmadd231ps xmm9,xmm1,xmm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14];
VMOVUPD XMM6, [R14];
VMOVUPD XMM7, [R14];
VMOVUPD XMM8, [R14];
VMOVUPD XMM9, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 4.22
- Reference cycles: 2.17
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 3.98
- UOPS_PORT_1: 4.02
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 11 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c4 e2 71 b8 c2       	vfmadd231ps xmm0,xmm1,xmm2
   5:	c4 e2 71 b8 da       	vfmadd231ps xmm3,xmm1,xmm2
   a:	c4 e2 71 b8 e2       	vfmadd231ps xmm4,xmm1,xmm2
   f:	c4 e2 71 b8 ea       	vfmadd231ps xmm5,xmm1,xmm2
  14:	c4 e2 71 b8 f2       	vfmadd231ps xmm6,xmm1,xmm2
  19:	c4 e2 71 b8 fa       	vfmadd231ps xmm7,xmm1,xmm2
  1e:	c4 62 71 b8 c2       	vfmadd231ps xmm8,xmm1,xmm2
  23:	c4 62 71 b8 ca       	vfmadd231ps xmm9,xmm1,xmm2
  28:	c4 62 71 b8 d2       	vfmadd231ps xmm10,xmm1,xmm2
  2d:	c4 62 71 b8 da       	vfmadd231ps xmm11,xmm1,xmm2
  32:	c4 62 71 b8 e2       	vfmadd231ps xmm12,xmm1,xmm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14];
VMOVUPD XMM6, [R14];
VMOVUPD XMM7, [R14];
VMOVUPD XMM8, [R14];
VMOVUPD XMM9, [R14];
VMOVUPD XMM10, [R14];
VMOVUPD XMM11, [R14];
VMOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.52
- Reference cycles: 2.6
- UOPS_EXECUTED.THREAD: 11.0
- RETIRE_SLOTS: 11.0
- UOPS_MITE: 11.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 5.5
- UOPS_PORT_1: 5.5
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.75

With loop_count=1000 and unroll_count=1

Code:

   0:	c4 e2 71 b8 c2       	vfmadd231ps xmm0,xmm1,xmm2
   5:	c4 e2 71 b8 da       	vfmadd231ps xmm3,xmm1,xmm2
   a:	c4 e2 71 b8 e2       	vfmadd231ps xmm4,xmm1,xmm2
   f:	c4 e2 71 b8 ea       	vfmadd231ps xmm5,xmm1,xmm2
  14:	c4 e2 71 b8 f2       	vfmadd231ps xmm6,xmm1,xmm2
  19:	c4 e2 71 b8 fa       	vfmadd231ps xmm7,xmm1,xmm2
  1e:	c4 62 71 b8 c2       	vfmadd231ps xmm8,xmm1,xmm2
  23:	c4 62 71 b8 ca       	vfmadd231ps xmm9,xmm1,xmm2
  28:	c4 62 71 b8 d2       	vfmadd231ps xmm10,xmm1,xmm2
  2d:	c4 62 71 b8 da       	vfmadd231ps xmm11,xmm1,xmm2
  32:	c4 62 71 b8 e2       	vfmadd231ps xmm12,xmm1,xmm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14];
VMOVUPD XMM6, [R14];
VMOVUPD XMM7, [R14];
VMOVUPD XMM8, [R14];
VMOVUPD XMM9, [R14];
VMOVUPD XMM10, [R14];
VMOVUPD XMM11, [R14];
VMOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 5.53
- Reference cycles: 2.7
- UOPS_EXECUTED.THREAD: 12.0
- RETIRE_SLOTS: 12.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.01
- UOPS_PORT_0: 5.49
- UOPS_PORT_1: 5.51
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	c4 e2 71 b8 c2       	vfmadd231ps xmm0,xmm1,xmm2
   5:	c4 e2 71 b8 da       	vfmadd231ps xmm3,xmm1,xmm2
   a:	c4 e2 71 b8 e2       	vfmadd231ps xmm4,xmm1,xmm2
   f:	c4 e2 71 b8 ea       	vfmadd231ps xmm5,xmm1,xmm2
  14:	c4 e2 71 b8 f2       	vfmadd231ps xmm6,xmm1,xmm2
  19:	c4 e2 71 b8 fa       	vfmadd231ps xmm7,xmm1,xmm2
  1e:	c4 62 71 b8 c2       	vfmadd231ps xmm8,xmm1,xmm2
  23:	c4 62 71 b8 ca       	vfmadd231ps xmm9,xmm1,xmm2
  28:	c4 62 71 b8 d2       	vfmadd231ps xmm10,xmm1,xmm2
  2d:	c4 62 71 b8 da       	vfmadd231ps xmm11,xmm1,xmm2
  32:	c4 62 71 b8 e2       	vfmadd231ps xmm12,xmm1,xmm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14];
VMOVUPD XMM6, [R14];
VMOVUPD XMM7, [R14];
VMOVUPD XMM8, [R14];
VMOVUPD XMM9, [R14];
VMOVUPD XMM10, [R14];
VMOVUPD XMM11, [R14];
VMOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.2
- Core cycles: 5.52
- Reference cycles: 2.7
- UOPS_EXECUTED.THREAD: 11.1
- RETIRE_SLOTS: 11.1
- UOPS_MITE: 0.11
- UOPS_MS: 0.0
- UOPS_PORT_0: 5.5
- UOPS_PORT_1: 5.5
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.03

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	c4 e2 79 b8 c0       	vfmadd231ps xmm0,xmm0,xmm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 4.0
- Reference cycles: 2.05
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	c4 e2 79 b8 c0       	vfmadd231ps xmm0,xmm0,xmm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 4.0
- Reference cycles: 1.99
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	c4 e2 79 b8 c0       	vfmadd231ps xmm0,xmm0,xmm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 4.0
- Reference cycles: 1.99
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.49
- UOPS_PORT_1: 0.51
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	c4 e2 79 b8 c0       	vfmadd231ps xmm0,xmm0,xmm0
   5:	c4 e2 71 b8 c9       	vfmadd231ps xmm1,xmm1,xmm1
   a:	c4 e2 69 b8 d2       	vfmadd231ps xmm2,xmm2,xmm2
   f:	c4 e2 61 b8 db       	vfmadd231ps xmm3,xmm3,xmm3

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14]

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 2.17
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.0
- UOPS_PORT_1: 2.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	c4 e2 79 b8 c0       	vfmadd231ps xmm0,xmm0,xmm0
   5:	c4 e2 71 b8 c9       	vfmadd231ps xmm1,xmm1,xmm1
   a:	c4 e2 69 b8 d2       	vfmadd231ps xmm2,xmm2,xmm2
   f:	c4 e2 61 b8 db       	vfmadd231ps xmm3,xmm3,xmm3

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14]

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.01
- Reference cycles: 2.0
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.99
- UOPS_PORT_1: 2.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	c4 e2 79 b8 c0       	vfmadd231ps xmm0,xmm0,xmm0
   5:	c4 e2 71 b8 c9       	vfmadd231ps xmm1,xmm1,xmm1
   a:	c4 e2 69 b8 d2       	vfmadd231ps xmm2,xmm2,xmm2
   f:	c4 e2 61 b8 db       	vfmadd231ps xmm3,xmm3,xmm3

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14]

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.01
- Reference cycles: 2.0
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.99
- UOPS_PORT_1: 2.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c4 e2 79 b8 c0       	vfmadd231ps xmm0,xmm0,xmm0
   5:	c4 e2 71 b8 c9       	vfmadd231ps xmm1,xmm1,xmm1
   a:	c4 e2 69 b8 d2       	vfmadd231ps xmm2,xmm2,xmm2
   f:	c4 e2 61 b8 db       	vfmadd231ps xmm3,xmm3,xmm3
  14:	c4 e2 59 b8 e4       	vfmadd231ps xmm4,xmm4,xmm4
  19:	c4 e2 51 b8 ed       	vfmadd231ps xmm5,xmm5,xmm5
  1e:	c4 e2 49 b8 f6       	vfmadd231ps xmm6,xmm6,xmm6
  23:	c4 e2 41 b8 ff       	vfmadd231ps xmm7,xmm7,xmm7

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14];
VMOVUPD XMM6, [R14];
VMOVUPD XMM7, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 4.27
- Reference cycles: 2.08
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 3.98
- UOPS_PORT_1: 4.02
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	c4 e2 79 b8 c0       	vfmadd231ps xmm0,xmm0,xmm0
   5:	c4 e2 71 b8 c9       	vfmadd231ps xmm1,xmm1,xmm1
   a:	c4 e2 69 b8 d2       	vfmadd231ps xmm2,xmm2,xmm2
   f:	c4 e2 61 b8 db       	vfmadd231ps xmm3,xmm3,xmm3
  14:	c4 e2 59 b8 e4       	vfmadd231ps xmm4,xmm4,xmm4
  19:	c4 e2 51 b8 ed       	vfmadd231ps xmm5,xmm5,xmm5
  1e:	c4 e2 49 b8 f6       	vfmadd231ps xmm6,xmm6,xmm6
  23:	c4 e2 41 b8 ff       	vfmadd231ps xmm7,xmm7,xmm7

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14];
VMOVUPD XMM6, [R14];
VMOVUPD XMM7, [R14]

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 4.36
- Reference cycles: 2.13
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.01
- UOPS_PORT_0: 3.99
- UOPS_PORT_1: 4.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	c4 e2 79 b8 c0       	vfmadd231ps xmm0,xmm0,xmm0
   5:	c4 e2 71 b8 c9       	vfmadd231ps xmm1,xmm1,xmm1
   a:	c4 e2 69 b8 d2       	vfmadd231ps xmm2,xmm2,xmm2
   f:	c4 e2 61 b8 db       	vfmadd231ps xmm3,xmm3,xmm3
  14:	c4 e2 59 b8 e4       	vfmadd231ps xmm4,xmm4,xmm4
  19:	c4 e2 51 b8 ed       	vfmadd231ps xmm5,xmm5,xmm5
  1e:	c4 e2 49 b8 f6       	vfmadd231ps xmm6,xmm6,xmm6
  23:	c4 e2 41 b8 ff       	vfmadd231ps xmm7,xmm7,xmm7

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14];
VMOVUPD XMM6, [R14];
VMOVUPD XMM7, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 4.26
- Reference cycles: 2.08
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 3.98
- UOPS_PORT_1: 4.02
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 13 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c4 e2 79 b8 c0       	vfmadd231ps xmm0,xmm0,xmm0
   5:	c4 e2 71 b8 c9       	vfmadd231ps xmm1,xmm1,xmm1
   a:	c4 e2 69 b8 d2       	vfmadd231ps xmm2,xmm2,xmm2
   f:	c4 e2 61 b8 db       	vfmadd231ps xmm3,xmm3,xmm3
  14:	c4 e2 59 b8 e4       	vfmadd231ps xmm4,xmm4,xmm4
  19:	c4 e2 51 b8 ed       	vfmadd231ps xmm5,xmm5,xmm5
  1e:	c4 e2 49 b8 f6       	vfmadd231ps xmm6,xmm6,xmm6
  23:	c4 e2 41 b8 ff       	vfmadd231ps xmm7,xmm7,xmm7
  28:	c4 42 39 b8 c0       	vfmadd231ps xmm8,xmm8,xmm8
  2d:	c4 42 31 b8 c9       	vfmadd231ps xmm9,xmm9,xmm9
  32:	c4 42 29 b8 d2       	vfmadd231ps xmm10,xmm10,xmm10
  37:	c4 42 21 b8 db       	vfmadd231ps xmm11,xmm11,xmm11
  3c:	c4 42 19 b8 e4       	vfmadd231ps xmm12,xmm12,xmm12

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14];
VMOVUPD XMM6, [R14];
VMOVUPD XMM7, [R14];
VMOVUPD XMM8, [R14];
VMOVUPD XMM9, [R14];
VMOVUPD XMM10, [R14];
VMOVUPD XMM11, [R14];
VMOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 6.49
- Reference cycles: 3.12
- UOPS_EXECUTED.THREAD: 13.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 12.96
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.5
- UOPS_PORT_1: 6.5
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 3.25

With loop_count=1000 and unroll_count=1

Code:

   0:	c4 e2 79 b8 c0       	vfmadd231ps xmm0,xmm0,xmm0
   5:	c4 e2 71 b8 c9       	vfmadd231ps xmm1,xmm1,xmm1
   a:	c4 e2 69 b8 d2       	vfmadd231ps xmm2,xmm2,xmm2
   f:	c4 e2 61 b8 db       	vfmadd231ps xmm3,xmm3,xmm3
  14:	c4 e2 59 b8 e4       	vfmadd231ps xmm4,xmm4,xmm4
  19:	c4 e2 51 b8 ed       	vfmadd231ps xmm5,xmm5,xmm5
  1e:	c4 e2 49 b8 f6       	vfmadd231ps xmm6,xmm6,xmm6
  23:	c4 e2 41 b8 ff       	vfmadd231ps xmm7,xmm7,xmm7
  28:	c4 42 39 b8 c0       	vfmadd231ps xmm8,xmm8,xmm8
  2d:	c4 42 31 b8 c9       	vfmadd231ps xmm9,xmm9,xmm9
  32:	c4 42 29 b8 d2       	vfmadd231ps xmm10,xmm10,xmm10
  37:	c4 42 21 b8 db       	vfmadd231ps xmm11,xmm11,xmm11
  3c:	c4 42 19 b8 e4       	vfmadd231ps xmm12,xmm12,xmm12

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14];
VMOVUPD XMM6, [R14];
VMOVUPD XMM7, [R14];
VMOVUPD XMM8, [R14];
VMOVUPD XMM9, [R14];
VMOVUPD XMM10, [R14];
VMOVUPD XMM11, [R14];
VMOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 6.51
- Reference cycles: 3.22
- UOPS_EXECUTED.THREAD: 14.0
- RETIRE_SLOTS: 14.0
- UOPS_MITE: 0.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.5
- UOPS_PORT_1: 6.5
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	c4 e2 79 b8 c0       	vfmadd231ps xmm0,xmm0,xmm0
   5:	c4 e2 71 b8 c9       	vfmadd231ps xmm1,xmm1,xmm1
   a:	c4 e2 69 b8 d2       	vfmadd231ps xmm2,xmm2,xmm2
   f:	c4 e2 61 b8 db       	vfmadd231ps xmm3,xmm3,xmm3
  14:	c4 e2 59 b8 e4       	vfmadd231ps xmm4,xmm4,xmm4
  19:	c4 e2 51 b8 ed       	vfmadd231ps xmm5,xmm5,xmm5
  1e:	c4 e2 49 b8 f6       	vfmadd231ps xmm6,xmm6,xmm6
  23:	c4 e2 41 b8 ff       	vfmadd231ps xmm7,xmm7,xmm7
  28:	c4 42 39 b8 c0       	vfmadd231ps xmm8,xmm8,xmm8
  2d:	c4 42 31 b8 c9       	vfmadd231ps xmm9,xmm9,xmm9
  32:	c4 42 29 b8 d2       	vfmadd231ps xmm10,xmm10,xmm10
  37:	c4 42 21 b8 db       	vfmadd231ps xmm11,xmm11,xmm11
  3c:	c4 42 19 b8 e4       	vfmadd231ps xmm12,xmm12,xmm12

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
VMOVUPD XMM1, [R14];
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14];
VMOVUPD XMM6, [R14];
VMOVUPD XMM7, [R14];
VMOVUPD XMM8, [R14];
VMOVUPD XMM9, [R14];
VMOVUPD XMM10, [R14];
VMOVUPD XMM11, [R14];
VMOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.2
- Core cycles: 6.51
- Reference cycles: 3.22
- UOPS_EXECUTED.THREAD: 13.1
- RETIRE_SLOTS: 13.1
- UOPS_MITE: 0.13
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.5
- UOPS_PORT_1: 6.5
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.04

VFMADD231PS (XMM, XMM, XMM) - Throughput and Uops

With different registers for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 11 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 13 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10