TZCNT (R16, R16) - Throughput and Uops

With different registers for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 3.0
- Reference cycles: 1.46
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 3.0
- Reference cycles: 1.5
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 3.0
- Reference cycles: 1.5
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	66 f3 45 0f bc d1    	tzcnt  r10w,r9w
   c:	66 f3 45 0f bc d9    	tzcnt  r11w,r9w
  12:	66 f3 45 0f bc e1    	tzcnt  r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 1.99
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	66 f3 45 0f bc d1    	tzcnt  r10w,r9w
   c:	66 f3 45 0f bc d9    	tzcnt  r11w,r9w
  12:	66 f3 45 0f bc e1    	tzcnt  r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.01
- Reference cycles: 2.03
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	66 f3 45 0f bc d1    	tzcnt  r10w,r9w
   c:	66 f3 45 0f bc d9    	tzcnt  r11w,r9w
  12:	66 f3 45 0f bc e1    	tzcnt  r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.0
- Reference cycles: 2.03
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	66 f3 45 0f bc d1    	tzcnt  r10w,r9w
   c:	66 f3 45 0f bc d9    	tzcnt  r11w,r9w
  12:	66 f3 45 0f bc e1    	tzcnt  r12w,r9w
  18:	66 f3 45 0f bc e9    	tzcnt  r13w,r9w
  1e:	66 f3 45 0f bc f1    	tzcnt  r14w,r9w
  24:	66 f3 41 0f bc d9    	tzcnt  bx,r9w
  2a:	66 f3 41 0f bc c9    	tzcnt  cx,r9w

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 7.99
- Reference cycles: 3.81
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	66 f3 45 0f bc d1    	tzcnt  r10w,r9w
   c:	66 f3 45 0f bc d9    	tzcnt  r11w,r9w
  12:	66 f3 45 0f bc e1    	tzcnt  r12w,r9w
  18:	66 f3 45 0f bc e9    	tzcnt  r13w,r9w
  1e:	66 f3 45 0f bc f1    	tzcnt  r14w,r9w
  24:	66 f3 41 0f bc d9    	tzcnt  bx,r9w
  2a:	66 f3 41 0f bc c9    	tzcnt  cx,r9w

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.01
- Reference cycles: 3.95
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	66 f3 45 0f bc d1    	tzcnt  r10w,r9w
   c:	66 f3 45 0f bc d9    	tzcnt  r11w,r9w
  12:	66 f3 45 0f bc e1    	tzcnt  r12w,r9w
  18:	66 f3 45 0f bc e9    	tzcnt  r13w,r9w
  1e:	66 f3 45 0f bc f1    	tzcnt  r14w,r9w
  24:	66 f3 41 0f bc d9    	tzcnt  bx,r9w
  2a:	66 f3 41 0f bc c9    	tzcnt  cx,r9w

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.01
- Reference cycles: 3.99
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.11
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 12 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	66 f3 45 0f bc d1    	tzcnt  r10w,r9w
   c:	66 f3 45 0f bc d9    	tzcnt  r11w,r9w
  12:	66 f3 45 0f bc e1    	tzcnt  r12w,r9w
  18:	66 f3 45 0f bc e9    	tzcnt  r13w,r9w
  1e:	66 f3 45 0f bc f1    	tzcnt  r14w,r9w
  24:	66 f3 41 0f bc d9    	tzcnt  bx,r9w
  2a:	66 f3 41 0f bc c9    	tzcnt  cx,r9w
  30:	66 f3 41 0f bc d1    	tzcnt  dx,r9w
  36:	66 f3 41 0f bc f9    	tzcnt  di,r9w
  3c:	66 f3 41 0f bc f1    	tzcnt  si,r9w
  42:	66 f3 41 0f bc e9    	tzcnt  bp,r9w

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 12.0
- Reference cycles: 5.72
- UOPS_EXECUTED.THREAD: 12.0
- RETIRE_SLOTS: 12.0
- UOPS_MITE: 12.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 12.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 3.0

With loop_count=1000 and unroll_count=1

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	66 f3 45 0f bc d1    	tzcnt  r10w,r9w
   c:	66 f3 45 0f bc d9    	tzcnt  r11w,r9w
  12:	66 f3 45 0f bc e1    	tzcnt  r12w,r9w
  18:	66 f3 45 0f bc e9    	tzcnt  r13w,r9w
  1e:	66 f3 45 0f bc f1    	tzcnt  r14w,r9w
  24:	66 f3 41 0f bc d9    	tzcnt  bx,r9w
  2a:	66 f3 41 0f bc c9    	tzcnt  cx,r9w
  30:	66 f3 41 0f bc d1    	tzcnt  dx,r9w
  36:	66 f3 41 0f bc f9    	tzcnt  di,r9w
  3c:	66 f3 41 0f bc f1    	tzcnt  si,r9w
  42:	66 f3 41 0f bc e9    	tzcnt  bp,r9w

Show nanoBench command
Results:
- Instructions retired: 14.0
- Core cycles: 12.01
- Reference cycles: 5.96
- UOPS_EXECUTED.THREAD: 13.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 0.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 12.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	66 f3 45 0f bc d1    	tzcnt  r10w,r9w
   c:	66 f3 45 0f bc d9    	tzcnt  r11w,r9w
  12:	66 f3 45 0f bc e1    	tzcnt  r12w,r9w
  18:	66 f3 45 0f bc e9    	tzcnt  r13w,r9w
  1e:	66 f3 45 0f bc f1    	tzcnt  r14w,r9w
  24:	66 f3 41 0f bc d9    	tzcnt  bx,r9w
  2a:	66 f3 41 0f bc c9    	tzcnt  cx,r9w
  30:	66 f3 41 0f bc d1    	tzcnt  dx,r9w
  36:	66 f3 41 0f bc f9    	tzcnt  di,r9w
  3c:	66 f3 41 0f bc f1    	tzcnt  si,r9w
  42:	66 f3 41 0f bc e9    	tzcnt  bp,r9w

Show nanoBench command
Results:
- Instructions retired: 12.2
- Core cycles: 12.01
- Reference cycles: 6.01
- UOPS_EXECUTED.THREAD: 12.1
- RETIRE_SLOTS: 12.1
- UOPS_MITE: 0.12
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 12.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.03

With the same register for for different operands

With unroll_count=500 and no inner loop

Code:

   0:	66 f3 45 0f bc c0    	tzcnt  r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 3.0
- Reference cycles: 1.46
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	66 f3 45 0f bc c0    	tzcnt  r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 3.0
- Reference cycles: 1.51
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	66 f3 45 0f bc c0    	tzcnt  r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 3.0
- Reference cycles: 1.5
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

Tests for macro-fusion

With JB (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 82 00 00 00 00    	jb     0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.07
- Reference cycles: 1.04
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.04
- UOPS_MITE: 0.15
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.05

With JB (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	72 00                	jb     0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 1.21
- UOPS_EXECUTED.THREAD: 2.01
- RETIRE_SLOTS: 2.03
- UOPS_MITE: 0.7
- UOPS_MS: 0.02
- UOPS_PORT_0: -0.01
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.03
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.34

With JBE (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 86 00 00 00 00    	jbe    0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.12
- Reference cycles: 1.39
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.04
- UOPS_MITE: 0.16
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.05

With JBE (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	76 00                	jbe    0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 1.04
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.16
- UOPS_MITE: 0.69
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.02
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.36

With JL (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 8c 00 00 00 00    	jl     0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 1.04
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.55

With JL (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	7c 00                	jl     0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 1.04
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JLE (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 8e 00 00 00 00    	jle    0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.07
- Reference cycles: 2.08
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.55

With JLE (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	7e 00                	jle    0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 2.08
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JNB (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 83 00 00 00 00    	jae    0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 1.21
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.55

With JNB (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	73 00                	jae    0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 1.04
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JNBE (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 87 00 00 00 00    	ja     0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 1.04
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.99
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.54

With JNBE (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	77 00                	ja     0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 1.04
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JNL (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 8d 00 00 00 00    	jge    0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 2.08
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.04
- UOPS_MITE: 0.1
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.06

With JNL (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	7d 00                	jge    0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 1.21
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.16
- UOPS_MITE: 0.83
- UOPS_MS: 0.02
- UOPS_PORT_0: -0.01
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.03
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.37

With JNLE (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 8f 00 00 00 00    	jg     0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.09
- Reference cycles: 1.04
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.04
- UOPS_MITE: 0.21
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.08

With JNLE (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	7f 00                	jg     0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 1.39
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.16
- UOPS_MITE: 0.74
- UOPS_MS: 0.0
- UOPS_PORT_0: -0.01
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.03
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.35

With JNO (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 81 00 00 00 00    	jno    0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 1.04
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.04
- UOPS_MITE: 0.27
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.05

With JNO (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	71 00                	jno    0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 2.25
- UOPS_EXECUTED.THREAD: 2.02
- RETIRE_SLOTS: 2.08
- UOPS_MITE: 0.78
- UOPS_MS: 0.02
- UOPS_PORT_0: -0.01
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.03
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.35

With JNP (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 8b 00 00 00 00    	jnp    0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 1.04
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.04
- UOPS_MITE: 0.24
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.06

With JNP (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	7b 00                	jnp    0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.09
- Reference cycles: 2.08
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.16
- UOPS_MITE: 0.74
- UOPS_MS: 0.02
- UOPS_PORT_0: -0.01
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.03
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.3

With JNS (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 89 00 00 00 00    	jns    0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 1.21
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.04
- UOPS_MITE: 0.11
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.11

With JNS (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	79 00                	jns    0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 1.91
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.16
- UOPS_MITE: 0.8
- UOPS_MS: 0.02
- UOPS_PORT_0: -0.01
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.03
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.37

With JNZ (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 85 00 00 00 00    	jne    0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.1
- Reference cycles: 1.04
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.04
- UOPS_MITE: 0.18
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.08

With JNZ (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	75 00                	jne    0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.11
- Reference cycles: 2.43
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.16
- UOPS_MITE: 0.74
- UOPS_MS: 0.0
- UOPS_PORT_0: -0.01
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.03
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.33

With JO (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 80 00 00 00 00    	jo     0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 1.04
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.55

With JO (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	70 00                	jo     0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 1.04
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JP (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 8a 00 00 00 00    	jp     0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 1.04
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.55

With JP (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	7a 00                	jp     0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 2.25
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JS (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 88 00 00 00 00    	js     0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 2.08
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.55

With JS (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	78 00                	js     0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 1.91
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JZ (Rel32)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	0f 84 00 00 00 00    	je     0xc

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 1.21
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.55

With JZ (Rel8)

Code:

   0:	66 f3 45 0f bc c1    	tzcnt  r8w,r9w
   6:	74 00                	je     0x8

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.08
- Reference cycles: 1.73
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5