RDMSR - Throughput and Uops

With unroll_count=500 and no inner loop

Code:
```
   0:	0f 32                	rdmsr  
```
Init:
```
MOV RCX, 0xE7
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 80.0
- Reference cycles: 66.65
- UOPS_RETIRED.ANY: 72.0
- RETIRE_SLOTS: 72.0
- UOPS_MS: 240.0
- UOPS_PORT_0: 21.0
- UOPS_PORT_1: 21.0
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 1.0

With loop_count=1000 and unroll_count=10

Code:
```
   0:	0f 32                	rdmsr  
```
Init:
```
MOV RCX, 0xE7
```
Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 80.1
- Reference cycles: 66.75
- UOPS_RETIRED.ANY: 72.2
- RETIRE_SLOTS: 72.2
- UOPS_MS: 240.0
- UOPS_PORT_0: 20.8
- UOPS_PORT_1: 21.2
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: -0.03
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 1.0

With loop_count=100 and unroll_count=100

Code:
```
   0:	0f 32                	rdmsr  
```
Init:
```
MOV RCX, 0xE7
```
Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 80.01
- Reference cycles: 66.68
- UOPS_RETIRED.ANY: 72.02
- RETIRE_SLOTS: 72.02
- UOPS_MS: 240.0
- UOPS_PORT_0: 20.98
- UOPS_PORT_1: 21.02
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: -0.03
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 1.0