RCPSS (XMM, XMM)

With unroll_count=500 and no inner loop

Code:

   0:	f3 0f 53 c1          	rcpss  xmm0,xmm1

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 3.0
- Reference cycles: 2.51
- UOPS_RETIRED.ANY: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 3.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=1000 and unroll_count=10

Code:

   0:	f3 0f 53 c1          	rcpss  xmm0,xmm1

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 3.0
- Reference cycles: 2.5
- UOPS_RETIRED.ANY: 1.2
- RETIRE_SLOTS: 1.2
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	f3 0f 53 c1          	rcpss  xmm0,xmm1

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 3.0
- Reference cycles: 2.5
- UOPS_RETIRED.ANY: 1.02
- RETIRE_SLOTS: 1.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	f3 0f 53 c1          	rcpss  xmm0,xmm1
   4:	f3 0f 53 d1          	rcpss  xmm2,xmm1
   8:	f3 0f 53 d9          	rcpss  xmm3,xmm1
   c:	f3 0f 53 e1          	rcpss  xmm4,xmm1

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 8.0
- Reference cycles: 6.65
- UOPS_RETIRED.ANY: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=1000 and unroll_count=2

Code:

   0:	f3 0f 53 c1          	rcpss  xmm0,xmm1
   4:	f3 0f 53 d1          	rcpss  xmm2,xmm1
   8:	f3 0f 53 d9          	rcpss  xmm3,xmm1
   c:	f3 0f 53 e1          	rcpss  xmm4,xmm1

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 8.0
- Reference cycles: 6.67
- UOPS_RETIRED.ANY: 5.0
- RETIRE_SLOTS: 5.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	f3 0f 53 c1          	rcpss  xmm0,xmm1
   4:	f3 0f 53 d1          	rcpss  xmm2,xmm1
   8:	f3 0f 53 d9          	rcpss  xmm3,xmm1
   c:	f3 0f 53 e1          	rcpss  xmm4,xmm1

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 8.0
- Reference cycles: 6.67
- UOPS_RETIRED.ANY: 4.1
- RETIRE_SLOTS: 4.1
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f3 0f 53 c1          	rcpss  xmm0,xmm1
   4:	f3 0f 53 d1          	rcpss  xmm2,xmm1
   8:	f3 0f 53 d9          	rcpss  xmm3,xmm1
   c:	f3 0f 53 e1          	rcpss  xmm4,xmm1
  10:	f3 0f 53 e9          	rcpss  xmm5,xmm1
  14:	f3 0f 53 f1          	rcpss  xmm6,xmm1
  18:	f3 0f 53 f9          	rcpss  xmm7,xmm1
  1c:	f3 44 0f 53 c1       	rcpss  xmm8,xmm1

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 16.0
- Reference cycles: 13.23
- UOPS_RETIRED.ANY: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	f3 0f 53 c1          	rcpss  xmm0,xmm1
   4:	f3 0f 53 d1          	rcpss  xmm2,xmm1
   8:	f3 0f 53 d9          	rcpss  xmm3,xmm1
   c:	f3 0f 53 e1          	rcpss  xmm4,xmm1
  10:	f3 0f 53 e9          	rcpss  xmm5,xmm1
  14:	f3 0f 53 f1          	rcpss  xmm6,xmm1
  18:	f3 0f 53 f9          	rcpss  xmm7,xmm1
  1c:	f3 44 0f 53 c1       	rcpss  xmm8,xmm1

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14]

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 16.0
- Reference cycles: 13.34
- UOPS_RETIRED.ANY: 10.0
- RETIRE_SLOTS: 10.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f3 0f 53 c1          	rcpss  xmm0,xmm1
   4:	f3 0f 53 d1          	rcpss  xmm2,xmm1
   8:	f3 0f 53 d9          	rcpss  xmm3,xmm1
   c:	f3 0f 53 e1          	rcpss  xmm4,xmm1
  10:	f3 0f 53 e9          	rcpss  xmm5,xmm1
  14:	f3 0f 53 f1          	rcpss  xmm6,xmm1
  18:	f3 0f 53 f9          	rcpss  xmm7,xmm1
  1c:	f3 44 0f 53 c1       	rcpss  xmm8,xmm1

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 16.0
- Reference cycles: 13.34
- UOPS_RETIRED.ANY: 8.2
- RETIRE_SLOTS: 8.2
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With 12 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f3 0f 53 c1          	rcpss  xmm0,xmm1
   4:	f3 0f 53 d1          	rcpss  xmm2,xmm1
   8:	f3 0f 53 d9          	rcpss  xmm3,xmm1
   c:	f3 0f 53 e1          	rcpss  xmm4,xmm1
  10:	f3 0f 53 e9          	rcpss  xmm5,xmm1
  14:	f3 0f 53 f1          	rcpss  xmm6,xmm1
  18:	f3 0f 53 f9          	rcpss  xmm7,xmm1
  1c:	f3 44 0f 53 c1       	rcpss  xmm8,xmm1
  21:	f3 44 0f 53 c9       	rcpss  xmm9,xmm1
  26:	f3 44 0f 53 d1       	rcpss  xmm10,xmm1
  2b:	f3 44 0f 53 d9       	rcpss  xmm11,xmm1
  30:	f3 44 0f 53 e1       	rcpss  xmm12,xmm1

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 24.0
- Reference cycles: 20.0
- UOPS_RETIRED.ANY: 12.0
- RETIRE_SLOTS: 12.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 12.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	f3 0f 53 c1          	rcpss  xmm0,xmm1
   4:	f3 0f 53 d1          	rcpss  xmm2,xmm1
   8:	f3 0f 53 d9          	rcpss  xmm3,xmm1
   c:	f3 0f 53 e1          	rcpss  xmm4,xmm1
  10:	f3 0f 53 e9          	rcpss  xmm5,xmm1
  14:	f3 0f 53 f1          	rcpss  xmm6,xmm1
  18:	f3 0f 53 f9          	rcpss  xmm7,xmm1
  1c:	f3 44 0f 53 c1       	rcpss  xmm8,xmm1
  21:	f3 44 0f 53 c9       	rcpss  xmm9,xmm1
  26:	f3 44 0f 53 d1       	rcpss  xmm10,xmm1
  2b:	f3 44 0f 53 d9       	rcpss  xmm11,xmm1
  30:	f3 44 0f 53 e1       	rcpss  xmm12,xmm1

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 14.0
- Core cycles: 24.0
- Reference cycles: 20.0
- UOPS_RETIRED.ANY: 14.0
- RETIRE_SLOTS: 14.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 12.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f3 0f 53 c1          	rcpss  xmm0,xmm1
   4:	f3 0f 53 d1          	rcpss  xmm2,xmm1
   8:	f3 0f 53 d9          	rcpss  xmm3,xmm1
   c:	f3 0f 53 e1          	rcpss  xmm4,xmm1
  10:	f3 0f 53 e9          	rcpss  xmm5,xmm1
  14:	f3 0f 53 f1          	rcpss  xmm6,xmm1
  18:	f3 0f 53 f9          	rcpss  xmm7,xmm1
  1c:	f3 44 0f 53 c1       	rcpss  xmm8,xmm1
  21:	f3 44 0f 53 c9       	rcpss  xmm9,xmm1
  26:	f3 44 0f 53 d1       	rcpss  xmm10,xmm1
  2b:	f3 44 0f 53 d9       	rcpss  xmm11,xmm1
  30:	f3 44 0f 53 e1       	rcpss  xmm12,xmm1

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.2
- Core cycles: 24.0
- Reference cycles: 20.0
- UOPS_RETIRED.ANY: 12.2
- RETIRE_SLOTS: 12.2
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 12.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	f3 0f 53 c0          	rcpss  xmm0,xmm0

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 3.0
- Reference cycles: 2.51
- UOPS_RETIRED.ANY: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=1000 and unroll_count=10

Code:

   0:	f3 0f 53 c0          	rcpss  xmm0,xmm0

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 3.0
- Reference cycles: 2.5
- UOPS_RETIRED.ANY: 1.2
- RETIRE_SLOTS: 1.2
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	f3 0f 53 c0          	rcpss  xmm0,xmm0

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 3.0
- Reference cycles: 2.5
- UOPS_RETIRED.ANY: 1.02
- RETIRE_SLOTS: 1.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	f3 0f 53 c0          	rcpss  xmm0,xmm0
   4:	f3 0f 53 c9          	rcpss  xmm1,xmm1
   8:	f3 0f 53 d2          	rcpss  xmm2,xmm2
   c:	f3 0f 53 db          	rcpss  xmm3,xmm3

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14]

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 8.0
- Reference cycles: 6.65
- UOPS_RETIRED.ANY: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=1000 and unroll_count=2

Code:

   0:	f3 0f 53 c0          	rcpss  xmm0,xmm0
   4:	f3 0f 53 c9          	rcpss  xmm1,xmm1
   8:	f3 0f 53 d2          	rcpss  xmm2,xmm2
   c:	f3 0f 53 db          	rcpss  xmm3,xmm3

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14]

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 8.0
- Reference cycles: 6.67
- UOPS_RETIRED.ANY: 5.0
- RETIRE_SLOTS: 5.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	f3 0f 53 c0          	rcpss  xmm0,xmm0
   4:	f3 0f 53 c9          	rcpss  xmm1,xmm1
   8:	f3 0f 53 d2          	rcpss  xmm2,xmm2
   c:	f3 0f 53 db          	rcpss  xmm3,xmm3

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14]

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 8.0
- Reference cycles: 6.67
- UOPS_RETIRED.ANY: 4.1
- RETIRE_SLOTS: 4.1
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f3 0f 53 c0          	rcpss  xmm0,xmm0
   4:	f3 0f 53 c9          	rcpss  xmm1,xmm1
   8:	f3 0f 53 d2          	rcpss  xmm2,xmm2
   c:	f3 0f 53 db          	rcpss  xmm3,xmm3
  10:	f3 0f 53 e4          	rcpss  xmm4,xmm4
  14:	f3 0f 53 ed          	rcpss  xmm5,xmm5
  18:	f3 0f 53 f6          	rcpss  xmm6,xmm6
  1c:	f3 0f 53 ff          	rcpss  xmm7,xmm7

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 16.0
- Reference cycles: 13.3
- UOPS_RETIRED.ANY: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	f3 0f 53 c0          	rcpss  xmm0,xmm0
   4:	f3 0f 53 c9          	rcpss  xmm1,xmm1
   8:	f3 0f 53 d2          	rcpss  xmm2,xmm2
   c:	f3 0f 53 db          	rcpss  xmm3,xmm3
  10:	f3 0f 53 e4          	rcpss  xmm4,xmm4
  14:	f3 0f 53 ed          	rcpss  xmm5,xmm5
  18:	f3 0f 53 f6          	rcpss  xmm6,xmm6
  1c:	f3 0f 53 ff          	rcpss  xmm7,xmm7

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14]

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 16.0
- Reference cycles: 13.33
- UOPS_RETIRED.ANY: 10.0
- RETIRE_SLOTS: 10.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f3 0f 53 c0          	rcpss  xmm0,xmm0
   4:	f3 0f 53 c9          	rcpss  xmm1,xmm1
   8:	f3 0f 53 d2          	rcpss  xmm2,xmm2
   c:	f3 0f 53 db          	rcpss  xmm3,xmm3
  10:	f3 0f 53 e4          	rcpss  xmm4,xmm4
  14:	f3 0f 53 ed          	rcpss  xmm5,xmm5
  18:	f3 0f 53 f6          	rcpss  xmm6,xmm6
  1c:	f3 0f 53 ff          	rcpss  xmm7,xmm7

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 16.0
- Reference cycles: 13.33
- UOPS_RETIRED.ANY: 8.2
- RETIRE_SLOTS: 8.2
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With 13 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f3 0f 53 c0          	rcpss  xmm0,xmm0
   4:	f3 0f 53 c9          	rcpss  xmm1,xmm1
   8:	f3 0f 53 d2          	rcpss  xmm2,xmm2
   c:	f3 0f 53 db          	rcpss  xmm3,xmm3
  10:	f3 0f 53 e4          	rcpss  xmm4,xmm4
  14:	f3 0f 53 ed          	rcpss  xmm5,xmm5
  18:	f3 0f 53 f6          	rcpss  xmm6,xmm6
  1c:	f3 0f 53 ff          	rcpss  xmm7,xmm7
  20:	f3 45 0f 53 c0       	rcpss  xmm8,xmm8
  25:	f3 45 0f 53 c9       	rcpss  xmm9,xmm9
  2a:	f3 45 0f 53 d2       	rcpss  xmm10,xmm10
  2f:	f3 45 0f 53 db       	rcpss  xmm11,xmm11
  34:	f3 45 0f 53 e4       	rcpss  xmm12,xmm12

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 26.0
- Reference cycles: 21.77
- UOPS_RETIRED.ANY: 13.0
- RETIRE_SLOTS: 13.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 13.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	f3 0f 53 c0          	rcpss  xmm0,xmm0
   4:	f3 0f 53 c9          	rcpss  xmm1,xmm1
   8:	f3 0f 53 d2          	rcpss  xmm2,xmm2
   c:	f3 0f 53 db          	rcpss  xmm3,xmm3
  10:	f3 0f 53 e4          	rcpss  xmm4,xmm4
  14:	f3 0f 53 ed          	rcpss  xmm5,xmm5
  18:	f3 0f 53 f6          	rcpss  xmm6,xmm6
  1c:	f3 0f 53 ff          	rcpss  xmm7,xmm7
  20:	f3 45 0f 53 c0       	rcpss  xmm8,xmm8
  25:	f3 45 0f 53 c9       	rcpss  xmm9,xmm9
  2a:	f3 45 0f 53 d2       	rcpss  xmm10,xmm10
  2f:	f3 45 0f 53 db       	rcpss  xmm11,xmm11
  34:	f3 45 0f 53 e4       	rcpss  xmm12,xmm12

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 26.0
- Reference cycles: 21.66
- UOPS_RETIRED.ANY: 15.0
- RETIRE_SLOTS: 15.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 13.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f3 0f 53 c0          	rcpss  xmm0,xmm0
   4:	f3 0f 53 c9          	rcpss  xmm1,xmm1
   8:	f3 0f 53 d2          	rcpss  xmm2,xmm2
   c:	f3 0f 53 db          	rcpss  xmm3,xmm3
  10:	f3 0f 53 e4          	rcpss  xmm4,xmm4
  14:	f3 0f 53 ed          	rcpss  xmm5,xmm5
  18:	f3 0f 53 f6          	rcpss  xmm6,xmm6
  1c:	f3 0f 53 ff          	rcpss  xmm7,xmm7
  20:	f3 45 0f 53 c0       	rcpss  xmm8,xmm8
  25:	f3 45 0f 53 c9       	rcpss  xmm9,xmm9
  2a:	f3 45 0f 53 d2       	rcpss  xmm10,xmm10
  2f:	f3 45 0f 53 db       	rcpss  xmm11,xmm11
  34:	f3 45 0f 53 e4       	rcpss  xmm12,xmm12

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.2
- Core cycles: 26.0
- Reference cycles: 21.67
- UOPS_RETIRED.ANY: 13.2
- RETIRE_SLOTS: 13.2
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 13.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- INST_DECODED.DEC0: 0.0

RCPSS (XMM, XMM) - Throughput and Uops

With different registers for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 12 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 13 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10