VMOVDQA (YMM, M256)

With unroll_count=500 and no inner loop

Code:

   0:	c4 c1 7d 6f 06       	vmovdqa ymm0,YMMWORD PTR [r14]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 0.5
- Reference cycles: 0.5
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	c4 c1 7d 6f 06       	vmovdqa ymm0,YMMWORD PTR [r14]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 0.5
- Reference cycles: 0.44
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	c4 c1 7d 6f 06       	vmovdqa ymm0,YMMWORD PTR [r14]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 0.5
- Reference cycles: 0.43
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	c4 c1 7d 6f 06       	vmovdqa ymm0,YMMWORD PTR [r14]
   5:	c4 c1 7d 6f 4e 20    	vmovdqa ymm1,YMMWORD PTR [r14+0x20]
   b:	c4 c1 7d 6f 56 40    	vmovdqa ymm2,YMMWORD PTR [r14+0x40]
  11:	c4 c1 7d 6f 5e 60    	vmovdqa ymm3,YMMWORD PTR [r14+0x60]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 2.0
- Reference cycles: 1.63
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	c4 c1 7d 6f 06       	vmovdqa ymm0,YMMWORD PTR [r14]
   5:	c4 c1 7d 6f 4e 20    	vmovdqa ymm1,YMMWORD PTR [r14+0x20]
   b:	c4 c1 7d 6f 56 40    	vmovdqa ymm2,YMMWORD PTR [r14+0x40]
  11:	c4 c1 7d 6f 5e 60    	vmovdqa ymm3,YMMWORD PTR [r14+0x60]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 2.01
- Reference cycles: 1.69
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	c4 c1 7d 6f 06       	vmovdqa ymm0,YMMWORD PTR [r14]
   5:	c4 c1 7d 6f 4e 20    	vmovdqa ymm1,YMMWORD PTR [r14+0x20]
   b:	c4 c1 7d 6f 56 40    	vmovdqa ymm2,YMMWORD PTR [r14+0x40]
  11:	c4 c1 7d 6f 5e 60    	vmovdqa ymm3,YMMWORD PTR [r14+0x60]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 2.01
- Reference cycles: 1.76
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c4 c1 7d 6f 06       	vmovdqa ymm0,YMMWORD PTR [r14]
   5:	c4 c1 7d 6f 4e 20    	vmovdqa ymm1,YMMWORD PTR [r14+0x20]
   b:	c4 c1 7d 6f 56 40    	vmovdqa ymm2,YMMWORD PTR [r14+0x40]
  11:	c4 c1 7d 6f 5e 60    	vmovdqa ymm3,YMMWORD PTR [r14+0x60]
  17:	c4 c1 7d 6f a6 80 00 	vmovdqa ymm4,YMMWORD PTR [r14+0x80]
  1e:	00 00 
  20:	c4 c1 7d 6f ae a0 00 	vmovdqa ymm5,YMMWORD PTR [r14+0xa0]
  27:	00 00 
  29:	c4 c1 7d 6f b6 c0 00 	vmovdqa ymm6,YMMWORD PTR [r14+0xc0]
  30:	00 00 
  32:	c4 c1 7d 6f be e0 00 	vmovdqa ymm7,YMMWORD PTR [r14+0xe0]
  39:	00 00

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 4.0
- Reference cycles: 3.25
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	c4 c1 7d 6f 06       	vmovdqa ymm0,YMMWORD PTR [r14]
   5:	c4 c1 7d 6f 4e 20    	vmovdqa ymm1,YMMWORD PTR [r14+0x20]
   b:	c4 c1 7d 6f 56 40    	vmovdqa ymm2,YMMWORD PTR [r14+0x40]
  11:	c4 c1 7d 6f 5e 60    	vmovdqa ymm3,YMMWORD PTR [r14+0x60]
  17:	c4 c1 7d 6f a6 80 00 	vmovdqa ymm4,YMMWORD PTR [r14+0x80]
  1e:	00 00 
  20:	c4 c1 7d 6f ae a0 00 	vmovdqa ymm5,YMMWORD PTR [r14+0xa0]
  27:	00 00 
  29:	c4 c1 7d 6f b6 c0 00 	vmovdqa ymm6,YMMWORD PTR [r14+0xc0]
  30:	00 00 
  32:	c4 c1 7d 6f be e0 00 	vmovdqa ymm7,YMMWORD PTR [r14+0xe0]
  39:	00 00

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 5.01
- Reference cycles: 4.33
- UOPS_EXECUTED.THREAD: 9.01
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 9.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 4.99

With loop_count=100 and unroll_count=10

Code:

   0:	c4 c1 7d 6f 06       	vmovdqa ymm0,YMMWORD PTR [r14]
   5:	c4 c1 7d 6f 4e 20    	vmovdqa ymm1,YMMWORD PTR [r14+0x20]
   b:	c4 c1 7d 6f 56 40    	vmovdqa ymm2,YMMWORD PTR [r14+0x40]
  11:	c4 c1 7d 6f 5e 60    	vmovdqa ymm3,YMMWORD PTR [r14+0x60]
  17:	c4 c1 7d 6f a6 80 00 	vmovdqa ymm4,YMMWORD PTR [r14+0x80]
  1e:	00 00 
  20:	c4 c1 7d 6f ae a0 00 	vmovdqa ymm5,YMMWORD PTR [r14+0xa0]
  27:	00 00 
  29:	c4 c1 7d 6f b6 c0 00 	vmovdqa ymm6,YMMWORD PTR [r14+0xc0]
  30:	00 00 
  32:	c4 c1 7d 6f be e0 00 	vmovdqa ymm7,YMMWORD PTR [r14+0xe0]
  39:	00 00

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 4.02
- Reference cycles: 3.4
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 13 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c4 c1 7d 6f 06       	vmovdqa ymm0,YMMWORD PTR [r14]
   5:	c4 c1 7d 6f 4e 20    	vmovdqa ymm1,YMMWORD PTR [r14+0x20]
   b:	c4 c1 7d 6f 56 40    	vmovdqa ymm2,YMMWORD PTR [r14+0x40]
  11:	c4 c1 7d 6f 5e 60    	vmovdqa ymm3,YMMWORD PTR [r14+0x60]
  17:	c4 c1 7d 6f a6 80 00 	vmovdqa ymm4,YMMWORD PTR [r14+0x80]
  1e:	00 00 
  20:	c4 c1 7d 6f ae a0 00 	vmovdqa ymm5,YMMWORD PTR [r14+0xa0]
  27:	00 00 
  29:	c4 c1 7d 6f b6 c0 00 	vmovdqa ymm6,YMMWORD PTR [r14+0xc0]
  30:	00 00 
  32:	c4 c1 7d 6f be e0 00 	vmovdqa ymm7,YMMWORD PTR [r14+0xe0]
  39:	00 00 
  3b:	c4 41 7d 6f 86 00 01 	vmovdqa ymm8,YMMWORD PTR [r14+0x100]
  42:	00 00 
  44:	c4 41 7d 6f 8e 20 01 	vmovdqa ymm9,YMMWORD PTR [r14+0x120]
  4b:	00 00 
  4d:	c4 41 7d 6f 96 40 01 	vmovdqa ymm10,YMMWORD PTR [r14+0x140]
  54:	00 00 
  56:	c4 41 7d 6f 9e 60 01 	vmovdqa ymm11,YMMWORD PTR [r14+0x160]
  5d:	00 00 
  5f:	c4 41 7d 6f a6 80 01 	vmovdqa ymm12,YMMWORD PTR [r14+0x180]
  66:	00 00

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 6.5
- Reference cycles: 6.0
- UOPS_EXECUTED.THREAD: 13.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 13.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 6.5
- UOPS_PORT_3: 6.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 6.5

With loop_count=1000 and unroll_count=1

Code:

   0:	c4 c1 7d 6f 06       	vmovdqa ymm0,YMMWORD PTR [r14]
   5:	c4 c1 7d 6f 4e 20    	vmovdqa ymm1,YMMWORD PTR [r14+0x20]
   b:	c4 c1 7d 6f 56 40    	vmovdqa ymm2,YMMWORD PTR [r14+0x40]
  11:	c4 c1 7d 6f 5e 60    	vmovdqa ymm3,YMMWORD PTR [r14+0x60]
  17:	c4 c1 7d 6f a6 80 00 	vmovdqa ymm4,YMMWORD PTR [r14+0x80]
  1e:	00 00 
  20:	c4 c1 7d 6f ae a0 00 	vmovdqa ymm5,YMMWORD PTR [r14+0xa0]
  27:	00 00 
  29:	c4 c1 7d 6f b6 c0 00 	vmovdqa ymm6,YMMWORD PTR [r14+0xc0]
  30:	00 00 
  32:	c4 c1 7d 6f be e0 00 	vmovdqa ymm7,YMMWORD PTR [r14+0xe0]
  39:	00 00 
  3b:	c4 41 7d 6f 86 00 01 	vmovdqa ymm8,YMMWORD PTR [r14+0x100]
  42:	00 00 
  44:	c4 41 7d 6f 8e 20 01 	vmovdqa ymm9,YMMWORD PTR [r14+0x120]
  4b:	00 00 
  4d:	c4 41 7d 6f 96 40 01 	vmovdqa ymm10,YMMWORD PTR [r14+0x140]
  54:	00 00 
  56:	c4 41 7d 6f 9e 60 01 	vmovdqa ymm11,YMMWORD PTR [r14+0x160]
  5d:	00 00 
  5f:	c4 41 7d 6f a6 80 01 	vmovdqa ymm12,YMMWORD PTR [r14+0x180]
  66:	00 00

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 6.52
- Reference cycles: 5.63
- UOPS_EXECUTED.THREAD: 14.0
- RETIRE_SLOTS: 14.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 6.5
- UOPS_PORT_3: 6.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	c4 c1 7d 6f 06       	vmovdqa ymm0,YMMWORD PTR [r14]
   5:	c4 c1 7d 6f 4e 20    	vmovdqa ymm1,YMMWORD PTR [r14+0x20]
   b:	c4 c1 7d 6f 56 40    	vmovdqa ymm2,YMMWORD PTR [r14+0x40]
  11:	c4 c1 7d 6f 5e 60    	vmovdqa ymm3,YMMWORD PTR [r14+0x60]
  17:	c4 c1 7d 6f a6 80 00 	vmovdqa ymm4,YMMWORD PTR [r14+0x80]
  1e:	00 00 
  20:	c4 c1 7d 6f ae a0 00 	vmovdqa ymm5,YMMWORD PTR [r14+0xa0]
  27:	00 00 
  29:	c4 c1 7d 6f b6 c0 00 	vmovdqa ymm6,YMMWORD PTR [r14+0xc0]
  30:	00 00 
  32:	c4 c1 7d 6f be e0 00 	vmovdqa ymm7,YMMWORD PTR [r14+0xe0]
  39:	00 00 
  3b:	c4 41 7d 6f 86 00 01 	vmovdqa ymm8,YMMWORD PTR [r14+0x100]
  42:	00 00 
  44:	c4 41 7d 6f 8e 20 01 	vmovdqa ymm9,YMMWORD PTR [r14+0x120]
  4b:	00 00 
  4d:	c4 41 7d 6f 96 40 01 	vmovdqa ymm10,YMMWORD PTR [r14+0x140]
  54:	00 00 
  56:	c4 41 7d 6f 9e 60 01 	vmovdqa ymm11,YMMWORD PTR [r14+0x160]
  5d:	00 00 
  5f:	c4 41 7d 6f a6 80 01 	vmovdqa ymm12,YMMWORD PTR [r14+0x180]
  66:	00 00

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 13.2
- Core cycles: 6.52
- Reference cycles: 5.48
- UOPS_EXECUTED.THREAD: 13.1
- RETIRE_SLOTS: 13.1
- UOPS_MITE: 0.13
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 6.5
- UOPS_PORT_3: 6.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.05

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	c4 81 7d 6f 04 2e    	vmovdqa ymm0,YMMWORD PTR [r14+r13*1]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 0.5
- Reference cycles: 0.45
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	c4 81 7d 6f 04 2e    	vmovdqa ymm0,YMMWORD PTR [r14+r13*1]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 0.5
- Reference cycles: 0.44
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 1.1
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With loop_count=100 and unroll_count=100

Code:

   0:	c4 81 7d 6f 04 2e    	vmovdqa ymm0,YMMWORD PTR [r14+r13*1]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 0.5
- Reference cycles: 0.43
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.06
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	c4 81 7d 6f 04 2e    	vmovdqa ymm0,YMMWORD PTR [r14+r13*1]
   6:	c4 81 7d 6f 4c 2e 20 	vmovdqa ymm1,YMMWORD PTR [r14+r13*1+0x20]
   d:	c4 81 7d 6f 54 2e 40 	vmovdqa ymm2,YMMWORD PTR [r14+r13*1+0x40]
  14:	c4 81 7d 6f 5c 2e 60 	vmovdqa ymm3,YMMWORD PTR [r14+r13*1+0x60]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 2.0
- Reference cycles: 1.63
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	c4 81 7d 6f 04 2e    	vmovdqa ymm0,YMMWORD PTR [r14+r13*1]
   6:	c4 81 7d 6f 4c 2e 20 	vmovdqa ymm1,YMMWORD PTR [r14+r13*1+0x20]
   d:	c4 81 7d 6f 54 2e 40 	vmovdqa ymm2,YMMWORD PTR [r14+r13*1+0x40]
  14:	c4 81 7d 6f 5c 2e 60 	vmovdqa ymm3,YMMWORD PTR [r14+r13*1+0x60]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 2.01
- Reference cycles: 1.74
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	c4 81 7d 6f 04 2e    	vmovdqa ymm0,YMMWORD PTR [r14+r13*1]
   6:	c4 81 7d 6f 4c 2e 20 	vmovdqa ymm1,YMMWORD PTR [r14+r13*1+0x20]
   d:	c4 81 7d 6f 54 2e 40 	vmovdqa ymm2,YMMWORD PTR [r14+r13*1+0x40]
  14:	c4 81 7d 6f 5c 2e 60 	vmovdqa ymm3,YMMWORD PTR [r14+r13*1+0x60]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 2.01
- Reference cycles: 1.68
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.29
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.11

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c4 81 7d 6f 04 2e    	vmovdqa ymm0,YMMWORD PTR [r14+r13*1]
   6:	c4 81 7d 6f 4c 2e 20 	vmovdqa ymm1,YMMWORD PTR [r14+r13*1+0x20]
   d:	c4 81 7d 6f 54 2e 40 	vmovdqa ymm2,YMMWORD PTR [r14+r13*1+0x40]
  14:	c4 81 7d 6f 5c 2e 60 	vmovdqa ymm3,YMMWORD PTR [r14+r13*1+0x60]
  1b:	c4 81 7d 6f a4 2e 80 	vmovdqa ymm4,YMMWORD PTR [r14+r13*1+0x80]
  22:	00 00 00 
  25:	c4 81 7d 6f ac 2e a0 	vmovdqa ymm5,YMMWORD PTR [r14+r13*1+0xa0]
  2c:	00 00 00 
  2f:	c4 81 7d 6f b4 2e c0 	vmovdqa ymm6,YMMWORD PTR [r14+r13*1+0xc0]
  36:	00 00 00 
  39:	c4 81 7d 6f bc 2e e0 	vmovdqa ymm7,YMMWORD PTR [r14+r13*1+0xe0]
  40:	00 00 00

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 4.19
- Reference cycles: 3.0
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 4.19

With loop_count=1000 and unroll_count=1

Code:

   0:	c4 81 7d 6f 04 2e    	vmovdqa ymm0,YMMWORD PTR [r14+r13*1]
   6:	c4 81 7d 6f 4c 2e 20 	vmovdqa ymm1,YMMWORD PTR [r14+r13*1+0x20]
   d:	c4 81 7d 6f 54 2e 40 	vmovdqa ymm2,YMMWORD PTR [r14+r13*1+0x40]
  14:	c4 81 7d 6f 5c 2e 60 	vmovdqa ymm3,YMMWORD PTR [r14+r13*1+0x60]
  1b:	c4 81 7d 6f a4 2e 80 	vmovdqa ymm4,YMMWORD PTR [r14+r13*1+0x80]
  22:	00 00 00 
  25:	c4 81 7d 6f ac 2e a0 	vmovdqa ymm5,YMMWORD PTR [r14+r13*1+0xa0]
  2c:	00 00 00 
  2f:	c4 81 7d 6f b4 2e c0 	vmovdqa ymm6,YMMWORD PTR [r14+r13*1+0xc0]
  36:	00 00 00 
  39:	c4 81 7d 6f bc 2e e0 	vmovdqa ymm7,YMMWORD PTR [r14+r13*1+0xe0]
  40:	00 00 00

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 4.02
- Reference cycles: 3.48
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	c4 81 7d 6f 04 2e    	vmovdqa ymm0,YMMWORD PTR [r14+r13*1]
   6:	c4 81 7d 6f 4c 2e 20 	vmovdqa ymm1,YMMWORD PTR [r14+r13*1+0x20]
   d:	c4 81 7d 6f 54 2e 40 	vmovdqa ymm2,YMMWORD PTR [r14+r13*1+0x40]
  14:	c4 81 7d 6f 5c 2e 60 	vmovdqa ymm3,YMMWORD PTR [r14+r13*1+0x60]
  1b:	c4 81 7d 6f a4 2e 80 	vmovdqa ymm4,YMMWORD PTR [r14+r13*1+0x80]
  22:	00 00 00 
  25:	c4 81 7d 6f ac 2e a0 	vmovdqa ymm5,YMMWORD PTR [r14+r13*1+0xa0]
  2c:	00 00 00 
  2f:	c4 81 7d 6f b4 2e c0 	vmovdqa ymm6,YMMWORD PTR [r14+r13*1+0xc0]
  36:	00 00 00 
  39:	c4 81 7d 6f bc 2e e0 	vmovdqa ymm7,YMMWORD PTR [r14+r13*1+0xe0]
  40:	00 00 00

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 4.02
- Reference cycles: 3.5
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.48
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.12

With 13 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c4 81 7d 6f 04 2e    	vmovdqa ymm0,YMMWORD PTR [r14+r13*1]
   6:	c4 81 7d 6f 4c 2e 20 	vmovdqa ymm1,YMMWORD PTR [r14+r13*1+0x20]
   d:	c4 81 7d 6f 54 2e 40 	vmovdqa ymm2,YMMWORD PTR [r14+r13*1+0x40]
  14:	c4 81 7d 6f 5c 2e 60 	vmovdqa ymm3,YMMWORD PTR [r14+r13*1+0x60]
  1b:	c4 81 7d 6f a4 2e 80 	vmovdqa ymm4,YMMWORD PTR [r14+r13*1+0x80]
  22:	00 00 00 
  25:	c4 81 7d 6f ac 2e a0 	vmovdqa ymm5,YMMWORD PTR [r14+r13*1+0xa0]
  2c:	00 00 00 
  2f:	c4 81 7d 6f b4 2e c0 	vmovdqa ymm6,YMMWORD PTR [r14+r13*1+0xc0]
  36:	00 00 00 
  39:	c4 81 7d 6f bc 2e e0 	vmovdqa ymm7,YMMWORD PTR [r14+r13*1+0xe0]
  40:	00 00 00 
  43:	c4 01 7d 6f 84 2e 00 	vmovdqa ymm8,YMMWORD PTR [r14+r13*1+0x100]
  4a:	01 00 00 
  4d:	c4 01 7d 6f 8c 2e 20 	vmovdqa ymm9,YMMWORD PTR [r14+r13*1+0x120]
  54:	01 00 00 
  57:	c4 01 7d 6f 94 2e 40 	vmovdqa ymm10,YMMWORD PTR [r14+r13*1+0x140]
  5e:	01 00 00 
  61:	c4 01 7d 6f 9c 2e 60 	vmovdqa ymm11,YMMWORD PTR [r14+r13*1+0x160]
  68:	01 00 00 
  6b:	c4 01 7d 6f a4 2e 80 	vmovdqa ymm12,YMMWORD PTR [r14+r13*1+0x180]
  72:	01 00 00

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 7.31
- Reference cycles: 6.0
- UOPS_EXECUTED.THREAD: 13.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 13.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 6.5
- UOPS_PORT_3: 6.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 7.31

With loop_count=1000 and unroll_count=1

Code:

   0:	c4 81 7d 6f 04 2e    	vmovdqa ymm0,YMMWORD PTR [r14+r13*1]
   6:	c4 81 7d 6f 4c 2e 20 	vmovdqa ymm1,YMMWORD PTR [r14+r13*1+0x20]
   d:	c4 81 7d 6f 54 2e 40 	vmovdqa ymm2,YMMWORD PTR [r14+r13*1+0x40]
  14:	c4 81 7d 6f 5c 2e 60 	vmovdqa ymm3,YMMWORD PTR [r14+r13*1+0x60]
  1b:	c4 81 7d 6f a4 2e 80 	vmovdqa ymm4,YMMWORD PTR [r14+r13*1+0x80]
  22:	00 00 00 
  25:	c4 81 7d 6f ac 2e a0 	vmovdqa ymm5,YMMWORD PTR [r14+r13*1+0xa0]
  2c:	00 00 00 
  2f:	c4 81 7d 6f b4 2e c0 	vmovdqa ymm6,YMMWORD PTR [r14+r13*1+0xc0]
  36:	00 00 00 
  39:	c4 81 7d 6f bc 2e e0 	vmovdqa ymm7,YMMWORD PTR [r14+r13*1+0xe0]
  40:	00 00 00 
  43:	c4 01 7d 6f 84 2e 00 	vmovdqa ymm8,YMMWORD PTR [r14+r13*1+0x100]
  4a:	01 00 00 
  4d:	c4 01 7d 6f 8c 2e 20 	vmovdqa ymm9,YMMWORD PTR [r14+r13*1+0x120]
  54:	01 00 00 
  57:	c4 01 7d 6f 94 2e 40 	vmovdqa ymm10,YMMWORD PTR [r14+r13*1+0x140]
  5e:	01 00 00 
  61:	c4 01 7d 6f 9c 2e 60 	vmovdqa ymm11,YMMWORD PTR [r14+r13*1+0x160]
  68:	01 00 00 
  6b:	c4 01 7d 6f a4 2e 80 	vmovdqa ymm12,YMMWORD PTR [r14+r13*1+0x180]
  72:	01 00 00

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 6.52
- Reference cycles: 5.65
- UOPS_EXECUTED.THREAD: 14.0
- RETIRE_SLOTS: 14.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 6.5
- UOPS_PORT_3: 6.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	c4 81 7d 6f 04 2e    	vmovdqa ymm0,YMMWORD PTR [r14+r13*1]
   6:	c4 81 7d 6f 4c 2e 20 	vmovdqa ymm1,YMMWORD PTR [r14+r13*1+0x20]
   d:	c4 81 7d 6f 54 2e 40 	vmovdqa ymm2,YMMWORD PTR [r14+r13*1+0x40]
  14:	c4 81 7d 6f 5c 2e 60 	vmovdqa ymm3,YMMWORD PTR [r14+r13*1+0x60]
  1b:	c4 81 7d 6f a4 2e 80 	vmovdqa ymm4,YMMWORD PTR [r14+r13*1+0x80]
  22:	00 00 00 
  25:	c4 81 7d 6f ac 2e a0 	vmovdqa ymm5,YMMWORD PTR [r14+r13*1+0xa0]
  2c:	00 00 00 
  2f:	c4 81 7d 6f b4 2e c0 	vmovdqa ymm6,YMMWORD PTR [r14+r13*1+0xc0]
  36:	00 00 00 
  39:	c4 81 7d 6f bc 2e e0 	vmovdqa ymm7,YMMWORD PTR [r14+r13*1+0xe0]
  40:	00 00 00 
  43:	c4 01 7d 6f 84 2e 00 	vmovdqa ymm8,YMMWORD PTR [r14+r13*1+0x100]
  4a:	01 00 00 
  4d:	c4 01 7d 6f 8c 2e 20 	vmovdqa ymm9,YMMWORD PTR [r14+r13*1+0x120]
  54:	01 00 00 
  57:	c4 01 7d 6f 94 2e 40 	vmovdqa ymm10,YMMWORD PTR [r14+r13*1+0x140]
  5e:	01 00 00 
  61:	c4 01 7d 6f 9c 2e 60 	vmovdqa ymm11,YMMWORD PTR [r14+r13*1+0x160]
  68:	01 00 00 
  6b:	c4 01 7d 6f a4 2e 80 	vmovdqa ymm12,YMMWORD PTR [r14+r13*1+0x180]
  72:	01 00 00

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 13.2
- Core cycles: 6.52
- Reference cycles: 5.65
- UOPS_EXECUTED.THREAD: 13.1
- RETIRE_SLOTS: 13.1
- UOPS_MITE: 0.13
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 6.5
- UOPS_PORT_3: 6.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.05

VMOVDQA (YMM, M256) - Throughput and Uops

With a non-indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 13 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 13 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10