MOVZX (R64, M16)

With unroll_count=500 and no inner loop

Code:

   0:	4d 0f b7 06          	movzx  r8,WORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 0.5
- Reference cycles: 0.35
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	4d 0f b7 06          	movzx  r8,WORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 0.5
- Reference cycles: 0.43
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	4d 0f b7 06          	movzx  r8,WORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 0.5
- Reference cycles: 0.43
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	4d 0f b7 06          	movzx  r8,WORD PTR [r14]
   4:	4d 0f b7 4e 02       	movzx  r9,WORD PTR [r14+0x2]
   9:	4d 0f b7 56 04       	movzx  r10,WORD PTR [r14+0x4]
   e:	4d 0f b7 5e 06       	movzx  r11,WORD PTR [r14+0x6]

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 2.0
- Reference cycles: 1.5
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	4d 0f b7 06          	movzx  r8,WORD PTR [r14]
   4:	4d 0f b7 4e 02       	movzx  r9,WORD PTR [r14+0x2]
   9:	4d 0f b7 56 04       	movzx  r10,WORD PTR [r14+0x4]
   e:	4d 0f b7 5e 06       	movzx  r11,WORD PTR [r14+0x6]

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 2.01
- Reference cycles: 1.75
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	4d 0f b7 06          	movzx  r8,WORD PTR [r14]
   4:	4d 0f b7 4e 02       	movzx  r9,WORD PTR [r14+0x2]
   9:	4d 0f b7 56 04       	movzx  r10,WORD PTR [r14+0x4]
   e:	4d 0f b7 5e 06       	movzx  r11,WORD PTR [r14+0x6]

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 2.01
- Reference cycles: 1.74
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.68
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.21

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	4d 0f b7 06          	movzx  r8,WORD PTR [r14]
   4:	4d 0f b7 4e 02       	movzx  r9,WORD PTR [r14+0x2]
   9:	4d 0f b7 56 04       	movzx  r10,WORD PTR [r14+0x4]
   e:	4d 0f b7 5e 06       	movzx  r11,WORD PTR [r14+0x6]
  13:	4d 0f b7 66 08       	movzx  r12,WORD PTR [r14+0x8]
  18:	49 0f b7 5e 0a       	movzx  rbx,WORD PTR [r14+0xa]
  1d:	49 0f b7 4e 0c       	movzx  rcx,WORD PTR [r14+0xc]
  22:	49 0f b7 56 0e       	movzx  rdx,WORD PTR [r14+0xe]

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 4.01
- Reference cycles: 3.0
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.01
- UOPS_PORT_3: 4.01
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	4d 0f b7 06          	movzx  r8,WORD PTR [r14]
   4:	4d 0f b7 4e 02       	movzx  r9,WORD PTR [r14+0x2]
   9:	4d 0f b7 56 04       	movzx  r10,WORD PTR [r14+0x4]
   e:	4d 0f b7 5e 06       	movzx  r11,WORD PTR [r14+0x6]
  13:	4d 0f b7 66 08       	movzx  r12,WORD PTR [r14+0x8]
  18:	49 0f b7 5e 0a       	movzx  rbx,WORD PTR [r14+0xa]
  1d:	49 0f b7 4e 0c       	movzx  rcx,WORD PTR [r14+0xc]
  22:	49 0f b7 56 0e       	movzx  rdx,WORD PTR [r14+0xe]

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 4.02
- Reference cycles: 3.48
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	4d 0f b7 06          	movzx  r8,WORD PTR [r14]
   4:	4d 0f b7 4e 02       	movzx  r9,WORD PTR [r14+0x2]
   9:	4d 0f b7 56 04       	movzx  r10,WORD PTR [r14+0x4]
   e:	4d 0f b7 5e 06       	movzx  r11,WORD PTR [r14+0x6]
  13:	4d 0f b7 66 08       	movzx  r12,WORD PTR [r14+0x8]
  18:	49 0f b7 5e 0a       	movzx  rbx,WORD PTR [r14+0xa]
  1d:	49 0f b7 4e 0c       	movzx  rcx,WORD PTR [r14+0xc]
  22:	49 0f b7 56 0e       	movzx  rdx,WORD PTR [r14+0xe]

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 4.02
- Reference cycles: 3.45
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 9 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	4d 0f b7 06          	movzx  r8,WORD PTR [r14]
   4:	4d 0f b7 4e 02       	movzx  r9,WORD PTR [r14+0x2]
   9:	4d 0f b7 56 04       	movzx  r10,WORD PTR [r14+0x4]
   e:	4d 0f b7 5e 06       	movzx  r11,WORD PTR [r14+0x6]
  13:	4d 0f b7 66 08       	movzx  r12,WORD PTR [r14+0x8]
  18:	49 0f b7 5e 0a       	movzx  rbx,WORD PTR [r14+0xa]
  1d:	49 0f b7 4e 0c       	movzx  rcx,WORD PTR [r14+0xc]
  22:	49 0f b7 56 0e       	movzx  rdx,WORD PTR [r14+0xe]
  27:	49 0f b7 46 10       	movzx  rax,WORD PTR [r14+0x10]

Show nanoBench command
Results:
- Instructions retired: 9.0
- Core cycles: 4.58
- Reference cycles: 4.0
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 9.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.5
- UOPS_PORT_3: 4.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.26

With loop_count=1000 and unroll_count=1

Code:

   0:	4d 0f b7 06          	movzx  r8,WORD PTR [r14]
   4:	4d 0f b7 4e 02       	movzx  r9,WORD PTR [r14+0x2]
   9:	4d 0f b7 56 04       	movzx  r10,WORD PTR [r14+0x4]
   e:	4d 0f b7 5e 06       	movzx  r11,WORD PTR [r14+0x6]
  13:	4d 0f b7 66 08       	movzx  r12,WORD PTR [r14+0x8]
  18:	49 0f b7 5e 0a       	movzx  rbx,WORD PTR [r14+0xa]
  1d:	49 0f b7 4e 0c       	movzx  rcx,WORD PTR [r14+0xc]
  22:	49 0f b7 56 0e       	movzx  rdx,WORD PTR [r14+0xe]
  27:	49 0f b7 46 10       	movzx  rax,WORD PTR [r14+0x10]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 4.52
- Reference cycles: 3.88
- UOPS_EXECUTED.THREAD: 10.0
- RETIRE_SLOTS: 10.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.5
- UOPS_PORT_3: 4.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	4d 0f b7 06          	movzx  r8,WORD PTR [r14]
   4:	4d 0f b7 4e 02       	movzx  r9,WORD PTR [r14+0x2]
   9:	4d 0f b7 56 04       	movzx  r10,WORD PTR [r14+0x4]
   e:	4d 0f b7 5e 06       	movzx  r11,WORD PTR [r14+0x6]
  13:	4d 0f b7 66 08       	movzx  r12,WORD PTR [r14+0x8]
  18:	49 0f b7 5e 0a       	movzx  rbx,WORD PTR [r14+0xa]
  1d:	49 0f b7 4e 0c       	movzx  rcx,WORD PTR [r14+0xc]
  22:	49 0f b7 56 0e       	movzx  rdx,WORD PTR [r14+0xe]
  27:	49 0f b7 46 10       	movzx  rax,WORD PTR [r14+0x10]

Show nanoBench command
Results:
- Instructions retired: 9.2
- Core cycles: 4.52
- Reference cycles: 3.9
- UOPS_EXECUTED.THREAD: 9.1
- RETIRE_SLOTS: 9.1
- UOPS_MITE: 1.28
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.5
- UOPS_PORT_3: 4.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.32

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	4f 0f b7 04 2e       	movzx  r8,WORD PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 0.5
- Reference cycles: 0.35
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	4f 0f b7 04 2e       	movzx  r8,WORD PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 0.5
- Reference cycles: 0.43
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	4f 0f b7 04 2e       	movzx  r8,WORD PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 0.5
- Reference cycles: 0.43
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.5
- UOPS_PORT_3: 0.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	4f 0f b7 04 2e       	movzx  r8,WORD PTR [r14+r13*1]
   5:	4f 0f b7 4c 2e 02    	movzx  r9,WORD PTR [r14+r13*1+0x2]
   b:	4f 0f b7 54 2e 04    	movzx  r10,WORD PTR [r14+r13*1+0x4]
  11:	4f 0f b7 5c 2e 06    	movzx  r11,WORD PTR [r14+r13*1+0x6]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 2.0
- Reference cycles: 1.63
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	4f 0f b7 04 2e       	movzx  r8,WORD PTR [r14+r13*1]
   5:	4f 0f b7 4c 2e 02    	movzx  r9,WORD PTR [r14+r13*1+0x2]
   b:	4f 0f b7 54 2e 04    	movzx  r10,WORD PTR [r14+r13*1+0x4]
  11:	4f 0f b7 5c 2e 06    	movzx  r11,WORD PTR [r14+r13*1+0x6]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 2.01
- Reference cycles: 1.71
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	4f 0f b7 04 2e       	movzx  r8,WORD PTR [r14+r13*1]
   5:	4f 0f b7 4c 2e 02    	movzx  r9,WORD PTR [r14+r13*1+0x2]
   b:	4f 0f b7 54 2e 04    	movzx  r10,WORD PTR [r14+r13*1+0x4]
  11:	4f 0f b7 5c 2e 06    	movzx  r11,WORD PTR [r14+r13*1+0x6]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 2.01
- Reference cycles: 1.73
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 2.0
- UOPS_PORT_3: 2.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	4f 0f b7 04 2e       	movzx  r8,WORD PTR [r14+r13*1]
   5:	4f 0f b7 4c 2e 02    	movzx  r9,WORD PTR [r14+r13*1+0x2]
   b:	4f 0f b7 54 2e 04    	movzx  r10,WORD PTR [r14+r13*1+0x4]
  11:	4f 0f b7 5c 2e 06    	movzx  r11,WORD PTR [r14+r13*1+0x6]
  17:	4f 0f b7 64 2e 08    	movzx  r12,WORD PTR [r14+r13*1+0x8]
  1d:	4b 0f b7 5c 2e 0a    	movzx  rbx,WORD PTR [r14+r13*1+0xa]
  23:	4b 0f b7 4c 2e 0c    	movzx  rcx,WORD PTR [r14+r13*1+0xc]
  29:	4b 0f b7 54 2e 0e    	movzx  rdx,WORD PTR [r14+r13*1+0xe]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 4.0
- Reference cycles: 3.25
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	4f 0f b7 04 2e       	movzx  r8,WORD PTR [r14+r13*1]
   5:	4f 0f b7 4c 2e 02    	movzx  r9,WORD PTR [r14+r13*1+0x2]
   b:	4f 0f b7 54 2e 04    	movzx  r10,WORD PTR [r14+r13*1+0x4]
  11:	4f 0f b7 5c 2e 06    	movzx  r11,WORD PTR [r14+r13*1+0x6]
  17:	4f 0f b7 64 2e 08    	movzx  r12,WORD PTR [r14+r13*1+0x8]
  1d:	4b 0f b7 5c 2e 0a    	movzx  rbx,WORD PTR [r14+r13*1+0xa]
  23:	4b 0f b7 4c 2e 0c    	movzx  rcx,WORD PTR [r14+r13*1+0xc]
  29:	4b 0f b7 54 2e 0e    	movzx  rdx,WORD PTR [r14+r13*1+0xe]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 4.02
- Reference cycles: 3.45
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	4f 0f b7 04 2e       	movzx  r8,WORD PTR [r14+r13*1]
   5:	4f 0f b7 4c 2e 02    	movzx  r9,WORD PTR [r14+r13*1+0x2]
   b:	4f 0f b7 54 2e 04    	movzx  r10,WORD PTR [r14+r13*1+0x4]
  11:	4f 0f b7 5c 2e 06    	movzx  r11,WORD PTR [r14+r13*1+0x6]
  17:	4f 0f b7 64 2e 08    	movzx  r12,WORD PTR [r14+r13*1+0x8]
  1d:	4b 0f b7 5c 2e 0a    	movzx  rbx,WORD PTR [r14+r13*1+0xa]
  23:	4b 0f b7 4c 2e 0c    	movzx  rcx,WORD PTR [r14+r13*1+0xc]
  29:	4b 0f b7 54 2e 0e    	movzx  rdx,WORD PTR [r14+r13*1+0xe]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 4.02
- Reference cycles: 3.43
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.0
- UOPS_PORT_3: 4.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 9 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	4f 0f b7 04 2e       	movzx  r8,WORD PTR [r14+r13*1]
   5:	4f 0f b7 4c 2e 02    	movzx  r9,WORD PTR [r14+r13*1+0x2]
   b:	4f 0f b7 54 2e 04    	movzx  r10,WORD PTR [r14+r13*1+0x4]
  11:	4f 0f b7 5c 2e 06    	movzx  r11,WORD PTR [r14+r13*1+0x6]
  17:	4f 0f b7 64 2e 08    	movzx  r12,WORD PTR [r14+r13*1+0x8]
  1d:	4b 0f b7 5c 2e 0a    	movzx  rbx,WORD PTR [r14+r13*1+0xa]
  23:	4b 0f b7 4c 2e 0c    	movzx  rcx,WORD PTR [r14+r13*1+0xc]
  29:	4b 0f b7 54 2e 0e    	movzx  rdx,WORD PTR [r14+r13*1+0xe]
  2f:	4b 0f b7 44 2e 10    	movzx  rax,WORD PTR [r14+r13*1+0x10]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 9.0
- Core cycles: 4.5
- Reference cycles: 4.0
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 9.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.5
- UOPS_PORT_3: 4.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.25

With loop_count=1000 and unroll_count=1

Code:

   0:	4f 0f b7 04 2e       	movzx  r8,WORD PTR [r14+r13*1]
   5:	4f 0f b7 4c 2e 02    	movzx  r9,WORD PTR [r14+r13*1+0x2]
   b:	4f 0f b7 54 2e 04    	movzx  r10,WORD PTR [r14+r13*1+0x4]
  11:	4f 0f b7 5c 2e 06    	movzx  r11,WORD PTR [r14+r13*1+0x6]
  17:	4f 0f b7 64 2e 08    	movzx  r12,WORD PTR [r14+r13*1+0x8]
  1d:	4b 0f b7 5c 2e 0a    	movzx  rbx,WORD PTR [r14+r13*1+0xa]
  23:	4b 0f b7 4c 2e 0c    	movzx  rcx,WORD PTR [r14+r13*1+0xc]
  29:	4b 0f b7 54 2e 0e    	movzx  rdx,WORD PTR [r14+r13*1+0xe]
  2f:	4b 0f b7 44 2e 10    	movzx  rax,WORD PTR [r14+r13*1+0x10]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 4.52
- Reference cycles: 3.9
- UOPS_EXECUTED.THREAD: 10.0
- RETIRE_SLOTS: 10.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.5
- UOPS_PORT_3: 4.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	4f 0f b7 04 2e       	movzx  r8,WORD PTR [r14+r13*1]
   5:	4f 0f b7 4c 2e 02    	movzx  r9,WORD PTR [r14+r13*1+0x2]
   b:	4f 0f b7 54 2e 04    	movzx  r10,WORD PTR [r14+r13*1+0x4]
  11:	4f 0f b7 5c 2e 06    	movzx  r11,WORD PTR [r14+r13*1+0x6]
  17:	4f 0f b7 64 2e 08    	movzx  r12,WORD PTR [r14+r13*1+0x8]
  1d:	4b 0f b7 5c 2e 0a    	movzx  rbx,WORD PTR [r14+r13*1+0xa]
  23:	4b 0f b7 4c 2e 0c    	movzx  rcx,WORD PTR [r14+r13*1+0xc]
  29:	4b 0f b7 54 2e 0e    	movzx  rdx,WORD PTR [r14+r13*1+0xe]
  2f:	4b 0f b7 44 2e 10    	movzx  rax,WORD PTR [r14+r13*1+0x10]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 9.2
- Core cycles: 4.52
- Reference cycles: 3.88
- UOPS_EXECUTED.THREAD: 9.1
- RETIRE_SLOTS: 9.1
- UOPS_MITE: 0.09
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 4.5
- UOPS_PORT_3: 4.5
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.03

MOVZX (R64, M16) - Throughput and Uops

With a non-indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 9 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 9 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10