INC (R64)

With unroll_count=500 and no inner loop

Code:
```
   0:	49 ff c0             	inc    r8
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 1.0
- Reference cycles: 0.85
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.25
- UOPS_PORT_1: 0.25
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.25
- UOPS_PORT_6: 0.25
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:
```
   0:	49 ff c0             	inc    r8
```
Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 1.0
- Reference cycles: 0.86
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 1.11
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.25
- UOPS_PORT_1: 0.25
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.25
- UOPS_PORT_6: 0.35
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.3

With loop_count=100 and unroll_count=100

Code:
```
   0:	49 ff c0             	inc    r8
```
Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 1.0
- Reference cycles: 0.87
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.25
- UOPS_PORT_1: 0.25
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.25
- UOPS_PORT_6: 0.26
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	49 ff c0             	inc    r8
   3:	49 ff c1             	inc    r9
   6:	49 ff c2             	inc    r10
   9:	49 ff c3             	inc    r11

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 1.25
- Reference cycles: 1.0
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.98
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.02
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.25

With loop_count=1000 and unroll_count=2

Code:

   0:	49 ff c0             	inc    r8
   3:	49 ff c1             	inc    r9
   6:	49 ff c2             	inc    r10
   9:	49 ff c3             	inc    r11

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 1.51
- Reference cycles: 1.3
- UOPS_EXECUTED.THREAD: 4.51
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 4.51
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.04
- UOPS_PORT_1: 1.08
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.11
- UOPS_PORT_6: 1.27
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.5

With loop_count=100 and unroll_count=20

Code:

   0:	49 ff c0             	inc    r8
   3:	49 ff c1             	inc    r9
   6:	49 ff c2             	inc    r10
   9:	49 ff c3             	inc    r11

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 1.19
- Reference cycles: 0.99
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.02
- UOPS_PORT_6: 1.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	49 ff c0             	inc    r8
   3:	49 ff c1             	inc    r9
   6:	49 ff c2             	inc    r10
   9:	49 ff c3             	inc    r11
   c:	49 ff c4             	inc    r12
   f:	49 ff c5             	inc    r13
  12:	49 ff c6             	inc    r14
  15:	48 ff c3             	inc    rbx

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 2.5
- Reference cycles: 1.5
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.84
- UOPS_PORT_1: 1.83
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 2.16
- UOPS_PORT_6: 2.17
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.5

With loop_count=1000 and unroll_count=1

Code:

   0:	49 ff c0             	inc    r8
   3:	49 ff c1             	inc    r9
   6:	49 ff c2             	inc    r10
   9:	49 ff c3             	inc    r11
   c:	49 ff c4             	inc    r12
   f:	49 ff c5             	inc    r13
  12:	49 ff c6             	inc    r14
  15:	48 ff c3             	inc    rbx

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 3.02
- Reference cycles: 2.65
- UOPS_EXECUTED.THREAD: 9.02
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 9.03
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.01
- UOPS_PORT_1: 2.33
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 2.34
- UOPS_PORT_6: 2.34
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 3.01

With loop_count=100 and unroll_count=10

Code:

   0:	49 ff c0             	inc    r8
   3:	49 ff c1             	inc    r9
   6:	49 ff c2             	inc    r10
   9:	49 ff c3             	inc    r11
   c:	49 ff c4             	inc    r12
   f:	49 ff c5             	inc    r13
  12:	49 ff c6             	inc    r14
  15:	48 ff c3             	inc    rbx

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 2.05
- Reference cycles: 1.75
- UOPS_EXECUTED.THREAD: 8.12
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.03
- UOPS_PORT_1: 2.03
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 2.03
- UOPS_PORT_6: 2.03
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 13 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	49 ff c0             	inc    r8
   3:	49 ff c1             	inc    r9
   6:	49 ff c2             	inc    r10
   9:	49 ff c3             	inc    r11
   c:	49 ff c4             	inc    r12
   f:	49 ff c5             	inc    r13
  12:	49 ff c6             	inc    r14
  15:	48 ff c3             	inc    rbx
  18:	48 ff c1             	inc    rcx
  1b:	48 ff c2             	inc    rdx
  1e:	48 ff c7             	inc    rdi
  21:	48 ff c6             	inc    rsi
  24:	48 ff c5             	inc    rbp

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 4.06
- Reference cycles: 3.25
- UOPS_EXECUTED.THREAD: 13.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 13.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.97
- UOPS_PORT_1: 2.99
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 3.53
- UOPS_PORT_6: 3.51
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 4.06

With loop_count=1000 and unroll_count=1

Code:

   0:	49 ff c0             	inc    r8
   3:	49 ff c1             	inc    r9
   6:	49 ff c2             	inc    r10
   9:	49 ff c3             	inc    r11
   c:	49 ff c4             	inc    r12
   f:	49 ff c5             	inc    r13
  12:	49 ff c6             	inc    r14
  15:	48 ff c3             	inc    rbx
  18:	48 ff c1             	inc    rcx
  1b:	48 ff c2             	inc    rdx
  1e:	48 ff c7             	inc    rdi
  21:	48 ff c6             	inc    rsi
  24:	48 ff c5             	inc    rbp

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 3.54
- Reference cycles: 3.1
- UOPS_EXECUTED.THREAD: 14.03
- RETIRE_SLOTS: 14.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 3.51
- UOPS_PORT_1: 3.51
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 3.51
- UOPS_PORT_6: 3.51
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	49 ff c0             	inc    r8
   3:	49 ff c1             	inc    r9
   6:	49 ff c2             	inc    r10
   9:	49 ff c3             	inc    r11
   c:	49 ff c4             	inc    r12
   f:	49 ff c5             	inc    r13
  12:	49 ff c6             	inc    r14
  15:	48 ff c3             	inc    rbx
  18:	48 ff c1             	inc    rcx
  1b:	48 ff c2             	inc    rdx
  1e:	48 ff c7             	inc    rdi
  21:	48 ff c6             	inc    rsi
  24:	48 ff c5             	inc    rbp

Show nanoBench command
Results:
- Instructions retired: 13.2
- Core cycles: 3.31
- Reference cycles: 2.83
- UOPS_EXECUTED.THREAD: 13.13
- RETIRE_SLOTS: 13.1
- UOPS_MITE: 0.13
- UOPS_MS: 0.0
- UOPS_PORT_0: 3.28
- UOPS_PORT_1: 3.28
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 3.28
- UOPS_PORT_6: 3.28
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.04

Tests for macro-fusion

With JB (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 82 00 00 00 00    	jb     0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.1
- Reference cycles: 1.0
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.63
- UOPS_PORT_1: 0.35
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.37
- UOPS_PORT_6: 0.65
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.53

With JB (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	72 00                	jb     0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.25
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.62
- UOPS_PORT_1: 0.32
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.38
- UOPS_PORT_6: 0.68
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.58

With JBE (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 86 00 00 00 00    	jbe    0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.2
- Reference cycles: 2.25
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.09
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.49
- UOPS_PORT_1: 0.43
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.37
- UOPS_PORT_6: 0.71
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.52

With JBE (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	76 00                	jbe    0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.13
- Reference cycles: 1.0
- UOPS_EXECUTED.THREAD: 2.02
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.07
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.51
- UOPS_PORT_1: 0.41
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.41
- UOPS_PORT_6: 0.67
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.57

With JL (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 8c 00 00 00 00    	jl     0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 0.75
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.36
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.64
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.52

With JL (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	7c 00                	jl     0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.25
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.37
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.63
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.55

With JLE (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 8e 00 00 00 00    	jle    0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.0
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.36
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.64
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.52

With JLE (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	7e 00                	jle    0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.0
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.37
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.63
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.55

With JNB (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 83 00 00 00 00    	jae    0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.63
- Reference cycles: 2.25
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.22
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.32
- UOPS_PORT_1: 0.3
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.37
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.73

With JNB (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	73 00                	jae    0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.31
- Reference cycles: 1.5
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.04
- UOPS_MITE: 1.35
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.29
- UOPS_PORT_1: 0.3
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.37
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.82

With JNBE (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 87 00 00 00 00    	ja     0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.62
- Reference cycles: 1.75
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.29
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.32
- UOPS_PORT_1: 0.32
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.38
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.8

With JNBE (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	77 00                	ja     0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.58
- Reference cycles: 2.0
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.02
- UOPS_MITE: 1.51
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.32
- UOPS_PORT_1: 0.31
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.37
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.83

With JNL (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 8d 00 00 00 00    	jge    0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.11
- Reference cycles: 1.5
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.83
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 0.01
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.84

With JNL (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	7d 00                	jge    0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.11
- Reference cycles: 1.25
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 0.89
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.82

With JNLE (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 8f 00 00 00 00    	jg     0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.11
- Reference cycles: 1.0
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 0.8
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.84

With JNLE (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	7f 00                	jg     0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.1
- Reference cycles: 1.25
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 0.92
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.91

With JNO (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 81 00 00 00 00    	jno    0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.1
- Reference cycles: 1.25
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.51
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.32
- UOPS_PORT_1: 0.3
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.38
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.79

With JNO (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	71 00                	jno    0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.24
- Reference cycles: 1.0
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.7
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.33
- UOPS_PORT_1: 0.31
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.37
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.85

With JNP (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 8b 00 00 00 00    	jnp    0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.08
- Reference cycles: 1.0
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.52
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.47
- UOPS_PORT_1: 0.4
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.44
- UOPS_PORT_6: 0.7
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JNP (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	7b 00                	jnp    0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.1
- Reference cycles: 1.0
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.7
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.47
- UOPS_PORT_1: 0.39
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.45
- UOPS_PORT_6: 0.69
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.47

With JNS (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 89 00 00 00 00    	jns    0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.3
- Reference cycles: 1.0
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.77
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.32
- UOPS_PORT_1: 0.31
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.38
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.76

With JNS (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	79 00                	jns    0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.26
- Reference cycles: 1.0
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.78
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.33
- UOPS_PORT_1: 0.31
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.36
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.84

With JNZ (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 85 00 00 00 00    	jne    0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.11
- Reference cycles: 0.75
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.82
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 0.01
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.83

With JNZ (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	75 00                	jne    0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.1
- Reference cycles: 1.25
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 0.89
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.85

With JO (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 80 00 00 00 00    	jo     0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.11
- Reference cycles: 1.0
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.49
- UOPS_PORT_1: 0.43
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.37
- UOPS_PORT_6: 0.71
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.52

With JO (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	70 00                	jo     0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.09
- Reference cycles: 1.25
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.52
- UOPS_PORT_1: 0.42
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.41
- UOPS_PORT_6: 0.66
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.58

With JP (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 8a 00 00 00 00    	jp     0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.08
- Reference cycles: 1.0
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.78
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.46
- UOPS_PORT_1: 0.4
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.45
- UOPS_PORT_6: 0.69
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.61

With JP (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	7a 00                	jp     0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.09
- Reference cycles: 1.25
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.04
- UOPS_MITE: 1.9
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.45
- UOPS_PORT_1: 0.41
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.44
- UOPS_PORT_6: 0.68
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.55

With JS (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 88 00 00 00 00    	js     0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.11
- Reference cycles: 1.25
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.49
- UOPS_PORT_1: 0.43
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.37
- UOPS_PORT_6: 0.71
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.52

With JS (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	78 00                	js     0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.08
- Reference cycles: 0.75
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.52
- UOPS_PORT_1: 0.41
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.41
- UOPS_PORT_6: 0.66
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.58

With JZ (Rel32)

Code:

   0:	49 ff c0             	inc    r8
   3:	0f 84 00 00 00 00    	je     0x9

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.0
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.36
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.64
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.52

With JZ (Rel8)

Code:

   0:	49 ff c0             	inc    r8
   3:	74 00                	je     0x5

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.0
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.37
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.63
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.55

INC (R64) - Throughput and Uops

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 13 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

Tests for macro-fusion

With JB (Rel32)

With JB (Rel8)

With JBE (Rel32)

With JBE (Rel8)

With JL (Rel32)

With JL (Rel8)

With JLE (Rel32)

With JLE (Rel8)

With JNB (Rel32)

With JNB (Rel8)

With JNBE (Rel32)

With JNBE (Rel8)

With JNL (Rel32)

With JNL (Rel8)

With JNLE (Rel32)

With JNLE (Rel8)

With JNO (Rel32)

With JNO (Rel8)

With JNP (Rel32)

With JNP (Rel8)

With JNS (Rel32)

With JNS (Rel8)

With JNZ (Rel32)

With JNZ (Rel8)

With JO (Rel32)

With JO (Rel8)

With JP (Rel32)

With JP (Rel8)

With JS (Rel32)

With JS (Rel8)

With JZ (Rel32)

With JZ (Rel8)