INC_LOCK (M32) - Throughput and Uops

With unroll_count=500 and no inner loop

• Code:

     0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 18.0
  • Reference cycles: 15.8
  • UOPS_EXECUTED.THREAD: 7.0
  • RETIRE_SLOTS: 8.0
  • UOPS_MITE: 0.0
  • UOPS_MS: 8.0
  • UOPS_PORT_0: 0.94
  • UOPS_PORT_1: 1.06
  • UOPS_PORT_2: 0.96
  • UOPS_PORT_3: 1.04
  • UOPS_PORT_4: 2.61
  • UOPS_PORT_5: 0.87
  • UOPS_PORT_6: 2.72
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     4:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 18.01
  • Reference cycles: 15.85
  • UOPS_EXECUTED.THREAD: 7.0
  • RETIRE_SLOTS: 9.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 8.0
  • UOPS_PORT_0: 0.77
  • UOPS_PORT_1: 0.88
  • UOPS_PORT_2: 1.34
  • UOPS_PORT_3: 0.66
  • UOPS_PORT_4: 2.19
  • UOPS_PORT_5: 0.87
  • UOPS_PORT_6: 2.67
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 18.0
  • Reference cycles: 15.85
  • UOPS_EXECUTED.THREAD: 7.1
  • RETIRE_SLOTS: 8.1
  • UOPS_MITE: 0.1
  • UOPS_MS: 8.01
  • UOPS_PORT_0: 0.85
  • UOPS_PORT_1: 0.85
  • UOPS_PORT_2: 1.13
  • UOPS_PORT_3: 0.87
  • UOPS_PORT_4: 2.12
  • UOPS_PORT_5: 0.84
  • UOPS_PORT_6: 2.77
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.1

With loop_count=100 and unroll_count=100

• Code:

     0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 18.0
  • Reference cycles: 15.85
  • UOPS_EXECUTED.THREAD: 7.01
  • RETIRE_SLOTS: 8.01
  • UOPS_MITE: 0.01
  • UOPS_MS: 8.01
  • UOPS_PORT_0: 0.79
  • UOPS_PORT_1: 0.84
  • UOPS_PORT_2: 1.14
  • UOPS_PORT_3: 0.86
  • UOPS_PORT_4: 2.31
  • UOPS_PORT_5: 1.01
  • UOPS_PORT_6: 2.7
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With additional dependency-breaking instructions

With unroll_count=500 and no inner loop

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
  

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 18.01
  • Reference cycles: 15.8
  • UOPS_EXECUTED.THREAD: 8.0
  • RETIRE_SLOTS: 9.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 8.0
  • UOPS_PORT_0: 1.13
  • UOPS_PORT_1: 1.17
  • UOPS_PORT_2: 0.8
  • UOPS_PORT_3: 1.2
  • UOPS_PORT_4: 2.18
  • UOPS_PORT_5: 1.08
  • UOPS_PORT_6: 2.84
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
  

• Show nanoBench command
• Results:
  • Instructions retired: 2.2
  • Core cycles: 18.0
  • Reference cycles: 15.84
  • UOPS_EXECUTED.THREAD: 8.1
  • RETIRE_SLOTS: 9.1
  • UOPS_MITE: 1.1
  • UOPS_MS: 8.0
  • UOPS_PORT_0: 1.09
  • UOPS_PORT_1: 1.19
  • UOPS_PORT_2: 1.07
  • UOPS_PORT_3: 0.93
  • UOPS_PORT_4: 2.16
  • UOPS_PORT_5: 1.21
  • UOPS_PORT_6: 2.83
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.1

With loop_count=100 and unroll_count=100

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
  

• Show nanoBench command
• Results:
  • Instructions retired: 2.02
  • Core cycles: 18.0
  • Reference cycles: 15.47
  • UOPS_EXECUTED.THREAD: 8.01
  • RETIRE_SLOTS: 9.01
  • UOPS_MITE: 1.01
  • UOPS_MS: 8.01
  • UOPS_PORT_0: 1.15
  • UOPS_PORT_1: 1.17
  • UOPS_PORT_2: 1.08
  • UOPS_PORT_3: 0.92
  • UOPS_PORT_4: 2.16
  • UOPS_PORT_5: 1.01
  • UOPS_PORT_6: 2.83
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.01

With unroll_count=200 and no inner loop

• Code:

     0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
     e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
  

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 91.99
  • Reference cycles: 79.25
  • UOPS_EXECUTED.THREAD: 28.0
  • RETIRE_SLOTS: 32.0
  • UOPS_MITE: 0.0
  • UOPS_MS: 32.0
  • UOPS_PORT_0: 5.87
  • UOPS_PORT_1: 5.67
  • UOPS_PORT_2: 3.86
  • UOPS_PORT_3: 4.14
  • UOPS_PORT_4: 16.71
  • UOPS_PORT_5: 4.66
  • UOPS_PORT_6: 12.29
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
     e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
  

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 89.0
  • Reference cycles: 76.49
  • UOPS_EXECUTED.THREAD: 28.5
  • RETIRE_SLOTS: 32.5
  • UOPS_MITE: 0.5
  • UOPS_MS: 32.03
  • UOPS_PORT_0: 5.08
  • UOPS_PORT_1: 5.17
  • UOPS_PORT_2: 4.46
  • UOPS_PORT_3: 3.54
  • UOPS_PORT_4: 15.24
  • UOPS_PORT_5: 5.24
  • UOPS_PORT_6: 12.75
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.5

With loop_count=100 and unroll_count=20

• Code:

     0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
     e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
  

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 91.7
  • Reference cycles: 80.71
  • UOPS_EXECUTED.THREAD: 28.05
  • RETIRE_SLOTS: 32.05
  • UOPS_MITE: 0.05
  • UOPS_MS: 32.03
  • UOPS_PORT_0: 5.36
  • UOPS_PORT_1: 5.5
  • UOPS_PORT_2: 4.53
  • UOPS_PORT_3: 3.47
  • UOPS_PORT_4: 17.02
  • UOPS_PORT_5: 5.91
  • UOPS_PORT_6: 12.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.05

With additional dependency-breaking instructions

With unroll_count=200 and no inner loop

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     c:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    11:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
  

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 92.0
  • Reference cycles: 81.0
  • UOPS_EXECUTED.THREAD: 29.0
  • RETIRE_SLOTS: 33.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 32.0
  • UOPS_PORT_0: 5.25
  • UOPS_PORT_1: 5.32
  • UOPS_PORT_2: 4.62
  • UOPS_PORT_3: 3.37
  • UOPS_PORT_4: 15.78
  • UOPS_PORT_5: 5.54
  • UOPS_PORT_6: 12.98
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     c:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    11:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
  

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 89.0
  • Reference cycles: 78.34
  • UOPS_EXECUTED.THREAD: 29.5
  • RETIRE_SLOTS: 33.5
  • UOPS_MITE: 1.5
  • UOPS_MS: 32.03
  • UOPS_PORT_0: 5.35
  • UOPS_PORT_1: 5.67
  • UOPS_PORT_2: 4.56
  • UOPS_PORT_3: 3.44
  • UOPS_PORT_4: 15.86
  • UOPS_PORT_5: 5.69
  • UOPS_PORT_6: 12.81
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.5

With loop_count=100 and unroll_count=20

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     c:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    11:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
  

• Show nanoBench command
• Results:
  • Instructions retired: 5.1
  • Core cycles: 91.93
  • Reference cycles: 79.95
  • UOPS_EXECUTED.THREAD: 29.05
  • RETIRE_SLOTS: 33.05
  • UOPS_MITE: 1.05
  • UOPS_MS: 32.02
  • UOPS_PORT_0: 5.28
  • UOPS_PORT_1: 5.35
  • UOPS_PORT_2: 3.82
  • UOPS_PORT_3: 4.18
  • UOPS_PORT_4: 16.01
  • UOPS_PORT_5: 5.5
  • UOPS_PORT_6: 13.16
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.05

With additional dependency-breaking instructions (before each instruction)

With unroll_count=200 and no inner loop

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	4d 85 ff             	test   r15,r15
     a:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     f:	4d 85 ff             	test   r15,r15
    12:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    17:	4d 85 ff             	test   r15,r15
    1a:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
  

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 92.0
  • Reference cycles: 79.25
  • UOPS_EXECUTED.THREAD: 32.0
  • RETIRE_SLOTS: 36.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 32.0
  • UOPS_PORT_0: 6.56
  • UOPS_PORT_1: 6.66
  • UOPS_PORT_2: 3.26
  • UOPS_PORT_3: 4.74
  • UOPS_PORT_4: 16.86
  • UOPS_PORT_5: 6.53
  • UOPS_PORT_6: 13.07
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	4d 85 ff             	test   r15,r15
     a:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     f:	4d 85 ff             	test   r15,r15
    12:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    17:	4d 85 ff             	test   r15,r15
    1a:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
  

• Show nanoBench command
• Results:
  • Instructions retired: 9.0
  • Core cycles: 89.0
  • Reference cycles: 76.48
  • UOPS_EXECUTED.THREAD: 32.5
  • RETIRE_SLOTS: 36.5
  • UOPS_MITE: 4.5
  • UOPS_MS: 32.02
  • UOPS_PORT_0: 6.04
  • UOPS_PORT_1: 6.43
  • UOPS_PORT_2: 4.14
  • UOPS_PORT_3: 3.86
  • UOPS_PORT_4: 15.12
  • UOPS_PORT_5: 6.68
  • UOPS_PORT_6: 13.12
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.5

With loop_count=100 and unroll_count=20

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	4d 85 ff             	test   r15,r15
     a:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     f:	4d 85 ff             	test   r15,r15
    12:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    17:	4d 85 ff             	test   r15,r15
    1a:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
  

• Show nanoBench command
• Results:
  • Instructions retired: 8.1
  • Core cycles: 91.7
  • Reference cycles: 78.8
  • UOPS_EXECUTED.THREAD: 32.05
  • RETIRE_SLOTS: 36.05
  • UOPS_MITE: 4.05
  • UOPS_MS: 32.02
  • UOPS_PORT_0: 6.63
  • UOPS_PORT_1: 6.77
  • UOPS_PORT_2: 4.33
  • UOPS_PORT_3: 3.67
  • UOPS_PORT_4: 16.86
  • UOPS_PORT_5: 6.52
  • UOPS_PORT_6: 12.98
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.05

With unroll_count=100 and no inner loop

• Code:

     0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
     e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    13:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    18:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    1d:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    22:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 183.99
  • Reference cycles: 162.25
  • UOPS_EXECUTED.THREAD: 56.0
  • RETIRE_SLOTS: 64.0
  • UOPS_MITE: 0.0
  • UOPS_MS: 64.0
  • UOPS_PORT_0: 10.17
  • UOPS_PORT_1: 11.11
  • UOPS_PORT_2: 7.71
  • UOPS_PORT_3: 8.3
  • UOPS_PORT_4: 31.14
  • UOPS_PORT_5: 9.67
  • UOPS_PORT_6: 23.6
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
     e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    13:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    18:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    1d:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    22:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 178.01
  • Reference cycles: 156.68
  • UOPS_EXECUTED.THREAD: 57.0
  • RETIRE_SLOTS: 65.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 64.05
  • UOPS_PORT_0: 10.15
  • UOPS_PORT_1: 10.35
  • UOPS_PORT_2: 8.91
  • UOPS_PORT_3: 7.09
  • UOPS_PORT_4: 30.06
  • UOPS_PORT_5: 10.29
  • UOPS_PORT_6: 25.48
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=100 and unroll_count=10

• Code:

     0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
     e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    13:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    18:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    1d:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    22:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 183.41
  • Reference cycles: 161.43
  • UOPS_EXECUTED.THREAD: 56.1
  • RETIRE_SLOTS: 64.1
  • UOPS_MITE: 0.1
  • UOPS_MS: 64.05
  • UOPS_PORT_0: 10.54
  • UOPS_PORT_1: 10.97
  • UOPS_PORT_2: 9.05
  • UOPS_PORT_3: 6.95
  • UOPS_PORT_4: 33.58
  • UOPS_PORT_5: 11.72
  • UOPS_PORT_6: 24.86
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.1

With additional dependency-breaking instructions

With unroll_count=100 and no inner loop

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     c:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    11:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    16:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    1b:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    20:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    25:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 9.0
  • Core cycles: 184.0
  • Reference cycles: 162.0
  • UOPS_EXECUTED.THREAD: 57.0
  • RETIRE_SLOTS: 65.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 64.0
  • UOPS_PORT_0: 10.74
  • UOPS_PORT_1: 11.07
  • UOPS_PORT_2: 8.85
  • UOPS_PORT_3: 7.15
  • UOPS_PORT_4: 31.58
  • UOPS_PORT_5: 11.06
  • UOPS_PORT_6: 24.99
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     c:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    11:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    16:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    1b:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    20:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    25:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 11.0
  • Core cycles: 178.01
  • Reference cycles: 156.7
  • UOPS_EXECUTED.THREAD: 58.0
  • RETIRE_SLOTS: 66.0
  • UOPS_MITE: 2.0
  • UOPS_MS: 64.05
  • UOPS_PORT_0: 10.94
  • UOPS_PORT_1: 9.75
  • UOPS_PORT_2: 7.5
  • UOPS_PORT_3: 8.5
  • UOPS_PORT_4: 30.34
  • UOPS_PORT_5: 10.41
  • UOPS_PORT_6: 25.39
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=100 and unroll_count=10

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     c:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    11:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    16:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    1b:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    20:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    25:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 9.2
  • Core cycles: 183.41
  • Reference cycles: 157.63
  • UOPS_EXECUTED.THREAD: 57.11
  • RETIRE_SLOTS: 65.1
  • UOPS_MITE: 1.1
  • UOPS_MS: 64.06
  • UOPS_PORT_0: 10.73
  • UOPS_PORT_1: 10.91
  • UOPS_PORT_2: 9.42
  • UOPS_PORT_3: 6.58
  • UOPS_PORT_4: 30.64
  • UOPS_PORT_5: 10.67
  • UOPS_PORT_6: 25.05
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.1

With additional dependency-breaking instructions (before each instruction)

With unroll_count=100 and no inner loop

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	4d 85 ff             	test   r15,r15
     a:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     f:	4d 85 ff             	test   r15,r15
    12:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    17:	4d 85 ff             	test   r15,r15
    1a:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    1f:	4d 85 ff             	test   r15,r15
    22:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    27:	4d 85 ff             	test   r15,r15
    2a:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    2f:	4d 85 ff             	test   r15,r15
    32:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    37:	4d 85 ff             	test   r15,r15
    3a:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 16.0
  • Core cycles: 183.94
  • Reference cycles: 158.75
  • UOPS_EXECUTED.THREAD: 64.0
  • RETIRE_SLOTS: 72.0
  • UOPS_MITE: 8.0
  • UOPS_MS: 64.0
  • UOPS_PORT_0: 13.13
  • UOPS_PORT_1: 13.59
  • UOPS_PORT_2: 7.84
  • UOPS_PORT_3: 8.16
  • UOPS_PORT_4: 33.71
  • UOPS_PORT_5: 12.99
  • UOPS_PORT_6: 26.11
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	4d 85 ff             	test   r15,r15
     a:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     f:	4d 85 ff             	test   r15,r15
    12:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    17:	4d 85 ff             	test   r15,r15
    1a:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    1f:	4d 85 ff             	test   r15,r15
    22:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    27:	4d 85 ff             	test   r15,r15
    2a:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    2f:	4d 85 ff             	test   r15,r15
    32:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    37:	4d 85 ff             	test   r15,r15
    3a:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 18.0
  • Core cycles: 178.0
  • Reference cycles: 152.95
  • UOPS_EXECUTED.THREAD: 65.01
  • RETIRE_SLOTS: 73.0
  • UOPS_MITE: 9.01
  • UOPS_MS: 64.05
  • UOPS_PORT_0: 12.11
  • UOPS_PORT_1: 12.79
  • UOPS_PORT_2: 8.28
  • UOPS_PORT_3: 7.72
  • UOPS_PORT_4: 30.22
  • UOPS_PORT_5: 13.4
  • UOPS_PORT_6: 26.2
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 9.01

With loop_count=100 and unroll_count=10

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	4d 85 ff             	test   r15,r15
     a:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     f:	4d 85 ff             	test   r15,r15
    12:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    17:	4d 85 ff             	test   r15,r15
    1a:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    1f:	4d 85 ff             	test   r15,r15
    22:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    27:	4d 85 ff             	test   r15,r15
    2a:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    2f:	4d 85 ff             	test   r15,r15
    32:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    37:	4d 85 ff             	test   r15,r15
    3a:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 16.2
  • Core cycles: 183.4
  • Reference cycles: 161.43
  • UOPS_EXECUTED.THREAD: 64.1
  • RETIRE_SLOTS: 72.1
  • UOPS_MITE: 8.11
  • UOPS_MS: 64.04
  • UOPS_PORT_0: 13.25
  • UOPS_PORT_1: 13.53
  • UOPS_PORT_2: 8.65
  • UOPS_PORT_3: 7.35
  • UOPS_PORT_4: 33.71
  • UOPS_PORT_5: 13.08
  • UOPS_PORT_6: 25.96
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.11

With unroll_count=100 and no inner loop

• Code:

     0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
     e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    13:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    18:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    1d:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    22:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
    27:	f0 41 ff 46 20       	lock inc DWORD PTR [r14+0x20]
    2c:	f0 41 ff 46 24       	lock inc DWORD PTR [r14+0x24]
    31:	f0 41 ff 46 28       	lock inc DWORD PTR [r14+0x28]
    36:	f0 41 ff 46 2c       	lock inc DWORD PTR [r14+0x2c]
    3b:	f0 41 ff 46 30       	lock inc DWORD PTR [r14+0x30]
    40:	f0 41 ff 46 34       	lock inc DWORD PTR [r14+0x34]
    45:	f0 41 ff 46 38       	lock inc DWORD PTR [r14+0x38]
    4a:	f0 41 ff 46 3c       	lock inc DWORD PTR [r14+0x3c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 16.0
  • Core cycles: 367.94
  • Reference cycles: 323.75
  • UOPS_EXECUTED.THREAD: 112.0
  • RETIRE_SLOTS: 128.0
  • UOPS_MITE: 0.0
  • UOPS_MS: 128.0
  • UOPS_PORT_0: 20.77
  • UOPS_PORT_1: 21.5
  • UOPS_PORT_2: 16.01
  • UOPS_PORT_3: 15.97
  • UOPS_PORT_4: 61.93
  • UOPS_PORT_5: 18.98
  • UOPS_PORT_6: 47.39
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
     e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    13:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    18:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    1d:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    22:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
    27:	f0 41 ff 46 20       	lock inc DWORD PTR [r14+0x20]
    2c:	f0 41 ff 46 24       	lock inc DWORD PTR [r14+0x24]
    31:	f0 41 ff 46 28       	lock inc DWORD PTR [r14+0x28]
    36:	f0 41 ff 46 2c       	lock inc DWORD PTR [r14+0x2c]
    3b:	f0 41 ff 46 30       	lock inc DWORD PTR [r14+0x30]
    40:	f0 41 ff 46 34       	lock inc DWORD PTR [r14+0x34]
    45:	f0 41 ff 46 38       	lock inc DWORD PTR [r14+0x38]
    4a:	f0 41 ff 46 3c       	lock inc DWORD PTR [r14+0x3c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 18.0
  • Core cycles: 362.0
  • Reference cycles: 318.6
  • UOPS_EXECUTED.THREAD: 113.0
  • RETIRE_SLOTS: 129.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 128.06
  • UOPS_PORT_0: 21.1
  • UOPS_PORT_1: 21.63
  • UOPS_PORT_2: 17.79
  • UOPS_PORT_3: 14.27
  • UOPS_PORT_4: 65.42
  • UOPS_PORT_5: 21.71
  • UOPS_PORT_6: 50.16
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=100 and unroll_count=10

• Code:

     0:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     4:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     9:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
     e:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    13:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    18:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    1d:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    22:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
    27:	f0 41 ff 46 20       	lock inc DWORD PTR [r14+0x20]
    2c:	f0 41 ff 46 24       	lock inc DWORD PTR [r14+0x24]
    31:	f0 41 ff 46 28       	lock inc DWORD PTR [r14+0x28]
    36:	f0 41 ff 46 2c       	lock inc DWORD PTR [r14+0x2c]
    3b:	f0 41 ff 46 30       	lock inc DWORD PTR [r14+0x30]
    40:	f0 41 ff 46 34       	lock inc DWORD PTR [r14+0x34]
    45:	f0 41 ff 46 38       	lock inc DWORD PTR [r14+0x38]
    4a:	f0 41 ff 46 3c       	lock inc DWORD PTR [r14+0x3c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 16.2
  • Core cycles: 367.4
  • Reference cycles: 323.33
  • UOPS_EXECUTED.THREAD: 112.1
  • RETIRE_SLOTS: 128.1
  • UOPS_MITE: 0.1
  • UOPS_MS: 128.05
  • UOPS_PORT_0: 21.12
  • UOPS_PORT_1: 21.98
  • UOPS_PORT_2: 18.16
  • UOPS_PORT_3: 13.84
  • UOPS_PORT_4: 67.22
  • UOPS_PORT_5: 23.73
  • UOPS_PORT_6: 49.55
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.1

With additional dependency-breaking instructions

With unroll_count=100 and no inner loop

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     c:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    11:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    16:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    1b:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    20:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    25:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
    2a:	f0 41 ff 46 20       	lock inc DWORD PTR [r14+0x20]
    2f:	f0 41 ff 46 24       	lock inc DWORD PTR [r14+0x24]
    34:	f0 41 ff 46 28       	lock inc DWORD PTR [r14+0x28]
    39:	f0 41 ff 46 2c       	lock inc DWORD PTR [r14+0x2c]
    3e:	f0 41 ff 46 30       	lock inc DWORD PTR [r14+0x30]
    43:	f0 41 ff 46 34       	lock inc DWORD PTR [r14+0x34]
    48:	f0 41 ff 46 38       	lock inc DWORD PTR [r14+0x38]
    4d:	f0 41 ff 46 3c       	lock inc DWORD PTR [r14+0x3c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 17.0
  • Core cycles: 367.94
  • Reference cycles: 316.25
  • UOPS_EXECUTED.THREAD: 113.0
  • RETIRE_SLOTS: 129.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 128.0
  • UOPS_PORT_0: 21.45
  • UOPS_PORT_1: 21.95
  • UOPS_PORT_2: 17.56
  • UOPS_PORT_3: 14.44
  • UOPS_PORT_4: 66.29
  • UOPS_PORT_5: 22.2
  • UOPS_PORT_6: 49.69
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     c:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    11:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    16:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    1b:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    20:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    25:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
    2a:	f0 41 ff 46 20       	lock inc DWORD PTR [r14+0x20]
    2f:	f0 41 ff 46 24       	lock inc DWORD PTR [r14+0x24]
    34:	f0 41 ff 46 28       	lock inc DWORD PTR [r14+0x28]
    39:	f0 41 ff 46 2c       	lock inc DWORD PTR [r14+0x2c]
    3e:	f0 41 ff 46 30       	lock inc DWORD PTR [r14+0x30]
    43:	f0 41 ff 46 34       	lock inc DWORD PTR [r14+0x34]
    48:	f0 41 ff 46 38       	lock inc DWORD PTR [r14+0x38]
    4d:	f0 41 ff 46 3c       	lock inc DWORD PTR [r14+0x3c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 19.0
  • Core cycles: 362.0
  • Reference cycles: 311.03
  • UOPS_EXECUTED.THREAD: 114.0
  • RETIRE_SLOTS: 130.0
  • UOPS_MITE: 2.0
  • UOPS_MS: 128.05
  • UOPS_PORT_0: 20.6
  • UOPS_PORT_1: 20.39
  • UOPS_PORT_2: 14.76
  • UOPS_PORT_3: 17.24
  • UOPS_PORT_4: 60.12
  • UOPS_PORT_5: 20.66
  • UOPS_PORT_6: 48.75
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=100 and unroll_count=10

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     c:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    11:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    16:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    1b:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    20:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    25:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
    2a:	f0 41 ff 46 20       	lock inc DWORD PTR [r14+0x20]
    2f:	f0 41 ff 46 24       	lock inc DWORD PTR [r14+0x24]
    34:	f0 41 ff 46 28       	lock inc DWORD PTR [r14+0x28]
    39:	f0 41 ff 46 2c       	lock inc DWORD PTR [r14+0x2c]
    3e:	f0 41 ff 46 30       	lock inc DWORD PTR [r14+0x30]
    43:	f0 41 ff 46 34       	lock inc DWORD PTR [r14+0x34]
    48:	f0 41 ff 46 38       	lock inc DWORD PTR [r14+0x38]
    4d:	f0 41 ff 46 3c       	lock inc DWORD PTR [r14+0x3c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 17.2
  • Core cycles: 367.4
  • Reference cycles: 323.33
  • UOPS_EXECUTED.THREAD: 113.11
  • RETIRE_SLOTS: 129.1
  • UOPS_MITE: 1.1
  • UOPS_MS: 128.06
  • UOPS_PORT_0: 21.85
  • UOPS_PORT_1: 22.26
  • UOPS_PORT_2: 18.03
  • UOPS_PORT_3: 13.97
  • UOPS_PORT_4: 66.82
  • UOPS_PORT_5: 22.36
  • UOPS_PORT_6: 49.74
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.1

With additional dependency-breaking instructions (before each instruction)

With unroll_count=100 and no inner loop

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	4d 85 ff             	test   r15,r15
     a:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     f:	4d 85 ff             	test   r15,r15
    12:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    17:	4d 85 ff             	test   r15,r15
    1a:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    1f:	4d 85 ff             	test   r15,r15
    22:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    27:	4d 85 ff             	test   r15,r15
    2a:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    2f:	4d 85 ff             	test   r15,r15
    32:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    37:	4d 85 ff             	test   r15,r15
    3a:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
    3f:	4d 85 ff             	test   r15,r15
    42:	f0 41 ff 46 20       	lock inc DWORD PTR [r14+0x20]
    47:	4d 85 ff             	test   r15,r15
    4a:	f0 41 ff 46 24       	lock inc DWORD PTR [r14+0x24]
    4f:	4d 85 ff             	test   r15,r15
    52:	f0 41 ff 46 28       	lock inc DWORD PTR [r14+0x28]
    57:	4d 85 ff             	test   r15,r15
    5a:	f0 41 ff 46 2c       	lock inc DWORD PTR [r14+0x2c]
    5f:	4d 85 ff             	test   r15,r15
    62:	f0 41 ff 46 30       	lock inc DWORD PTR [r14+0x30]
    67:	4d 85 ff             	test   r15,r15
    6a:	f0 41 ff 46 34       	lock inc DWORD PTR [r14+0x34]
    6f:	4d 85 ff             	test   r15,r15
    72:	f0 41 ff 46 38       	lock inc DWORD PTR [r14+0x38]
    77:	4d 85 ff             	test   r15,r15
    7a:	f0 41 ff 46 3c       	lock inc DWORD PTR [r14+0x3c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 32.0
  • Core cycles: 368.0
  • Reference cycles: 324.25
  • UOPS_EXECUTED.THREAD: 128.0
  • RETIRE_SLOTS: 144.0
  • UOPS_MITE: 16.0
  • UOPS_MS: 128.0
  • UOPS_PORT_0: 26.78
  • UOPS_PORT_1: 26.66
  • UOPS_PORT_2: 17.21
  • UOPS_PORT_3: 14.79
  • UOPS_PORT_4: 67.0
  • UOPS_PORT_5: 25.44
  • UOPS_PORT_6: 52.16
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 16.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	4d 85 ff             	test   r15,r15
     a:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     f:	4d 85 ff             	test   r15,r15
    12:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    17:	4d 85 ff             	test   r15,r15
    1a:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    1f:	4d 85 ff             	test   r15,r15
    22:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    27:	4d 85 ff             	test   r15,r15
    2a:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    2f:	4d 85 ff             	test   r15,r15
    32:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    37:	4d 85 ff             	test   r15,r15
    3a:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
    3f:	4d 85 ff             	test   r15,r15
    42:	f0 41 ff 46 20       	lock inc DWORD PTR [r14+0x20]
    47:	4d 85 ff             	test   r15,r15
    4a:	f0 41 ff 46 24       	lock inc DWORD PTR [r14+0x24]
    4f:	4d 85 ff             	test   r15,r15
    52:	f0 41 ff 46 28       	lock inc DWORD PTR [r14+0x28]
    57:	4d 85 ff             	test   r15,r15
    5a:	f0 41 ff 46 2c       	lock inc DWORD PTR [r14+0x2c]
    5f:	4d 85 ff             	test   r15,r15
    62:	f0 41 ff 46 30       	lock inc DWORD PTR [r14+0x30]
    67:	4d 85 ff             	test   r15,r15
    6a:	f0 41 ff 46 34       	lock inc DWORD PTR [r14+0x34]
    6f:	4d 85 ff             	test   r15,r15
    72:	f0 41 ff 46 38       	lock inc DWORD PTR [r14+0x38]
    77:	4d 85 ff             	test   r15,r15
    7a:	f0 41 ff 46 3c       	lock inc DWORD PTR [r14+0x3c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 34.0
  • Core cycles: 362.0
  • Reference cycles: 318.6
  • UOPS_EXECUTED.THREAD: 129.36
  • RETIRE_SLOTS: 145.11
  • UOPS_MITE: 17.06
  • UOPS_MS: 128.61
  • UOPS_PORT_0: 25.43
  • UOPS_PORT_1: 26.93
  • UOPS_PORT_2: 17.62
  • UOPS_PORT_3: 14.38
  • UOPS_PORT_4: 65.31
  • UOPS_PORT_5: 26.56
  • UOPS_PORT_6: 51.42
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 17.01

With loop_count=100 and unroll_count=10

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 41 ff 06          	lock inc DWORD PTR [r14]
     7:	4d 85 ff             	test   r15,r15
     a:	f0 41 ff 46 04       	lock inc DWORD PTR [r14+0x4]
     f:	4d 85 ff             	test   r15,r15
    12:	f0 41 ff 46 08       	lock inc DWORD PTR [r14+0x8]
    17:	4d 85 ff             	test   r15,r15
    1a:	f0 41 ff 46 0c       	lock inc DWORD PTR [r14+0xc]
    1f:	4d 85 ff             	test   r15,r15
    22:	f0 41 ff 46 10       	lock inc DWORD PTR [r14+0x10]
    27:	4d 85 ff             	test   r15,r15
    2a:	f0 41 ff 46 14       	lock inc DWORD PTR [r14+0x14]
    2f:	4d 85 ff             	test   r15,r15
    32:	f0 41 ff 46 18       	lock inc DWORD PTR [r14+0x18]
    37:	4d 85 ff             	test   r15,r15
    3a:	f0 41 ff 46 1c       	lock inc DWORD PTR [r14+0x1c]
    3f:	4d 85 ff             	test   r15,r15
    42:	f0 41 ff 46 20       	lock inc DWORD PTR [r14+0x20]
    47:	4d 85 ff             	test   r15,r15
    4a:	f0 41 ff 46 24       	lock inc DWORD PTR [r14+0x24]
    4f:	4d 85 ff             	test   r15,r15
    52:	f0 41 ff 46 28       	lock inc DWORD PTR [r14+0x28]
    57:	4d 85 ff             	test   r15,r15
    5a:	f0 41 ff 46 2c       	lock inc DWORD PTR [r14+0x2c]
    5f:	4d 85 ff             	test   r15,r15
    62:	f0 41 ff 46 30       	lock inc DWORD PTR [r14+0x30]
    67:	4d 85 ff             	test   r15,r15
    6a:	f0 41 ff 46 34       	lock inc DWORD PTR [r14+0x34]
    6f:	4d 85 ff             	test   r15,r15
    72:	f0 41 ff 46 38       	lock inc DWORD PTR [r14+0x38]
    77:	4d 85 ff             	test   r15,r15
    7a:	f0 41 ff 46 3c       	lock inc DWORD PTR [r14+0x3c]
  

• Show nanoBench command
• Results:
  • Instructions retired: 32.2
  • Core cycles: 367.4
  • Reference cycles: 323.35
  • UOPS_EXECUTED.THREAD: 128.1
  • RETIRE_SLOTS: 144.1
  • UOPS_MITE: 16.11
  • UOPS_MS: 128.05
  • UOPS_PORT_0: 26.31
  • UOPS_PORT_1: 27.01
  • UOPS_PORT_2: 17.26
  • UOPS_PORT_3: 14.75
  • UOPS_PORT_4: 67.02
  • UOPS_PORT_5: 25.63
  • UOPS_PORT_6: 52.16
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 16.11

With unroll_count=500 and no inner loop

• Code:

     0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 18.01
  • Reference cycles: 15.5
  • UOPS_EXECUTED.THREAD: 7.0
  • RETIRE_SLOTS: 8.0
  • UOPS_MITE: 0.0
  • UOPS_MS: 8.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.93
  • UOPS_PORT_2: 1.0
  • UOPS_PORT_3: 0.99
  • UOPS_PORT_4: 2.5
  • UOPS_PORT_5: 0.8
  • UOPS_PORT_6: 2.67
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     5:	90                   	nop
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 18.01
  • Reference cycles: 15.8
  • UOPS_EXECUTED.THREAD: 7.0
  • RETIRE_SLOTS: 9.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 8.0
  • UOPS_PORT_0: 0.77
  • UOPS_PORT_1: 0.87
  • UOPS_PORT_2: 0.8
  • UOPS_PORT_3: 1.2
  • UOPS_PORT_4: 2.18
  • UOPS_PORT_5: 0.87
  • UOPS_PORT_6: 2.67
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 18.0
  • Reference cycles: 15.84
  • UOPS_EXECUTED.THREAD: 7.1
  • RETIRE_SLOTS: 8.1
  • UOPS_MITE: 0.1
  • UOPS_MS: 8.01
  • UOPS_PORT_0: 0.85
  • UOPS_PORT_1: 0.85
  • UOPS_PORT_2: 1.13
  • UOPS_PORT_3: 0.87
  • UOPS_PORT_4: 2.12
  • UOPS_PORT_5: 0.85
  • UOPS_PORT_6: 2.77
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.1

With loop_count=100 and unroll_count=100

• Code:

     0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 18.0
  • Reference cycles: 15.84
  • UOPS_EXECUTED.THREAD: 7.01
  • RETIRE_SLOTS: 8.01
  • UOPS_MITE: 0.01
  • UOPS_MS: 8.01
  • UOPS_PORT_0: 0.79
  • UOPS_PORT_1: 0.84
  • UOPS_PORT_2: 1.14
  • UOPS_PORT_3: 0.86
  • UOPS_PORT_4: 2.32
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 2.71
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With additional dependency-breaking instructions

With unroll_count=500 and no inner loop

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 18.01
  • Reference cycles: 15.85
  • UOPS_EXECUTED.THREAD: 8.0
  • RETIRE_SLOTS: 9.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 8.0
  • UOPS_PORT_0: 1.14
  • UOPS_PORT_1: 1.15
  • UOPS_PORT_2: 1.07
  • UOPS_PORT_3: 0.93
  • UOPS_PORT_4: 2.2
  • UOPS_PORT_5: 1.07
  • UOPS_PORT_6: 2.85
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 2.2
  • Core cycles: 18.01
  • Reference cycles: 15.85
  • UOPS_EXECUTED.THREAD: 8.1
  • RETIRE_SLOTS: 9.1
  • UOPS_MITE: 1.1
  • UOPS_MS: 8.0
  • UOPS_PORT_0: 1.09
  • UOPS_PORT_1: 1.18
  • UOPS_PORT_2: 1.05
  • UOPS_PORT_3: 0.95
  • UOPS_PORT_4: 2.16
  • UOPS_PORT_5: 1.21
  • UOPS_PORT_6: 2.83
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.1

With loop_count=100 and unroll_count=100

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 2.02
  • Core cycles: 18.0
  • Reference cycles: 15.84
  • UOPS_EXECUTED.THREAD: 8.01
  • RETIRE_SLOTS: 9.01
  • UOPS_MITE: 1.01
  • UOPS_MS: 8.0
  • UOPS_PORT_0: 1.15
  • UOPS_PORT_1: 1.18
  • UOPS_PORT_2: 1.08
  • UOPS_PORT_3: 0.92
  • UOPS_PORT_4: 2.16
  • UOPS_PORT_5: 1.01
  • UOPS_PORT_6: 2.83
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.01

With unroll_count=200 and no inner loop

• Code:

     0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 92.0
  • Reference cycles: 79.25
  • UOPS_EXECUTED.THREAD: 28.0
  • RETIRE_SLOTS: 32.0
  • UOPS_MITE: 0.0
  • UOPS_MS: 32.0
  • UOPS_PORT_0: 5.79
  • UOPS_PORT_1: 5.65
  • UOPS_PORT_2: 4.01
  • UOPS_PORT_3: 3.99
  • UOPS_PORT_4: 17.43
  • UOPS_PORT_5: 5.34
  • UOPS_PORT_6: 12.29
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 89.0
  • Reference cycles: 76.48
  • UOPS_EXECUTED.THREAD: 28.5
  • RETIRE_SLOTS: 32.5
  • UOPS_MITE: 0.5
  • UOPS_MS: 32.02
  • UOPS_PORT_0: 5.09
  • UOPS_PORT_1: 5.18
  • UOPS_PORT_2: 4.46
  • UOPS_PORT_3: 3.54
  • UOPS_PORT_4: 15.18
  • UOPS_PORT_5: 5.19
  • UOPS_PORT_6: 12.76
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.5

With loop_count=100 and unroll_count=20

• Code:

     0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 91.7
  • Reference cycles: 80.73
  • UOPS_EXECUTED.THREAD: 28.05
  • RETIRE_SLOTS: 32.05
  • UOPS_MITE: 0.05
  • UOPS_MS: 32.02
  • UOPS_PORT_0: 5.36
  • UOPS_PORT_1: 5.52
  • UOPS_PORT_2: 4.54
  • UOPS_PORT_3: 3.46
  • UOPS_PORT_4: 17.04
  • UOPS_PORT_5: 5.91
  • UOPS_PORT_6: 12.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.05

With additional dependency-breaking instructions

With unroll_count=200 and no inner loop

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     e:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    14:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 92.0
  • Reference cycles: 80.88
  • UOPS_EXECUTED.THREAD: 29.0
  • RETIRE_SLOTS: 33.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 32.0
  • UOPS_PORT_0: 5.27
  • UOPS_PORT_1: 5.29
  • UOPS_PORT_2: 3.74
  • UOPS_PORT_3: 4.26
  • UOPS_PORT_4: 15.79
  • UOPS_PORT_5: 5.47
  • UOPS_PORT_6: 13.05
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     e:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    14:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 89.0
  • Reference cycles: 78.35
  • UOPS_EXECUTED.THREAD: 29.55
  • RETIRE_SLOTS: 33.51
  • UOPS_MITE: 1.5
  • UOPS_MS: 32.1
  • UOPS_PORT_0: 5.36
  • UOPS_PORT_1: 5.68
  • UOPS_PORT_2: 4.55
  • UOPS_PORT_3: 3.45
  • UOPS_PORT_4: 15.86
  • UOPS_PORT_5: 5.68
  • UOPS_PORT_6: 12.83
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.5

With loop_count=100 and unroll_count=20

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     e:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    14:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 5.1
  • Core cycles: 91.7
  • Reference cycles: 80.71
  • UOPS_EXECUTED.THREAD: 29.05
  • RETIRE_SLOTS: 33.05
  • UOPS_MITE: 1.05
  • UOPS_MS: 32.02
  • UOPS_PORT_0: 5.26
  • UOPS_PORT_1: 5.34
  • UOPS_PORT_2: 4.64
  • UOPS_PORT_3: 3.36
  • UOPS_PORT_4: 15.99
  • UOPS_PORT_5: 5.49
  • UOPS_PORT_6: 13.16
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.05

With additional dependency-breaking instructions (before each instruction)

With unroll_count=200 and no inner loop

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	4d 85 ff             	test   r15,r15
     b:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
    11:	4d 85 ff             	test   r15,r15
    14:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    1a:	4d 85 ff             	test   r15,r15
    1d:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 91.99
  • Reference cycles: 79.38
  • UOPS_EXECUTED.THREAD: 32.0
  • RETIRE_SLOTS: 36.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 32.0
  • UOPS_PORT_0: 6.5
  • UOPS_PORT_1: 6.79
  • UOPS_PORT_2: 5.03
  • UOPS_PORT_3: 2.96
  • UOPS_PORT_4: 16.86
  • UOPS_PORT_5: 6.42
  • UOPS_PORT_6: 13.05
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	4d 85 ff             	test   r15,r15
     b:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
    11:	4d 85 ff             	test   r15,r15
    14:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    1a:	4d 85 ff             	test   r15,r15
    1d:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 9.0
  • Core cycles: 89.0
  • Reference cycles: 76.48
  • UOPS_EXECUTED.THREAD: 32.5
  • RETIRE_SLOTS: 36.5
  • UOPS_MITE: 4.5
  • UOPS_MS: 32.02
  • UOPS_PORT_0: 6.03
  • UOPS_PORT_1: 6.43
  • UOPS_PORT_2: 4.14
  • UOPS_PORT_3: 3.86
  • UOPS_PORT_4: 15.12
  • UOPS_PORT_5: 6.71
  • UOPS_PORT_6: 13.11
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.5

With loop_count=100 and unroll_count=20

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	4d 85 ff             	test   r15,r15
     b:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
    11:	4d 85 ff             	test   r15,r15
    14:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    1a:	4d 85 ff             	test   r15,r15
    1d:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 8.1
  • Core cycles: 91.7
  • Reference cycles: 80.73
  • UOPS_EXECUTED.THREAD: 32.05
  • RETIRE_SLOTS: 36.05
  • UOPS_MITE: 4.05
  • UOPS_MS: 32.02
  • UOPS_PORT_0: 6.6
  • UOPS_PORT_1: 6.79
  • UOPS_PORT_2: 4.33
  • UOPS_PORT_3: 3.67
  • UOPS_PORT_4: 16.84
  • UOPS_PORT_5: 6.5
  • UOPS_PORT_6: 12.98
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.05

With unroll_count=100 and no inner loop

• Code:

     0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    17:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    1d:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    23:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    29:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 183.99
  • Reference cycles: 161.75
  • UOPS_EXECUTED.THREAD: 56.0
  • RETIRE_SLOTS: 64.0
  • UOPS_MITE: 0.0
  • UOPS_MS: 64.0
  • UOPS_PORT_0: 10.38
  • UOPS_PORT_1: 10.84
  • UOPS_PORT_2: 8.02
  • UOPS_PORT_3: 7.98
  • UOPS_PORT_4: 30.75
  • UOPS_PORT_5: 8.93
  • UOPS_PORT_6: 23.78
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    17:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    1d:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    23:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    29:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 178.01
  • Reference cycles: 156.68
  • UOPS_EXECUTED.THREAD: 57.0
  • RETIRE_SLOTS: 65.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 64.05
  • UOPS_PORT_0: 10.18
  • UOPS_PORT_1: 10.34
  • UOPS_PORT_2: 8.91
  • UOPS_PORT_3: 7.09
  • UOPS_PORT_4: 30.07
  • UOPS_PORT_5: 10.27
  • UOPS_PORT_6: 25.49
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=100 and unroll_count=10

• Code:

     0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    17:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    1d:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    23:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    29:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 183.41
  • Reference cycles: 161.45
  • UOPS_EXECUTED.THREAD: 56.1
  • RETIRE_SLOTS: 64.1
  • UOPS_MITE: 0.1
  • UOPS_MS: 64.05
  • UOPS_PORT_0: 10.55
  • UOPS_PORT_1: 10.96
  • UOPS_PORT_2: 9.07
  • UOPS_PORT_3: 6.93
  • UOPS_PORT_4: 33.57
  • UOPS_PORT_5: 11.73
  • UOPS_PORT_6: 24.88
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.1

With additional dependency-breaking instructions

With unroll_count=100 and no inner loop

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     e:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    14:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    1a:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    20:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    26:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    2c:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 9.0
  • Core cycles: 184.0
  • Reference cycles: 162.0
  • UOPS_EXECUTED.THREAD: 57.0
  • RETIRE_SLOTS: 65.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 64.0
  • UOPS_PORT_0: 10.6
  • UOPS_PORT_1: 10.91
  • UOPS_PORT_2: 8.88
  • UOPS_PORT_3: 7.12
  • UOPS_PORT_4: 31.02
  • UOPS_PORT_5: 10.87
  • UOPS_PORT_6: 24.87
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     e:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    14:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    1a:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    20:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    26:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    2c:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 11.0
  • Core cycles: 178.01
  • Reference cycles: 152.95
  • UOPS_EXECUTED.THREAD: 58.0
  • RETIRE_SLOTS: 66.0
  • UOPS_MITE: 2.0
  • UOPS_MS: 64.06
  • UOPS_PORT_0: 10.9
  • UOPS_PORT_1: 9.78
  • UOPS_PORT_2: 7.5
  • UOPS_PORT_3: 8.5
  • UOPS_PORT_4: 30.48
  • UOPS_PORT_5: 10.44
  • UOPS_PORT_6: 25.37
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=100 and unroll_count=10

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     e:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    14:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    1a:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    20:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    26:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    2c:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 9.2
  • Core cycles: 183.41
  • Reference cycles: 157.63
  • UOPS_EXECUTED.THREAD: 57.11
  • RETIRE_SLOTS: 65.1
  • UOPS_MITE: 1.1
  • UOPS_MS: 64.05
  • UOPS_PORT_0: 10.76
  • UOPS_PORT_1: 10.92
  • UOPS_PORT_2: 9.42
  • UOPS_PORT_3: 6.58
  • UOPS_PORT_4: 31.2
  • UOPS_PORT_5: 10.91
  • UOPS_PORT_6: 25.06
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.1

With additional dependency-breaking instructions (before each instruction)

With unroll_count=100 and no inner loop

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	4d 85 ff             	test   r15,r15
     b:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
    11:	4d 85 ff             	test   r15,r15
    14:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    1a:	4d 85 ff             	test   r15,r15
    1d:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    23:	4d 85 ff             	test   r15,r15
    26:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    2c:	4d 85 ff             	test   r15,r15
    2f:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    35:	4d 85 ff             	test   r15,r15
    38:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    3e:	4d 85 ff             	test   r15,r15
    41:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 16.0
  • Core cycles: 183.94
  • Reference cycles: 161.75
  • UOPS_EXECUTED.THREAD: 64.0
  • RETIRE_SLOTS: 72.0
  • UOPS_MITE: 8.0
  • UOPS_MS: 64.0
  • UOPS_PORT_0: 13.12
  • UOPS_PORT_1: 13.45
  • UOPS_PORT_2: 9.32
  • UOPS_PORT_3: 6.67
  • UOPS_PORT_4: 33.7
  • UOPS_PORT_5: 12.99
  • UOPS_PORT_6: 26.2
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	4d 85 ff             	test   r15,r15
     b:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
    11:	4d 85 ff             	test   r15,r15
    14:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    1a:	4d 85 ff             	test   r15,r15
    1d:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    23:	4d 85 ff             	test   r15,r15
    26:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    2c:	4d 85 ff             	test   r15,r15
    2f:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    35:	4d 85 ff             	test   r15,r15
    38:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    3e:	4d 85 ff             	test   r15,r15
    41:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 18.0
  • Core cycles: 178.0
  • Reference cycles: 156.65
  • UOPS_EXECUTED.THREAD: 65.01
  • RETIRE_SLOTS: 73.0
  • UOPS_MITE: 9.01
  • UOPS_MS: 64.05
  • UOPS_PORT_0: 12.08
  • UOPS_PORT_1: 12.84
  • UOPS_PORT_2: 8.28
  • UOPS_PORT_3: 7.72
  • UOPS_PORT_4: 30.22
  • UOPS_PORT_5: 13.34
  • UOPS_PORT_6: 26.22
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 9.01

With loop_count=100 and unroll_count=10

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	4d 85 ff             	test   r15,r15
     b:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
    11:	4d 85 ff             	test   r15,r15
    14:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    1a:	4d 85 ff             	test   r15,r15
    1d:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    23:	4d 85 ff             	test   r15,r15
    26:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    2c:	4d 85 ff             	test   r15,r15
    2f:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    35:	4d 85 ff             	test   r15,r15
    38:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    3e:	4d 85 ff             	test   r15,r15
    41:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 16.2
  • Core cycles: 183.4
  • Reference cycles: 161.4
  • UOPS_EXECUTED.THREAD: 64.1
  • RETIRE_SLOTS: 72.1
  • UOPS_MITE: 8.11
  • UOPS_MS: 64.05
  • UOPS_PORT_0: 13.23
  • UOPS_PORT_1: 13.59
  • UOPS_PORT_2: 8.6
  • UOPS_PORT_3: 7.39
  • UOPS_PORT_4: 33.69
  • UOPS_PORT_5: 13.05
  • UOPS_PORT_6: 25.96
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.11

With unroll_count=100 and no inner loop

• Code:

     0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    17:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    1d:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    23:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    29:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
    2f:	f0 43 ff 44 2e 20    	lock inc DWORD PTR [r14+r13*1+0x20]
    35:	f0 43 ff 44 2e 24    	lock inc DWORD PTR [r14+r13*1+0x24]
    3b:	f0 43 ff 44 2e 28    	lock inc DWORD PTR [r14+r13*1+0x28]
    41:	f0 43 ff 44 2e 2c    	lock inc DWORD PTR [r14+r13*1+0x2c]
    47:	f0 43 ff 44 2e 30    	lock inc DWORD PTR [r14+r13*1+0x30]
    4d:	f0 43 ff 44 2e 34    	lock inc DWORD PTR [r14+r13*1+0x34]
    53:	f0 43 ff 44 2e 38    	lock inc DWORD PTR [r14+r13*1+0x38]
    59:	f0 43 ff 44 2e 3c    	lock inc DWORD PTR [r14+r13*1+0x3c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 16.0
  • Core cycles: 368.0
  • Reference cycles: 323.75
  • UOPS_EXECUTED.THREAD: 112.0
  • RETIRE_SLOTS: 128.0
  • UOPS_MITE: 0.0
  • UOPS_MS: 128.0
  • UOPS_PORT_0: 20.19
  • UOPS_PORT_1: 21.62
  • UOPS_PORT_2: 14.7
  • UOPS_PORT_3: 17.28
  • UOPS_PORT_4: 61.48
  • UOPS_PORT_5: 17.32
  • UOPS_PORT_6: 48.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    17:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    1d:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    23:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    29:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
    2f:	f0 43 ff 44 2e 20    	lock inc DWORD PTR [r14+r13*1+0x20]
    35:	f0 43 ff 44 2e 24    	lock inc DWORD PTR [r14+r13*1+0x24]
    3b:	f0 43 ff 44 2e 28    	lock inc DWORD PTR [r14+r13*1+0x28]
    41:	f0 43 ff 44 2e 2c    	lock inc DWORD PTR [r14+r13*1+0x2c]
    47:	f0 43 ff 44 2e 30    	lock inc DWORD PTR [r14+r13*1+0x30]
    4d:	f0 43 ff 44 2e 34    	lock inc DWORD PTR [r14+r13*1+0x34]
    53:	f0 43 ff 44 2e 38    	lock inc DWORD PTR [r14+r13*1+0x38]
    59:	f0 43 ff 44 2e 3c    	lock inc DWORD PTR [r14+r13*1+0x3c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 18.0
  • Core cycles: 362.01
  • Reference cycles: 318.65
  • UOPS_EXECUTED.THREAD: 113.01
  • RETIRE_SLOTS: 129.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 128.06
  • UOPS_PORT_0: 21.31
  • UOPS_PORT_1: 21.85
  • UOPS_PORT_2: 17.53
  • UOPS_PORT_3: 14.48
  • UOPS_PORT_4: 66.16
  • UOPS_PORT_5: 21.9
  • UOPS_PORT_6: 50.11
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=100 and unroll_count=10

• Code:

     0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     5:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     b:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    11:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    17:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    1d:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    23:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    29:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
    2f:	f0 43 ff 44 2e 20    	lock inc DWORD PTR [r14+r13*1+0x20]
    35:	f0 43 ff 44 2e 24    	lock inc DWORD PTR [r14+r13*1+0x24]
    3b:	f0 43 ff 44 2e 28    	lock inc DWORD PTR [r14+r13*1+0x28]
    41:	f0 43 ff 44 2e 2c    	lock inc DWORD PTR [r14+r13*1+0x2c]
    47:	f0 43 ff 44 2e 30    	lock inc DWORD PTR [r14+r13*1+0x30]
    4d:	f0 43 ff 44 2e 34    	lock inc DWORD PTR [r14+r13*1+0x34]
    53:	f0 43 ff 44 2e 38    	lock inc DWORD PTR [r14+r13*1+0x38]
    59:	f0 43 ff 44 2e 3c    	lock inc DWORD PTR [r14+r13*1+0x3c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 16.2
  • Core cycles: 367.4
  • Reference cycles: 315.7
  • UOPS_EXECUTED.THREAD: 112.1
  • RETIRE_SLOTS: 128.1
  • UOPS_MITE: 0.1
  • UOPS_MS: 128.05
  • UOPS_PORT_0: 20.96
  • UOPS_PORT_1: 22.06
  • UOPS_PORT_2: 18.18
  • UOPS_PORT_3: 13.84
  • UOPS_PORT_4: 67.09
  • UOPS_PORT_5: 23.71
  • UOPS_PORT_6: 49.35
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.1

With additional dependency-breaking instructions

With unroll_count=100 and no inner loop

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     e:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    14:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    1a:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    20:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    26:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    2c:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
    32:	f0 43 ff 44 2e 20    	lock inc DWORD PTR [r14+r13*1+0x20]
    38:	f0 43 ff 44 2e 24    	lock inc DWORD PTR [r14+r13*1+0x24]
    3e:	f0 43 ff 44 2e 28    	lock inc DWORD PTR [r14+r13*1+0x28]
    44:	f0 43 ff 44 2e 2c    	lock inc DWORD PTR [r14+r13*1+0x2c]
    4a:	f0 43 ff 44 2e 30    	lock inc DWORD PTR [r14+r13*1+0x30]
    50:	f0 43 ff 44 2e 34    	lock inc DWORD PTR [r14+r13*1+0x34]
    56:	f0 43 ff 44 2e 38    	lock inc DWORD PTR [r14+r13*1+0x38]
    5c:	f0 43 ff 44 2e 3c    	lock inc DWORD PTR [r14+r13*1+0x3c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 17.0
  • Core cycles: 367.94
  • Reference cycles: 323.75
  • UOPS_EXECUTED.THREAD: 113.0
  • RETIRE_SLOTS: 129.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 128.0
  • UOPS_PORT_0: 21.82
  • UOPS_PORT_1: 22.11
  • UOPS_PORT_2: 17.87
  • UOPS_PORT_3: 14.11
  • UOPS_PORT_4: 67.01
  • UOPS_PORT_5: 22.54
  • UOPS_PORT_6: 49.65
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     e:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    14:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    1a:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    20:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    26:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    2c:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
    32:	f0 43 ff 44 2e 20    	lock inc DWORD PTR [r14+r13*1+0x20]
    38:	f0 43 ff 44 2e 24    	lock inc DWORD PTR [r14+r13*1+0x24]
    3e:	f0 43 ff 44 2e 28    	lock inc DWORD PTR [r14+r13*1+0x28]
    44:	f0 43 ff 44 2e 2c    	lock inc DWORD PTR [r14+r13*1+0x2c]
    4a:	f0 43 ff 44 2e 30    	lock inc DWORD PTR [r14+r13*1+0x30]
    50:	f0 43 ff 44 2e 34    	lock inc DWORD PTR [r14+r13*1+0x34]
    56:	f0 43 ff 44 2e 38    	lock inc DWORD PTR [r14+r13*1+0x38]
    5c:	f0 43 ff 44 2e 3c    	lock inc DWORD PTR [r14+r13*1+0x3c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 19.0
  • Core cycles: 362.0
  • Reference cycles: 318.6
  • UOPS_EXECUTED.THREAD: 114.0
  • RETIRE_SLOTS: 130.01
  • UOPS_MITE: 2.0
  • UOPS_MS: 128.05
  • UOPS_PORT_0: 20.62
  • UOPS_PORT_1: 20.41
  • UOPS_PORT_2: 14.82
  • UOPS_PORT_3: 17.18
  • UOPS_PORT_4: 60.57
  • UOPS_PORT_5: 20.9
  • UOPS_PORT_6: 48.65
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=100 and unroll_count=10

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
     e:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    14:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    1a:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    20:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    26:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    2c:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
    32:	f0 43 ff 44 2e 20    	lock inc DWORD PTR [r14+r13*1+0x20]
    38:	f0 43 ff 44 2e 24    	lock inc DWORD PTR [r14+r13*1+0x24]
    3e:	f0 43 ff 44 2e 28    	lock inc DWORD PTR [r14+r13*1+0x28]
    44:	f0 43 ff 44 2e 2c    	lock inc DWORD PTR [r14+r13*1+0x2c]
    4a:	f0 43 ff 44 2e 30    	lock inc DWORD PTR [r14+r13*1+0x30]
    50:	f0 43 ff 44 2e 34    	lock inc DWORD PTR [r14+r13*1+0x34]
    56:	f0 43 ff 44 2e 38    	lock inc DWORD PTR [r14+r13*1+0x38]
    5c:	f0 43 ff 44 2e 3c    	lock inc DWORD PTR [r14+r13*1+0x3c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 17.2
  • Core cycles: 367.4
  • Reference cycles: 323.33
  • UOPS_EXECUTED.THREAD: 113.11
  • RETIRE_SLOTS: 129.1
  • UOPS_MITE: 1.1
  • UOPS_MS: 128.06
  • UOPS_PORT_0: 21.71
  • UOPS_PORT_1: 21.96
  • UOPS_PORT_2: 17.74
  • UOPS_PORT_3: 14.27
  • UOPS_PORT_4: 66.06
  • UOPS_PORT_5: 22.08
  • UOPS_PORT_6: 49.83
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.1

With additional dependency-breaking instructions (before each instruction)

With unroll_count=100 and no inner loop

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	4d 85 ff             	test   r15,r15
     b:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
    11:	4d 85 ff             	test   r15,r15
    14:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    1a:	4d 85 ff             	test   r15,r15
    1d:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    23:	4d 85 ff             	test   r15,r15
    26:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    2c:	4d 85 ff             	test   r15,r15
    2f:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    35:	4d 85 ff             	test   r15,r15
    38:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    3e:	4d 85 ff             	test   r15,r15
    41:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
    47:	4d 85 ff             	test   r15,r15
    4a:	f0 43 ff 44 2e 20    	lock inc DWORD PTR [r14+r13*1+0x20]
    50:	4d 85 ff             	test   r15,r15
    53:	f0 43 ff 44 2e 24    	lock inc DWORD PTR [r14+r13*1+0x24]
    59:	4d 85 ff             	test   r15,r15
    5c:	f0 43 ff 44 2e 28    	lock inc DWORD PTR [r14+r13*1+0x28]
    62:	4d 85 ff             	test   r15,r15
    65:	f0 43 ff 44 2e 2c    	lock inc DWORD PTR [r14+r13*1+0x2c]
    6b:	4d 85 ff             	test   r15,r15
    6e:	f0 43 ff 44 2e 30    	lock inc DWORD PTR [r14+r13*1+0x30]
    74:	4d 85 ff             	test   r15,r15
    77:	f0 43 ff 44 2e 34    	lock inc DWORD PTR [r14+r13*1+0x34]
    7d:	4d 85 ff             	test   r15,r15
    80:	f0 43 ff 44 2e 38    	lock inc DWORD PTR [r14+r13*1+0x38]
    86:	4d 85 ff             	test   r15,r15
    89:	f0 43 ff 44 2e 3c    	lock inc DWORD PTR [r14+r13*1+0x3c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 32.0
  • Core cycles: 367.94
  • Reference cycles: 323.75
  • UOPS_EXECUTED.THREAD: 128.0
  • RETIRE_SLOTS: 144.0
  • UOPS_MITE: 16.0
  • UOPS_MS: 128.0
  • UOPS_PORT_0: 26.33
  • UOPS_PORT_1: 26.67
  • UOPS_PORT_2: 15.65
  • UOPS_PORT_3: 16.35
  • UOPS_PORT_4: 66.89
  • UOPS_PORT_5: 25.65
  • UOPS_PORT_6: 52.2
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 16.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	4d 85 ff             	test   r15,r15
     b:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
    11:	4d 85 ff             	test   r15,r15
    14:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    1a:	4d 85 ff             	test   r15,r15
    1d:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    23:	4d 85 ff             	test   r15,r15
    26:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    2c:	4d 85 ff             	test   r15,r15
    2f:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    35:	4d 85 ff             	test   r15,r15
    38:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    3e:	4d 85 ff             	test   r15,r15
    41:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
    47:	4d 85 ff             	test   r15,r15
    4a:	f0 43 ff 44 2e 20    	lock inc DWORD PTR [r14+r13*1+0x20]
    50:	4d 85 ff             	test   r15,r15
    53:	f0 43 ff 44 2e 24    	lock inc DWORD PTR [r14+r13*1+0x24]
    59:	4d 85 ff             	test   r15,r15
    5c:	f0 43 ff 44 2e 28    	lock inc DWORD PTR [r14+r13*1+0x28]
    62:	4d 85 ff             	test   r15,r15
    65:	f0 43 ff 44 2e 2c    	lock inc DWORD PTR [r14+r13*1+0x2c]
    6b:	4d 85 ff             	test   r15,r15
    6e:	f0 43 ff 44 2e 30    	lock inc DWORD PTR [r14+r13*1+0x30]
    74:	4d 85 ff             	test   r15,r15
    77:	f0 43 ff 44 2e 34    	lock inc DWORD PTR [r14+r13*1+0x34]
    7d:	4d 85 ff             	test   r15,r15
    80:	f0 43 ff 44 2e 38    	lock inc DWORD PTR [r14+r13*1+0x38]
    86:	4d 85 ff             	test   r15,r15
    89:	f0 43 ff 44 2e 3c    	lock inc DWORD PTR [r14+r13*1+0x3c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 34.0
  • Core cycles: 362.0
  • Reference cycles: 318.58
  • UOPS_EXECUTED.THREAD: 129.01
  • RETIRE_SLOTS: 145.0
  • UOPS_MITE: 17.01
  • UOPS_MS: 128.05
  • UOPS_PORT_0: 25.37
  • UOPS_PORT_1: 26.93
  • UOPS_PORT_2: 17.28
  • UOPS_PORT_3: 14.72
  • UOPS_PORT_4: 65.32
  • UOPS_PORT_5: 26.55
  • UOPS_PORT_6: 51.46
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 17.01

With loop_count=100 and unroll_count=10

• Code:

     0:	4d 85 ff             	test   r15,r15
     3:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]
     8:	4d 85 ff             	test   r15,r15
     b:	f0 43 ff 44 2e 04    	lock inc DWORD PTR [r14+r13*1+0x4]
    11:	4d 85 ff             	test   r15,r15
    14:	f0 43 ff 44 2e 08    	lock inc DWORD PTR [r14+r13*1+0x8]
    1a:	4d 85 ff             	test   r15,r15
    1d:	f0 43 ff 44 2e 0c    	lock inc DWORD PTR [r14+r13*1+0xc]
    23:	4d 85 ff             	test   r15,r15
    26:	f0 43 ff 44 2e 10    	lock inc DWORD PTR [r14+r13*1+0x10]
    2c:	4d 85 ff             	test   r15,r15
    2f:	f0 43 ff 44 2e 14    	lock inc DWORD PTR [r14+r13*1+0x14]
    35:	4d 85 ff             	test   r15,r15
    38:	f0 43 ff 44 2e 18    	lock inc DWORD PTR [r14+r13*1+0x18]
    3e:	4d 85 ff             	test   r15,r15
    41:	f0 43 ff 44 2e 1c    	lock inc DWORD PTR [r14+r13*1+0x1c]
    47:	4d 85 ff             	test   r15,r15
    4a:	f0 43 ff 44 2e 20    	lock inc DWORD PTR [r14+r13*1+0x20]
    50:	4d 85 ff             	test   r15,r15
    53:	f0 43 ff 44 2e 24    	lock inc DWORD PTR [r14+r13*1+0x24]
    59:	4d 85 ff             	test   r15,r15
    5c:	f0 43 ff 44 2e 28    	lock inc DWORD PTR [r14+r13*1+0x28]
    62:	4d 85 ff             	test   r15,r15
    65:	f0 43 ff 44 2e 2c    	lock inc DWORD PTR [r14+r13*1+0x2c]
    6b:	4d 85 ff             	test   r15,r15
    6e:	f0 43 ff 44 2e 30    	lock inc DWORD PTR [r14+r13*1+0x30]
    74:	4d 85 ff             	test   r15,r15
    77:	f0 43 ff 44 2e 34    	lock inc DWORD PTR [r14+r13*1+0x34]
    7d:	4d 85 ff             	test   r15,r15
    80:	f0 43 ff 44 2e 38    	lock inc DWORD PTR [r14+r13*1+0x38]
    86:	4d 85 ff             	test   r15,r15
    89:	f0 43 ff 44 2e 3c    	lock inc DWORD PTR [r14+r13*1+0x3c]
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 32.2
  • Core cycles: 367.4
  • Reference cycles: 315.68
  • UOPS_EXECUTED.THREAD: 128.1
  • RETIRE_SLOTS: 144.1
  • UOPS_MITE: 16.11
  • UOPS_MS: 128.05
  • UOPS_PORT_0: 26.34
  • UOPS_PORT_1: 26.98
  • UOPS_PORT_2: 17.23
  • UOPS_PORT_3: 14.78
  • UOPS_PORT_4: 67.02
  • UOPS_PORT_5: 25.63
  • UOPS_PORT_6: 52.18
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 16.11