XADD_LOCK (M32, R32) - Throughput and Uops (IACA 2.1)
With a non-indexed addressing mode
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 2.00 Cycles Throughput Bottleneck: InterIteration
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 0.6 0.0 | 0.6 | 1.0 0.5 | 1.0 0.5 | 1.0 | 0.7 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 5^ | 0.6 | 0.6 | 1.0 0.5 | 1.0 0.5 | 1.0 | 0.7 | CP | lock xadd dword ptr [r14], r8d
Total Num Of Uops: 5
With 8 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 8.00 Cycles Throughput Bottleneck: PORT2_AGU, PORT3_AGU, Port4
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 5.3 0.0 | 5.3 | 8.0 4.0 | 8.0 4.0 | 8.0 | 5.3 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 5^ | 0.6 | 0.6 | 1.0 1.0 | 1.0 | 1.0 | 0.7 | CP | lock xadd dword ptr [r14], r8d
| 5^ | 0.6 | 0.7 | 1.0 | 1.0 1.0 | 1.0 | 0.6 | CP | lock xadd dword ptr [r14+0x4], r9d
| 5^ | 0.7 | 0.6 | 1.0 1.0 | 1.0 | 1.0 | 0.6 | CP | lock xadd dword ptr [r14+0x8], r10d
| 5^ | 0.6 | 0.6 | 1.0 | 1.0 1.0 | 1.0 | 0.7 | CP | lock xadd dword ptr [r14+0xc], r11d
| 5^ | 0.6 | 0.7 | 1.0 1.0 | 1.0 | 1.0 | 0.6 | CP | lock xadd dword ptr [r14+0x10], r12d
| 5^ | 0.7 | 0.6 | 1.0 | 1.0 1.0 | 1.0 | 0.6 | CP | lock xadd dword ptr [r14+0x14], ebx
| 5^ | 0.6 | 0.6 | 1.0 1.0 | 1.0 | 1.0 | 0.7 | CP | lock xadd dword ptr [r14+0x18], ecx
| 5^ | 0.6 | 0.7 | 1.0 | 1.0 1.0 | 1.0 | 0.6 | CP | lock xadd dword ptr [r14+0x1c], edx
Total Num Of Uops: 40
With an indexed addressing mode
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 2.00 Cycles Throughput Bottleneck: InterIteration
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 0.6 0.0 | 0.6 | 1.0 0.5 | 1.0 0.5 | 1.0 | 0.7 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 5 | 0.6 | 0.6 | 1.0 0.5 | 1.0 0.5 | 1.0 | 0.7 | CP | lock xadd dword ptr [r14+r13*1], r8d
Total Num Of Uops: 5
With 8 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 10.00 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 5.3 0.0 | 5.3 | 8.0 4.0 | 8.0 4.0 | 8.0 | 5.3 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 5 | 0.6 | 0.6 | 1.0 1.0 | 1.0 | 1.0 | 0.7 | | lock xadd dword ptr [r14+r13*1], r8d
| 5 | 0.6 | 0.7 | 1.0 | 1.0 1.0 | 1.0 | 0.6 | | lock xadd dword ptr [r14+r13*1+0x4], r9d
| 5 | 0.7 | 0.6 | 1.0 1.0 | 1.0 | 1.0 | 0.6 | | lock xadd dword ptr [r14+r13*1+0x8], r10d
| 5 | 0.6 | 0.6 | 1.0 | 1.0 1.0 | 1.0 | 0.7 | | lock xadd dword ptr [r14+r13*1+0xc], r11d
| 5 | 0.6 | 0.7 | 1.0 1.0 | 1.0 | 1.0 | 0.6 | | lock xadd dword ptr [r14+r13*1+0x10], r12d
| 5 | 0.7 | 0.6 | 1.0 | 1.0 1.0 | 1.0 | 0.6 | | lock xadd dword ptr [r14+r13*1+0x14], ebx
| 5 | 0.6 | 0.6 | 1.0 1.0 | 1.0 | 1.0 | 0.7 | | lock xadd dword ptr [r14+r13*1+0x18], ecx
| 5 | 0.6 | 0.7 | 1.0 | 1.0 1.0 | 1.0 | 0.6 | | lock xadd dword ptr [r14+r13*1+0x1c], edx
Total Num Of Uops: 40
With the -no_interiteration flag
Throughput Analysis Report
--------------------------
Block Throughput: 1.00 Cycles Throughput Bottleneck: PORT2_AGU, PORT3_AGU, Port4
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 0.6 0.0 | 0.6 | 1.0 0.5 | 1.0 0.5 | 1.0 | 0.7 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 5^ | 0.6 | 0.6 | 1.0 0.5 | 1.0 0.5 | 1.0 | 0.7 | CP | lock xadd dword ptr [r14], r8d
Total Num Of Uops: 5