VMOVDQU (XMM, M128) - Throughput and Uops (IACA 2.3)
With a non-indexed addressing mode
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 0.50 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 0.0 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm0, xmmword ptr [r14]
Total Num Of Uops: 1
With 13 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 6.50 Cycles Throughput Bottleneck: Backend. PORT2_AGU, Port2_DATA, PORT3_AGU, Port3_DATA
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 6.5 6.5 | 6.5 6.5 | 0.0 | 0.0 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm0, xmmword ptr [r14]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm1, xmmword ptr [r14+0x10]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm2, xmmword ptr [r14+0x20]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm3, xmmword ptr [r14+0x30]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm4, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm5, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm6, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm7, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm8, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm9, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm10, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm11, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm12, xmmword ptr [r14+0xc0]
Total Num Of Uops: 13
With an indexed addressing mode
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 0.50 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 0.0 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm0, xmmword ptr [r14+r13*1]
Total Num Of Uops: 1
With 13 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 6.50 Cycles Throughput Bottleneck: Backend. PORT2_AGU, Port2_DATA, PORT3_AGU, Port3_DATA
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 6.5 6.5 | 6.5 6.5 | 0.0 | 0.0 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm0, xmmword ptr [r14+r13*1]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm1, xmmword ptr [r14+r13*1+0x10]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm2, xmmword ptr [r14+r13*1+0x20]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm3, xmmword ptr [r14+r13*1+0x30]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm4, xmmword ptr [r14+r13*1+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm5, xmmword ptr [r14+r13*1+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm6, xmmword ptr [r14+r13*1+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm7, xmmword ptr [r14+r13*1+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm8, xmmword ptr [r14+r13*1+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm9, xmmword ptr [r14+r13*1+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm10, xmmword ptr [r14+r13*1+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm11, xmmword ptr [r14+r13*1+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | CP | vmovdqu xmm12, xmmword ptr [r14+r13*1+0xc0]
Total Num Of Uops: 13