VPERMW (YMM, YMM, YMM)

With unroll_count=500 and no inner loop

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 1.0
- Reference cycles: 0.33
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.45
- UOPS_PORT_1: 0.55
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2
   6:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.0
- Reference cycles: 0.35
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 3.0
- UOPS_MITE: 3.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.44
- UOPS_PORT_1: 0.56
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2
   6:	90                   	nop
   7:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 1.0
- Reference cycles: 0.32
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.44
- UOPS_PORT_1: 0.56
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2
   6:	90                   	nop
   7:	90                   	nop
   8:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 1.12
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 5.0
- UOPS_MITE: 4.97
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.12

With unroll_count=500, no inner loop, and 4 NOPs

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2
   6:	90                   	nop
   7:	90                   	nop
   8:	90                   	nop
   9:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 2.0
- Reference cycles: 0.65
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 6.0
- UOPS_MITE: 5.98
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 1.0
- Reference cycles: 0.33
- UOPS_EXECUTED.THREAD: 2.1
- RETIRE_SLOTS: 2.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.48
- UOPS_PORT_1: 0.52
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 1.0
- Reference cycles: 0.33
- UOPS_EXECUTED.THREAD: 2.01
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 0.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.49
- UOPS_PORT_1: 0.51
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2
   6:	62 f2 f5 28 8d da    	vpermw ymm3,ymm1,ymm2
   c:	62 f2 f5 28 8d e2    	vpermw ymm4,ymm1,ymm2
  12:	62 f2 f5 28 8d ea    	vpermw ymm5,ymm1,ymm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 1.34
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 7.92
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.78
- UOPS_PORT_1: 2.23
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2
   6:	62 f2 f5 28 8d da    	vpermw ymm3,ymm1,ymm2
   c:	62 f2 f5 28 8d e2    	vpermw ymm4,ymm1,ymm2
  12:	62 f2 f5 28 8d ea    	vpermw ymm5,ymm1,ymm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.0
- Reference cycles: 1.32
- UOPS_EXECUTED.THREAD: 8.5
- RETIRE_SLOTS: 8.5
- UOPS_MITE: 0.01
- UOPS_MS: 0.01
- UOPS_PORT_0: 1.96
- UOPS_PORT_1: 2.04
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2
   6:	62 f2 f5 28 8d da    	vpermw ymm3,ymm1,ymm2
   c:	62 f2 f5 28 8d e2    	vpermw ymm4,ymm1,ymm2
  12:	62 f2 f5 28 8d ea    	vpermw ymm5,ymm1,ymm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.0
- Reference cycles: 1.32
- UOPS_EXECUTED.THREAD: 8.05
- RETIRE_SLOTS: 8.05
- UOPS_MITE: 0.07
- UOPS_MS: 0.01
- UOPS_PORT_0: 1.95
- UOPS_PORT_1: 2.05
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.04

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2
   6:	62 f2 f5 28 8d da    	vpermw ymm3,ymm1,ymm2
   c:	62 f2 f5 28 8d e2    	vpermw ymm4,ymm1,ymm2
  12:	62 f2 f5 28 8d ea    	vpermw ymm5,ymm1,ymm2
  18:	62 f2 f5 28 8d f2    	vpermw ymm6,ymm1,ymm2
  1e:	62 f2 f5 28 8d fa    	vpermw ymm7,ymm1,ymm2
  24:	62 72 f5 28 8d c2    	vpermw ymm8,ymm1,ymm2
  2a:	62 72 f5 28 8d ca    	vpermw ymm9,ymm1,ymm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 2.64
- UOPS_EXECUTED.THREAD: 16.0
- RETIRE_SLOTS: 16.0
- UOPS_MITE: 15.95
- UOPS_MS: 0.0
- UOPS_PORT_0: 3.55
- UOPS_PORT_1: 4.45
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2
   6:	62 f2 f5 28 8d da    	vpermw ymm3,ymm1,ymm2
   c:	62 f2 f5 28 8d e2    	vpermw ymm4,ymm1,ymm2
  12:	62 f2 f5 28 8d ea    	vpermw ymm5,ymm1,ymm2
  18:	62 f2 f5 28 8d f2    	vpermw ymm6,ymm1,ymm2
  1e:	62 f2 f5 28 8d fa    	vpermw ymm7,ymm1,ymm2
  24:	62 72 f5 28 8d c2    	vpermw ymm8,ymm1,ymm2
  2a:	62 72 f5 28 8d ca    	vpermw ymm9,ymm1,ymm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.01
- Reference cycles: 2.64
- UOPS_EXECUTED.THREAD: 17.01
- RETIRE_SLOTS: 17.0
- UOPS_MITE: 0.02
- UOPS_MS: 0.02
- UOPS_PORT_0: 3.9
- UOPS_PORT_1: 4.11
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2
   6:	62 f2 f5 28 8d da    	vpermw ymm3,ymm1,ymm2
   c:	62 f2 f5 28 8d e2    	vpermw ymm4,ymm1,ymm2
  12:	62 f2 f5 28 8d ea    	vpermw ymm5,ymm1,ymm2
  18:	62 f2 f5 28 8d f2    	vpermw ymm6,ymm1,ymm2
  1e:	62 f2 f5 28 8d fa    	vpermw ymm7,ymm1,ymm2
  24:	62 72 f5 28 8d c2    	vpermw ymm8,ymm1,ymm2
  2a:	62 72 f5 28 8d ca    	vpermw ymm9,ymm1,ymm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.01
- Reference cycles: 2.65
- UOPS_EXECUTED.THREAD: 16.1
- RETIRE_SLOTS: 16.1
- UOPS_MITE: 0.16
- UOPS_MS: 0.02
- UOPS_PORT_0: 3.9
- UOPS_PORT_1: 4.1
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.08

With 16 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2
   6:	62 f2 f5 28 8d da    	vpermw ymm3,ymm1,ymm2
   c:	62 f2 f5 28 8d e2    	vpermw ymm4,ymm1,ymm2
  12:	62 f2 f5 28 8d ea    	vpermw ymm5,ymm1,ymm2
  18:	62 f2 f5 28 8d f2    	vpermw ymm6,ymm1,ymm2
  1e:	62 f2 f5 28 8d fa    	vpermw ymm7,ymm1,ymm2
  24:	62 72 f5 28 8d c2    	vpermw ymm8,ymm1,ymm2
  2a:	62 72 f5 28 8d ca    	vpermw ymm9,ymm1,ymm2
  30:	62 72 f5 28 8d d2    	vpermw ymm10,ymm1,ymm2
  36:	62 72 f5 28 8d da    	vpermw ymm11,ymm1,ymm2
  3c:	62 72 f5 28 8d e2    	vpermw ymm12,ymm1,ymm2
  42:	62 e2 f5 28 8d c2    	vpermw ymm16,ymm1,ymm2
  48:	62 e2 f5 28 8d ca    	vpermw ymm17,ymm1,ymm2
  4e:	62 e2 f5 28 8d d2    	vpermw ymm18,ymm1,ymm2
  54:	62 e2 f5 28 8d da    	vpermw ymm19,ymm1,ymm2
  5a:	62 e2 f5 28 8d e2    	vpermw ymm20,ymm1,ymm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 16.0
- Reference cycles: 5.27
- UOPS_EXECUTED.THREAD: 32.0
- RETIRE_SLOTS: 32.01
- UOPS_MITE: 32.16
- UOPS_MS: 0.0
- UOPS_PORT_0: 7.11
- UOPS_PORT_1: 8.89
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 16.0

With loop_count=1000 and unroll_count=1

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2
   6:	62 f2 f5 28 8d da    	vpermw ymm3,ymm1,ymm2
   c:	62 f2 f5 28 8d e2    	vpermw ymm4,ymm1,ymm2
  12:	62 f2 f5 28 8d ea    	vpermw ymm5,ymm1,ymm2
  18:	62 f2 f5 28 8d f2    	vpermw ymm6,ymm1,ymm2
  1e:	62 f2 f5 28 8d fa    	vpermw ymm7,ymm1,ymm2
  24:	62 72 f5 28 8d c2    	vpermw ymm8,ymm1,ymm2
  2a:	62 72 f5 28 8d ca    	vpermw ymm9,ymm1,ymm2
  30:	62 72 f5 28 8d d2    	vpermw ymm10,ymm1,ymm2
  36:	62 72 f5 28 8d da    	vpermw ymm11,ymm1,ymm2
  3c:	62 72 f5 28 8d e2    	vpermw ymm12,ymm1,ymm2
  42:	62 e2 f5 28 8d c2    	vpermw ymm16,ymm1,ymm2
  48:	62 e2 f5 28 8d ca    	vpermw ymm17,ymm1,ymm2
  4e:	62 e2 f5 28 8d d2    	vpermw ymm18,ymm1,ymm2
  54:	62 e2 f5 28 8d da    	vpermw ymm19,ymm1,ymm2
  5a:	62 e2 f5 28 8d e2    	vpermw ymm20,ymm1,ymm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 18.0
- Core cycles: 16.01
- Reference cycles: 5.31
- UOPS_EXECUTED.THREAD: 33.0
- RETIRE_SLOTS: 33.01
- UOPS_MITE: 0.04
- UOPS_MS: 0.02
- UOPS_PORT_0: 7.75
- UOPS_PORT_1: 8.25
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With loop_count=100 and unroll_count=10

Code:

   0:	62 f2 f5 28 8d c2    	vpermw ymm0,ymm1,ymm2
   6:	62 f2 f5 28 8d da    	vpermw ymm3,ymm1,ymm2
   c:	62 f2 f5 28 8d e2    	vpermw ymm4,ymm1,ymm2
  12:	62 f2 f5 28 8d ea    	vpermw ymm5,ymm1,ymm2
  18:	62 f2 f5 28 8d f2    	vpermw ymm6,ymm1,ymm2
  1e:	62 f2 f5 28 8d fa    	vpermw ymm7,ymm1,ymm2
  24:	62 72 f5 28 8d c2    	vpermw ymm8,ymm1,ymm2
  2a:	62 72 f5 28 8d ca    	vpermw ymm9,ymm1,ymm2
  30:	62 72 f5 28 8d d2    	vpermw ymm10,ymm1,ymm2
  36:	62 72 f5 28 8d da    	vpermw ymm11,ymm1,ymm2
  3c:	62 72 f5 28 8d e2    	vpermw ymm12,ymm1,ymm2
  42:	62 e2 f5 28 8d c2    	vpermw ymm16,ymm1,ymm2
  48:	62 e2 f5 28 8d ca    	vpermw ymm17,ymm1,ymm2
  4e:	62 e2 f5 28 8d d2    	vpermw ymm18,ymm1,ymm2
  54:	62 e2 f5 28 8d da    	vpermw ymm19,ymm1,ymm2
  5a:	62 e2 f5 28 8d e2    	vpermw ymm20,ymm1,ymm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 16.2
- Core cycles: 16.01
- Reference cycles: 5.3
- UOPS_EXECUTED.THREAD: 32.1
- RETIRE_SLOTS: 32.1
- UOPS_MITE: 0.32
- UOPS_MS: 0.02
- UOPS_PORT_0: 7.78
- UOPS_PORT_1: 8.23
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.16

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 4.0
- Reference cycles: 1.32
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.48
- UOPS_PORT_1: 0.52
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0
   6:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 4.0
- Reference cycles: 1.31
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 3.0
- UOPS_MITE: 2.99
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.49
- UOPS_PORT_1: 0.51
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0
   6:	90                   	nop
   7:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 4.0
- Reference cycles: 1.32
- UOPS_EXECUTED.THREAD: 1.99
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0
   6:	90                   	nop
   7:	90                   	nop
   8:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 1.33
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 5.0
- UOPS_MITE: 4.98
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.48
- UOPS_PORT_1: 0.52
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 4 NOPs

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0
   6:	90                   	nop
   7:	90                   	nop
   8:	90                   	nop
   9:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.0
- Reference cycles: 1.32
- UOPS_EXECUTED.THREAD: 2.01
- RETIRE_SLOTS: 6.0
- UOPS_MITE: 6.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.49
- UOPS_PORT_1: 0.51
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 4.0
- Reference cycles: 1.32
- UOPS_EXECUTED.THREAD: 2.1
- RETIRE_SLOTS: 2.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.5
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 4.0
- Reference cycles: 1.32
- UOPS_EXECUTED.THREAD: 2.01
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 0.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.49
- UOPS_PORT_1: 0.51
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0
   6:	62 f2 f5 28 8d c9    	vpermw ymm1,ymm1,ymm1
   c:	62 f2 ed 28 8d d2    	vpermw ymm2,ymm2,ymm2
  12:	62 f2 e5 28 8d db    	vpermw ymm3,ymm3,ymm3

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 1.4
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.01
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.94
- UOPS_PORT_1: 2.06
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0
   6:	62 f2 f5 28 8d c9    	vpermw ymm1,ymm1,ymm1
   c:	62 f2 ed 28 8d d2    	vpermw ymm2,ymm2,ymm2
  12:	62 f2 e5 28 8d db    	vpermw ymm3,ymm3,ymm3

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.0
- Reference cycles: 1.33
- UOPS_EXECUTED.THREAD: 8.5
- RETIRE_SLOTS: 8.5
- UOPS_MITE: 0.01
- UOPS_MS: 0.01
- UOPS_PORT_0: 1.99
- UOPS_PORT_1: 2.01
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0
   6:	62 f2 f5 28 8d c9    	vpermw ymm1,ymm1,ymm1
   c:	62 f2 ed 28 8d d2    	vpermw ymm2,ymm2,ymm2
  12:	62 f2 e5 28 8d db    	vpermw ymm3,ymm3,ymm3

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.0
- Reference cycles: 1.32
- UOPS_EXECUTED.THREAD: 8.05
- RETIRE_SLOTS: 8.05
- UOPS_MITE: 0.08
- UOPS_MS: 0.01
- UOPS_PORT_0: 1.97
- UOPS_PORT_1: 2.03
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.04

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0
   6:	62 f2 f5 28 8d c9    	vpermw ymm1,ymm1,ymm1
   c:	62 f2 ed 28 8d d2    	vpermw ymm2,ymm2,ymm2
  12:	62 f2 e5 28 8d db    	vpermw ymm3,ymm3,ymm3
  18:	62 f2 dd 28 8d e4    	vpermw ymm4,ymm4,ymm4
  1e:	62 f2 d5 28 8d ed    	vpermw ymm5,ymm5,ymm5
  24:	62 f2 cd 28 8d f6    	vpermw ymm6,ymm6,ymm6
  2a:	62 f2 c5 28 8d ff    	vpermw ymm7,ymm7,ymm7

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 2.79
- UOPS_EXECUTED.THREAD: 16.0
- RETIRE_SLOTS: 16.0
- UOPS_MITE: 16.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 3.89
- UOPS_PORT_1: 4.11
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0
   6:	62 f2 f5 28 8d c9    	vpermw ymm1,ymm1,ymm1
   c:	62 f2 ed 28 8d d2    	vpermw ymm2,ymm2,ymm2
  12:	62 f2 e5 28 8d db    	vpermw ymm3,ymm3,ymm3
  18:	62 f2 dd 28 8d e4    	vpermw ymm4,ymm4,ymm4
  1e:	62 f2 d5 28 8d ed    	vpermw ymm5,ymm5,ymm5
  24:	62 f2 cd 28 8d f6    	vpermw ymm6,ymm6,ymm6
  2a:	62 f2 c5 28 8d ff    	vpermw ymm7,ymm7,ymm7

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.01
- Reference cycles: 2.64
- UOPS_EXECUTED.THREAD: 17.0
- RETIRE_SLOTS: 17.0
- UOPS_MITE: 0.03
- UOPS_MS: 0.02
- UOPS_PORT_0: 3.97
- UOPS_PORT_1: 4.03
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0
   6:	62 f2 f5 28 8d c9    	vpermw ymm1,ymm1,ymm1
   c:	62 f2 ed 28 8d d2    	vpermw ymm2,ymm2,ymm2
  12:	62 f2 e5 28 8d db    	vpermw ymm3,ymm3,ymm3
  18:	62 f2 dd 28 8d e4    	vpermw ymm4,ymm4,ymm4
  1e:	62 f2 d5 28 8d ed    	vpermw ymm5,ymm5,ymm5
  24:	62 f2 cd 28 8d f6    	vpermw ymm6,ymm6,ymm6
  2a:	62 f2 c5 28 8d ff    	vpermw ymm7,ymm7,ymm7

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.01
- Reference cycles: 2.66
- UOPS_EXECUTED.THREAD: 16.1
- RETIRE_SLOTS: 16.1
- UOPS_MITE: 0.17
- UOPS_MS: 0.02
- UOPS_PORT_0: 3.97
- UOPS_PORT_1: 4.03
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.08

With 16 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0
   6:	62 f2 f5 28 8d c9    	vpermw ymm1,ymm1,ymm1
   c:	62 f2 ed 28 8d d2    	vpermw ymm2,ymm2,ymm2
  12:	62 f2 e5 28 8d db    	vpermw ymm3,ymm3,ymm3
  18:	62 f2 dd 28 8d e4    	vpermw ymm4,ymm4,ymm4
  1e:	62 f2 d5 28 8d ed    	vpermw ymm5,ymm5,ymm5
  24:	62 f2 cd 28 8d f6    	vpermw ymm6,ymm6,ymm6
  2a:	62 f2 c5 28 8d ff    	vpermw ymm7,ymm7,ymm7
  30:	62 52 bd 28 8d c0    	vpermw ymm8,ymm8,ymm8
  36:	62 52 b5 28 8d c9    	vpermw ymm9,ymm9,ymm9
  3c:	62 52 ad 28 8d d2    	vpermw ymm10,ymm10,ymm10
  42:	62 52 a5 28 8d db    	vpermw ymm11,ymm11,ymm11
  48:	62 52 9d 28 8d e4    	vpermw ymm12,ymm12,ymm12
  4e:	62 a2 fd 20 8d c0    	vpermw ymm16,ymm16,ymm16
  54:	62 a2 f5 20 8d c9    	vpermw ymm17,ymm17,ymm17
  5a:	62 a2 ed 20 8d d2    	vpermw ymm18,ymm18,ymm18

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8;
VXORPS YMM9, YMM9, YMM9;
VXORPS YMM10, YMM10, YMM10;
VXORPS YMM11, YMM11, YMM11;
VXORPS YMM12, YMM12, YMM12;
VXORPS YMM16, YMM16, YMM16;
VXORPS YMM17, YMM17, YMM17;
VXORPS YMM18, YMM18, YMM18

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 16.0
- Reference cycles: 5.27
- UOPS_EXECUTED.THREAD: 32.0
- RETIRE_SLOTS: 32.0
- UOPS_MITE: 32.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 7.61
- UOPS_PORT_1: 8.39
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 16.0

With loop_count=1000 and unroll_count=1

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0
   6:	62 f2 f5 28 8d c9    	vpermw ymm1,ymm1,ymm1
   c:	62 f2 ed 28 8d d2    	vpermw ymm2,ymm2,ymm2
  12:	62 f2 e5 28 8d db    	vpermw ymm3,ymm3,ymm3
  18:	62 f2 dd 28 8d e4    	vpermw ymm4,ymm4,ymm4
  1e:	62 f2 d5 28 8d ed    	vpermw ymm5,ymm5,ymm5
  24:	62 f2 cd 28 8d f6    	vpermw ymm6,ymm6,ymm6
  2a:	62 f2 c5 28 8d ff    	vpermw ymm7,ymm7,ymm7
  30:	62 52 bd 28 8d c0    	vpermw ymm8,ymm8,ymm8
  36:	62 52 b5 28 8d c9    	vpermw ymm9,ymm9,ymm9
  3c:	62 52 ad 28 8d d2    	vpermw ymm10,ymm10,ymm10
  42:	62 52 a5 28 8d db    	vpermw ymm11,ymm11,ymm11
  48:	62 52 9d 28 8d e4    	vpermw ymm12,ymm12,ymm12
  4e:	62 a2 fd 20 8d c0    	vpermw ymm16,ymm16,ymm16
  54:	62 a2 f5 20 8d c9    	vpermw ymm17,ymm17,ymm17
  5a:	62 a2 ed 20 8d d2    	vpermw ymm18,ymm18,ymm18

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8;
VXORPS YMM9, YMM9, YMM9;
VXORPS YMM10, YMM10, YMM10;
VXORPS YMM11, YMM11, YMM11;
VXORPS YMM12, YMM12, YMM12;
VXORPS YMM16, YMM16, YMM16;
VXORPS YMM17, YMM17, YMM17;
VXORPS YMM18, YMM18, YMM18

Show nanoBench command
Results:
- Instructions retired: 18.0
- Core cycles: 16.01
- Reference cycles: 5.3
- UOPS_EXECUTED.THREAD: 33.0
- RETIRE_SLOTS: 33.01
- UOPS_MITE: 0.04
- UOPS_MS: 0.02
- UOPS_PORT_0: 7.93
- UOPS_PORT_1: 8.07
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With loop_count=100 and unroll_count=10

Code:

   0:	62 f2 fd 28 8d c0    	vpermw ymm0,ymm0,ymm0
   6:	62 f2 f5 28 8d c9    	vpermw ymm1,ymm1,ymm1
   c:	62 f2 ed 28 8d d2    	vpermw ymm2,ymm2,ymm2
  12:	62 f2 e5 28 8d db    	vpermw ymm3,ymm3,ymm3
  18:	62 f2 dd 28 8d e4    	vpermw ymm4,ymm4,ymm4
  1e:	62 f2 d5 28 8d ed    	vpermw ymm5,ymm5,ymm5
  24:	62 f2 cd 28 8d f6    	vpermw ymm6,ymm6,ymm6
  2a:	62 f2 c5 28 8d ff    	vpermw ymm7,ymm7,ymm7
  30:	62 52 bd 28 8d c0    	vpermw ymm8,ymm8,ymm8
  36:	62 52 b5 28 8d c9    	vpermw ymm9,ymm9,ymm9
  3c:	62 52 ad 28 8d d2    	vpermw ymm10,ymm10,ymm10
  42:	62 52 a5 28 8d db    	vpermw ymm11,ymm11,ymm11
  48:	62 52 9d 28 8d e4    	vpermw ymm12,ymm12,ymm12
  4e:	62 a2 fd 20 8d c0    	vpermw ymm16,ymm16,ymm16
  54:	62 a2 f5 20 8d c9    	vpermw ymm17,ymm17,ymm17
  5a:	62 a2 ed 20 8d d2    	vpermw ymm18,ymm18,ymm18

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8;
VXORPS YMM9, YMM9, YMM9;
VXORPS YMM10, YMM10, YMM10;
VXORPS YMM11, YMM11, YMM11;
VXORPS YMM12, YMM12, YMM12;
VXORPS YMM16, YMM16, YMM16;
VXORPS YMM17, YMM17, YMM17;
VXORPS YMM18, YMM18, YMM18

Show nanoBench command
Results:
- Instructions retired: 16.2
- Core cycles: 16.01
- Reference cycles: 5.3
- UOPS_EXECUTED.THREAD: 32.1
- RETIRE_SLOTS: 32.1
- UOPS_MITE: 0.32
- UOPS_MS: 0.02
- UOPS_PORT_0: 7.95
- UOPS_PORT_1: 8.05
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.16

VPERMW (YMM, YMM, YMM) - Throughput and Uops

With different registers for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With unroll_count=500, no inner loop, and 1 NOP

With unroll_count=500, no inner loop, and 2 NOPs

With unroll_count=500, no inner loop, and 3 NOPs

With unroll_count=500, no inner loop, and 4 NOPs

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 16 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With unroll_count=500, no inner loop, and 1 NOP

With unroll_count=500, no inner loop, and 2 NOPs

With unroll_count=500, no inner loop, and 3 NOPs

With unroll_count=500, no inner loop, and 4 NOPs

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 16 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10