RDMSR - Throughput and Uops
With unroll_count=500 and no inner loop
- Code:
0: 0f 32 rdmsr
- Init:
MOV RCX, 0xE7
- Show nanoBench command
- Results:
- Instructions retired: 1.0
- Core cycles: 91.08
- Reference cycles: 30.2
- UOPS_EXECUTED.THREAD: 61.01
- RETIRE_SLOTS: 70.0
- UOPS_MITE: 0.0
- UOPS_MS: 69.97
- UOPS_PORT_0: 14.99
- UOPS_PORT_1: 11.01
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 19.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0
With unroll_count=500, no inner loop, and 1 NOP
- Code:
0: 0f 32 rdmsr
2: 90 nop
- Init:
MOV RCX, 0xE7
- Show nanoBench command
- Results:
- Instructions retired: 2.0
- Core cycles: 92.28
- Reference cycles: 30.55
- UOPS_EXECUTED.THREAD: 61.01
- RETIRE_SLOTS: 71.0
- UOPS_MITE: 1.0
- UOPS_MS: 69.97
- UOPS_PORT_0: 14.99
- UOPS_PORT_1: 11.01
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 19.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0
With loop_count=1000 and unroll_count=10
- Code:
0: 0f 32 rdmsr
- Init:
MOV RCX, 0xE7
- Show nanoBench command
- Results:
- Instructions retired: 1.2
- Core cycles: 92.2
- Reference cycles: 30.55
- UOPS_EXECUTED.THREAD: 61.1
- RETIRE_SLOTS: 70.1
- UOPS_MITE: 0.1
- UOPS_MS: 70.0
- UOPS_PORT_0: 14.6
- UOPS_PORT_1: 11.2
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 19.3
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.1
With loop_count=100 and unroll_count=100
- Code:
0: 0f 32 rdmsr
- Init:
MOV RCX, 0xE7
- Show nanoBench command
- Results:
- Instructions retired: 1.02
- Core cycles: 91.07
- Reference cycles: 30.18
- UOPS_EXECUTED.THREAD: 61.01
- RETIRE_SLOTS: 70.01
- UOPS_MITE: 0.01
- UOPS_MS: 70.0
- UOPS_PORT_0: 14.96
- UOPS_PORT_1: 11.02
- UOPS_PORT_5: 16.0
- UOPS_PORT_6: 19.03
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01