LZCNT (R64, R64) - Throughput and Uops

With different registers for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 1.0
- Reference cycles: 0.37
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 1.0
- Reference cycles: 0.33
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 1.0
- Reference cycles: 0.33
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	f3 4d 0f bd d1       	lzcnt  r10,r9
   a:	f3 4d 0f bd d9       	lzcnt  r11,r9
   f:	f3 4d 0f bd e1       	lzcnt  r12,r9

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 1.37
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.01

With loop_count=1000 and unroll_count=2

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	f3 4d 0f bd d1       	lzcnt  r10,r9
   a:	f3 4d 0f bd d9       	lzcnt  r11,r9
   f:	f3 4d 0f bd e1       	lzcnt  r12,r9

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.01
- Reference cycles: 1.32
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.01
- UOPS_MS: 0.01
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	f3 4d 0f bd d1       	lzcnt  r10,r9
   a:	f3 4d 0f bd d9       	lzcnt  r11,r9
   f:	f3 4d 0f bd e1       	lzcnt  r12,r9

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.0
- Reference cycles: 1.41
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.01
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	f3 4d 0f bd d1       	lzcnt  r10,r9
   a:	f3 4d 0f bd d9       	lzcnt  r11,r9
   f:	f3 4d 0f bd e1       	lzcnt  r12,r9
  14:	f3 4d 0f bd e9       	lzcnt  r13,r9
  19:	f3 4d 0f bd f1       	lzcnt  r14,r9
  1e:	f3 49 0f bd d9       	lzcnt  rbx,r9
  23:	f3 49 0f bd c9       	lzcnt  rcx,r9

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 2.74
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	f3 4d 0f bd d1       	lzcnt  r10,r9
   a:	f3 4d 0f bd d9       	lzcnt  r11,r9
   f:	f3 4d 0f bd e1       	lzcnt  r12,r9
  14:	f3 4d 0f bd e9       	lzcnt  r13,r9
  19:	f3 4d 0f bd f1       	lzcnt  r14,r9
  1e:	f3 49 0f bd d9       	lzcnt  rbx,r9
  23:	f3 49 0f bd c9       	lzcnt  rcx,r9

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.01
- Reference cycles: 2.65
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.02
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	f3 4d 0f bd d1       	lzcnt  r10,r9
   a:	f3 4d 0f bd d9       	lzcnt  r11,r9
   f:	f3 4d 0f bd e1       	lzcnt  r12,r9
  14:	f3 4d 0f bd e9       	lzcnt  r13,r9
  19:	f3 4d 0f bd f1       	lzcnt  r14,r9
  1e:	f3 49 0f bd d9       	lzcnt  rbx,r9
  23:	f3 49 0f bd c9       	lzcnt  rcx,r9

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.01
- Reference cycles: 2.64
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.09
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 12 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	f3 4d 0f bd d1       	lzcnt  r10,r9
   a:	f3 4d 0f bd d9       	lzcnt  r11,r9
   f:	f3 4d 0f bd e1       	lzcnt  r12,r9
  14:	f3 4d 0f bd e9       	lzcnt  r13,r9
  19:	f3 4d 0f bd f1       	lzcnt  r14,r9
  1e:	f3 49 0f bd d9       	lzcnt  rbx,r9
  23:	f3 49 0f bd c9       	lzcnt  rcx,r9
  28:	f3 49 0f bd d1       	lzcnt  rdx,r9
  2d:	f3 49 0f bd f9       	lzcnt  rdi,r9
  32:	f3 49 0f bd f1       	lzcnt  rsi,r9
  37:	f3 49 0f bd e9       	lzcnt  rbp,r9

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 12.0
- Reference cycles: 3.93
- UOPS_EXECUTED.THREAD: 12.0
- RETIRE_SLOTS: 12.0
- UOPS_MITE: 11.99
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 12.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 3.0

With loop_count=1000 and unroll_count=1

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	f3 4d 0f bd d1       	lzcnt  r10,r9
   a:	f3 4d 0f bd d9       	lzcnt  r11,r9
   f:	f3 4d 0f bd e1       	lzcnt  r12,r9
  14:	f3 4d 0f bd e9       	lzcnt  r13,r9
  19:	f3 4d 0f bd f1       	lzcnt  r14,r9
  1e:	f3 49 0f bd d9       	lzcnt  rbx,r9
  23:	f3 49 0f bd c9       	lzcnt  rcx,r9
  28:	f3 49 0f bd d1       	lzcnt  rdx,r9
  2d:	f3 49 0f bd f9       	lzcnt  rdi,r9
  32:	f3 49 0f bd f1       	lzcnt  rsi,r9
  37:	f3 49 0f bd e9       	lzcnt  rbp,r9

Show nanoBench command
Results:
- Instructions retired: 14.0
- Core cycles: 12.01
- Reference cycles: 3.97
- UOPS_EXECUTED.THREAD: 13.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 0.02
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 12.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	f3 4d 0f bd d1       	lzcnt  r10,r9
   a:	f3 4d 0f bd d9       	lzcnt  r11,r9
   f:	f3 4d 0f bd e1       	lzcnt  r12,r9
  14:	f3 4d 0f bd e9       	lzcnt  r13,r9
  19:	f3 4d 0f bd f1       	lzcnt  r14,r9
  1e:	f3 49 0f bd d9       	lzcnt  rbx,r9
  23:	f3 49 0f bd c9       	lzcnt  rcx,r9
  28:	f3 49 0f bd d1       	lzcnt  rdx,r9
  2d:	f3 49 0f bd f9       	lzcnt  rdi,r9
  32:	f3 49 0f bd f1       	lzcnt  rsi,r9
  37:	f3 49 0f bd e9       	lzcnt  rbp,r9

Show nanoBench command
Results:
- Instructions retired: 12.2
- Core cycles: 12.01
- Reference cycles: 3.97
- UOPS_EXECUTED.THREAD: 12.1
- RETIRE_SLOTS: 12.09
- UOPS_MITE: 0.12
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 12.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.04

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	f3 4d 0f bd c0       	lzcnt  r8,r8

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 3.0
- Reference cycles: 0.99
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	f3 4d 0f bd c0       	lzcnt  r8,r8

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 3.0
- Reference cycles: 0.99
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	f3 4d 0f bd c0       	lzcnt  r8,r8

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 3.0
- Reference cycles: 0.99
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	f3 4d 0f bd c0       	lzcnt  r8,r8
   5:	f3 4d 0f bd c9       	lzcnt  r9,r9
   a:	f3 4d 0f bd d2       	lzcnt  r10,r10
   f:	f3 4d 0f bd db       	lzcnt  r11,r11

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 1.34
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 3.98
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	f3 4d 0f bd c0       	lzcnt  r8,r8
   5:	f3 4d 0f bd c9       	lzcnt  r9,r9
   a:	f3 4d 0f bd d2       	lzcnt  r10,r10
   f:	f3 4d 0f bd db       	lzcnt  r11,r11

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.01
- Reference cycles: 1.32
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.01
- UOPS_MS: 0.01
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	f3 4d 0f bd c0       	lzcnt  r8,r8
   5:	f3 4d 0f bd c9       	lzcnt  r9,r9
   a:	f3 4d 0f bd d2       	lzcnt  r10,r10
   f:	f3 4d 0f bd db       	lzcnt  r11,r11

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.0
- Reference cycles: 1.32
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.01
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f3 4d 0f bd c0       	lzcnt  r8,r8
   5:	f3 4d 0f bd c9       	lzcnt  r9,r9
   a:	f3 4d 0f bd d2       	lzcnt  r10,r10
   f:	f3 4d 0f bd db       	lzcnt  r11,r11
  14:	f3 4d 0f bd e4       	lzcnt  r12,r12
  19:	f3 4d 0f bd ed       	lzcnt  r13,r13
  1e:	f3 4d 0f bd f6       	lzcnt  r14,r14
  23:	f3 48 0f bd db       	lzcnt  rbx,rbx

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 2.74
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 7.96
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	f3 4d 0f bd c0       	lzcnt  r8,r8
   5:	f3 4d 0f bd c9       	lzcnt  r9,r9
   a:	f3 4d 0f bd d2       	lzcnt  r10,r10
   f:	f3 4d 0f bd db       	lzcnt  r11,r11
  14:	f3 4d 0f bd e4       	lzcnt  r12,r12
  19:	f3 4d 0f bd ed       	lzcnt  r13,r13
  1e:	f3 4d 0f bd f6       	lzcnt  r14,r14
  23:	f3 48 0f bd db       	lzcnt  rbx,rbx

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.01
- Reference cycles: 2.65
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.02
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f3 4d 0f bd c0       	lzcnt  r8,r8
   5:	f3 4d 0f bd c9       	lzcnt  r9,r9
   a:	f3 4d 0f bd d2       	lzcnt  r10,r10
   f:	f3 4d 0f bd db       	lzcnt  r11,r11
  14:	f3 4d 0f bd e4       	lzcnt  r12,r12
  19:	f3 4d 0f bd ed       	lzcnt  r13,r13
  1e:	f3 4d 0f bd f6       	lzcnt  r14,r14
  23:	f3 48 0f bd db       	lzcnt  rbx,rbx

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.01
- Reference cycles: 2.65
- UOPS_EXECUTED.THREAD: 8.11
- RETIRE_SLOTS: 8.09
- UOPS_MITE: 0.08
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 8.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 13 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f3 4d 0f bd c0       	lzcnt  r8,r8
   5:	f3 4d 0f bd c9       	lzcnt  r9,r9
   a:	f3 4d 0f bd d2       	lzcnt  r10,r10
   f:	f3 4d 0f bd db       	lzcnt  r11,r11
  14:	f3 4d 0f bd e4       	lzcnt  r12,r12
  19:	f3 4d 0f bd ed       	lzcnt  r13,r13
  1e:	f3 4d 0f bd f6       	lzcnt  r14,r14
  23:	f3 48 0f bd db       	lzcnt  rbx,rbx
  28:	f3 48 0f bd c9       	lzcnt  rcx,rcx
  2d:	f3 48 0f bd d2       	lzcnt  rdx,rdx
  32:	f3 48 0f bd ff       	lzcnt  rdi,rdi
  37:	f3 48 0f bd f6       	lzcnt  rsi,rsi
  3c:	f3 48 0f bd ed       	lzcnt  rbp,rbp

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.01
- Reference cycles: 4.29
- UOPS_EXECUTED.THREAD: 13.0
- RETIRE_SLOTS: 13.04
- UOPS_MITE: 12.93
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 13.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 3.25

With loop_count=1000 and unroll_count=1

Code:

   0:	f3 4d 0f bd c0       	lzcnt  r8,r8
   5:	f3 4d 0f bd c9       	lzcnt  r9,r9
   a:	f3 4d 0f bd d2       	lzcnt  r10,r10
   f:	f3 4d 0f bd db       	lzcnt  r11,r11
  14:	f3 4d 0f bd e4       	lzcnt  r12,r12
  19:	f3 4d 0f bd ed       	lzcnt  r13,r13
  1e:	f3 4d 0f bd f6       	lzcnt  r14,r14
  23:	f3 48 0f bd db       	lzcnt  rbx,rbx
  28:	f3 48 0f bd c9       	lzcnt  rcx,rcx
  2d:	f3 48 0f bd d2       	lzcnt  rdx,rdx
  32:	f3 48 0f bd ff       	lzcnt  rdi,rdi
  37:	f3 48 0f bd f6       	lzcnt  rsi,rsi
  3c:	f3 48 0f bd ed       	lzcnt  rbp,rbp

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 13.01
- Reference cycles: 4.31
- UOPS_EXECUTED.THREAD: 14.0
- RETIRE_SLOTS: 14.0
- UOPS_MITE: 0.02
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 13.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	f3 4d 0f bd c0       	lzcnt  r8,r8
   5:	f3 4d 0f bd c9       	lzcnt  r9,r9
   a:	f3 4d 0f bd d2       	lzcnt  r10,r10
   f:	f3 4d 0f bd db       	lzcnt  r11,r11
  14:	f3 4d 0f bd e4       	lzcnt  r12,r12
  19:	f3 4d 0f bd ed       	lzcnt  r13,r13
  1e:	f3 4d 0f bd f6       	lzcnt  r14,r14
  23:	f3 48 0f bd db       	lzcnt  rbx,rbx
  28:	f3 48 0f bd c9       	lzcnt  rcx,rcx
  2d:	f3 48 0f bd d2       	lzcnt  rdx,rdx
  32:	f3 48 0f bd ff       	lzcnt  rdi,rdi
  37:	f3 48 0f bd f6       	lzcnt  rsi,rsi
  3c:	f3 48 0f bd ed       	lzcnt  rbp,rbp

Show nanoBench command
Results:
- Instructions retired: 13.2
- Core cycles: 13.01
- Reference cycles: 4.31
- UOPS_EXECUTED.THREAD: 13.1
- RETIRE_SLOTS: 13.1
- UOPS_MITE: 0.13
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 13.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.03

Tests for macro-fusion

With JB (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 82 00 00 00 00    	jb     0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.25
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 0.53
- UOPS_MS: 0.25
- UOPS_PORT_0: 0.37
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.41

With JB (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	72 00                	jb     0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.09
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.1
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.38
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.46

With JBE (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 86 00 00 00 00    	jbe    0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.13
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.02
- UOPS_MITE: 0.73
- UOPS_MS: 0.25
- UOPS_PORT_0: 0.38
- UOPS_PORT_1: 1.02
- UOPS_PORT_5: -0.02
- UOPS_PORT_6: 0.62
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.36

With JBE (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	76 00                	jbe    0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.12
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.02
- UOPS_MITE: 1.28
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.39
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.53

With JL (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 8c 00 00 00 00    	jl     0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 2.0
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.38
- UOPS_PORT_1: 0.99
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.57

With JL (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	7c 00                	jl     0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.06
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 2.0
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.37
- UOPS_PORT_1: 0.99
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JLE (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 8e 00 00 00 00    	jle    0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.09
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 2.0
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.38
- UOPS_PORT_1: 0.99
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.57

With JLE (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	7e 00                	jle    0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.06
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 2.0
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.37
- UOPS_PORT_1: 0.99
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JNB (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 83 00 00 00 00    	jae    0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 2.0
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.38
- UOPS_PORT_1: 0.99
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.57

With JNB (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	73 00                	jae    0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.06
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.02
- UOPS_MITE: 2.0
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.37
- UOPS_PORT_1: 0.99
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JNBE (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 87 00 00 00 00    	ja     0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.09
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.05
- RETIRE_SLOTS: 1.96
- UOPS_MITE: 2.01
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.39
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: -0.01
- UOPS_PORT_6: 0.61
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.56

With JNBE (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	77 00                	ja     0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.38
- UOPS_PORT_1: 0.99
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.62
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JNL (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 8d 00 00 00 00    	jge    0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.06
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 1.98
- UOPS_MITE: 0.69
- UOPS_MS: 0.26
- UOPS_PORT_0: 0.37
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.39

With JNL (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	7d 00                	jge    0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.19
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 1.99
- UOPS_MITE: 1.14
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.36
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.64
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.49

With JNLE (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 8f 00 00 00 00    	jg     0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.13
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 1.99
- UOPS_MITE: 0.44
- UOPS_MS: 0.26
- UOPS_PORT_0: 0.37
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.34

With JNLE (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	7f 00                	jg     0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.18
- Reference cycles: 0.31
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 1.98
- UOPS_MITE: 1.29
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.38
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.64
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.46

With JNO (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 81 00 00 00 00    	jno    0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.31
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.02
- UOPS_MITE: 0.47
- UOPS_MS: 0.25
- UOPS_PORT_0: 0.39
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.35

With JNO (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	71 00                	jno    0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.24
- Reference cycles: 0.41
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 1.99
- UOPS_MITE: 1.2
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.36
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.66
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.43

With JNP (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 8b 00 00 00 00    	jnp    0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.23
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.02
- UOPS_MITE: 0.53
- UOPS_MS: 0.26
- UOPS_PORT_0: 0.36
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.4

With JNP (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	7b 00                	jnp    0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.41
- Reference cycles: 0.31
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.03
- UOPS_MITE: 1.04
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.37
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.64
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.49

With JNS (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 89 00 00 00 00    	jns    0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.31
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.03
- UOPS_MITE: 0.72
- UOPS_MS: 0.25
- UOPS_PORT_0: 0.36
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.65
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.38

With JNS (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	79 00                	jns    0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.36
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 1.99
- UOPS_MITE: 1.11
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.38
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.64
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.56

With JNZ (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 85 00 00 00 00    	jne    0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.27
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 1.98
- UOPS_MITE: 0.72
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.35
- UOPS_PORT_1: 1.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.65
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.3

With JNZ (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	75 00                	jne    0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.18
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 1.99
- UOPS_MITE: 1.39
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.37
- UOPS_PORT_1: 1.01
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.64
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JO (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 80 00 00 00 00    	jo     0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.09
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 2.0
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.38
- UOPS_PORT_1: 0.99
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.57

With JO (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	70 00                	jo     0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.06
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 2.0
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.37
- UOPS_PORT_1: 0.99
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JP (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 8a 00 00 00 00    	jp     0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 0.31
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 2.0
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.38
- UOPS_PORT_1: 0.99
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.57

With JP (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	7a 00                	jp     0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.06
- Reference cycles: 0.31
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 2.0
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.37
- UOPS_PORT_1: 0.99
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JS (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 88 00 00 00 00    	js     0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.09
- Reference cycles: 0.31
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 2.0
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.38
- UOPS_PORT_1: 0.99
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.57

With JS (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	78 00                	js     0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.06
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 2.0
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.37
- UOPS_PORT_1: 0.99
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JZ (Rel32)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	0f 84 00 00 00 00    	je     0xb

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 2.0
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.38
- UOPS_PORT_1: 0.99
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.57

With JZ (Rel8)

Code:

   0:	f3 4d 0f bd c1       	lzcnt  r8,r9
   5:	74 00                	je     0x7

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.06
- Reference cycles: 0.36
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 2.0
- UOPS_MS: 0.24
- UOPS_PORT_0: 0.37
- UOPS_PORT_1: 0.99
- UOPS_PORT_5: 0.01
- UOPS_PORT_6: 0.63
- UOPS_PORT_23: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5